CN101770974B - Method for fabricating shallow-trench isolation structure - Google Patents
Method for fabricating shallow-trench isolation structure Download PDFInfo
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- CN101770974B CN101770974B CN2008102053879A CN200810205387A CN101770974B CN 101770974 B CN101770974 B CN 101770974B CN 2008102053879 A CN2008102053879 A CN 2008102053879A CN 200810205387 A CN200810205387 A CN 200810205387A CN 101770974 B CN101770974 B CN 101770974B
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Abstract
The invention relates to a method for fabricating a shallow-trench isolation structure, which comprises the following steps: providing a semiconductor substrate in which a trench is formed; performing an oxygen plasma treating process at the trench top; after the oxygen plasma treating process is completed, performing a cleaning process to the trench to remove an oxide layer at the edge of the trench top; and after the cleaning process is completed, filling a dielectric material into the trench. The method can avoid or reduce the formation of defects at the edge of the trench top during the fabrication of the shallow-trench isolation structure.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of manufacturing approach of fleet plough groove isolation structure.
Background technology
Along with the semiconductor integrated circuit manufacturing technology constantly develops, also (Local Oxidation ofSilicon LOCOS) develops into the shallow trench isolation technology to the isolation technology of device and device by original silicon carrying out local oxide isolation in the semiconductor integrated circuit manufacturing process.
Fleet plough groove isolation structure is through forming earlier groove in Semiconductor substrate, and then in groove, fills the dielectric material and form.At publication number is in the one Chinese patent application file of CN 1649122A, discloses the manufacturing approach that a kind of shallow trench isolation leaves.Each step corresponding construction generalized section of manufacturing approach that Fig. 1 to Fig. 5 leaves for the disclosed shallow trench isolation of said one Chinese patent application file.
Please refer to Fig. 1; Semiconductor substrate 12 is provided; On said Semiconductor substrate 12, form pad oxide 12A, then on said pad oxide 12A, form silicon nitride layer, on said first hard mask layer 14, form the second hard mask layer 14B as first hard mask layer 14; On the said second hard mask layer 14B, form photoresist layer 16A, and the said photoresist layer 16A of patterning forms the opening 16B that the said second hard mask layer 14B is exposed in the bottom.
As shown in Figure 2, the second hard mask layer 14B, first hard mask layer 14 and the pad oxide 12A of the said opening 16B of etching bottom form opening 16C, and the surface of said Semiconductor substrate 12 is exposed in the bottom of said opening 16C.
As shown in Figure 3, remove said photoresist layer 16A, the Semiconductor substrate 12 of the said opening 16C of etching bottom forms groove 18 in said Semiconductor substrate 12.
As shown in Figure 4, form cushion oxide layer 20 on said groove 18 surfaces.Filling oxide layer 22 in said groove 18 is removed the said second hard mask layer 14B through cmp then and is gone up unnecessary oxide layer 22 and the said second hard mask layer 14B.
As shown in Figure 5, remove said first hard mask layer 14 through wet etching (like phosphoric acid), and remove said pad oxide 12A through hydrofluoric acid solution.
Yet; In the manufacturing approach that above-mentioned shallow trench isolation leaves; Usually can form weakness (weak point) defective in the top of the groove of the fleet plough groove isolation structure that forms; Above-mentioned wet-etching technology makes said weakness defective further worsen, and forms depression defect, shown in the fringe region 25 as shown in Figure 5.This depression defect can influence isolation effect, and the performance of semiconductor device that can cause forming descends.
Summary of the invention
The present invention provides a kind of manufacturing approach of fleet plough groove isolation structure, and method of the present invention can be avoided or reduce in the fleet plough groove isolation structure manufacture process and form the weakness defective in the groove top.
The manufacturing approach of a kind of fleet plough groove isolation structure provided by the invention comprises:
Semiconductor substrate is provided, in said Semiconductor substrate, is formed with groove;
Said groove top is carried out the oxygen gas plasma treatment process;
After said oxygen gas plasma treatment process, said groove is carried out cleaning, remove the oxide skin(coating) of said groove top;
In said groove, fill dielectric material after executing said cleaning.
Optional, also include the plasma of fluoro-gas in the oxygen gas plasma in said oxygen gas plasma treatment process.
Optional, said fluoro-gas comprises CF
4, C
2F
6, SF
6, NF
3In a kind of or the combination.
Optional, said oxygen gas plasma treatment process is a remote plasma treatment technology.
Optional, also be included in before the said wet clean process, said trenched side-wall is carried out the step of removing etch polymers.
Optional, said groove top is carried out the oxygen gas plasma treatment process after the step of removing etch polymers, carry out.
Optional, said groove top is carried out the oxygen gas plasma treatment process before the step of removing etch polymers, carry out.
Optional, the step that in said Semiconductor substrate, forms groove is following:
On said Semiconductor substrate, form pad silicon oxide layer and hard mask layer successively;
In said hard mask layer, form the pattern of definition groove, said bottom portion is exposed described pad silicon oxide layer;
Etching is removed the pad silicon oxide layer of the bottom portion of said groove, and continues the said Semiconductor substrate of etching, in said Semiconductor substrate, forms groove.
Optional; Before said groove top is carried out the oxygen gas plasma treatment process; Remove the part pad silicon oxide layer of said groove top; Said pad silicon oxide layer is shunk, with the part surface of the Semiconductor substrate of exposing said groove top towards said hard mask layer bottom.
Optional, the method for removing said part pad silicon oxide layer is the hydrofluoric acid solution etching technics.
Compared with prior art, the present invention has the following advantages:
Through the groove top is carried out the oxygen gas plasma treatment process, with oxygen gas plasma said groove top is carried out oxidation technology, form oxide; And remove said oxide through follow-up cleaning, can make groove top circular arcization; Because oxygen gas plasma has stronger activity; When using oxygen gas plasma that said slot wedge is handled, oxygen gas plasma can fully react with the Semiconductor substrate of groove top, generates oxide; And; Plasma also has the bombardment effect, and the oxide that can prune and generate at groove top sharp corner helps reaction and proceeds; Follow through after the follow-up cleaning removal silica littler, the more slick and sly circular arc edge of curvature that can form at the groove top;
The gathering that can reduce or eliminate stress of this circular arc edge; Can avoid the follow-up edge of in groove, filling dielectric process-induced damage groove on the one hand; Form the weakness defective; And then avoid forming depression defect at the fleet plough groove isolation structure top that forms, help guaranteeing or improving the performance of the semiconductor device of formation; During the semiconductor device work that also can avoid on the other hand forming, electric field top assemble and influence electrically, help the raising of stability of semiconductor device.
Description of drawings
Each step corresponding structure generalized section of the manufacturing approach that Fig. 1 to Fig. 5 leaves for existing a kind of shallow trench isolation;
Fig. 6 is the flow chart of embodiment of the manufacturing approach of fleet plough groove isolation structure of the present invention;
The generalized section of each step corresponding structure of the embodiment of the manufacturing approach of Fig. 7 to Figure 14 fleet plough groove isolation structure of the present invention.
Embodiment
Do detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.
A lot of details have been set forth in the following description so that make much of the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention does not receive the restriction of following disclosed practical implementation.
Secondly, the present invention utilizes sketch map to be described in detail, when the embodiment of the invention is detailed; For ease of explanation; The profile of expression device architecture can be disobeyed general ratio and done local the amplification, and said sketch map is instance, and it should not limit the scope of the present invention's protection at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
Fleet plough groove isolation structure is widely used in the semiconductor integrated circuit manufacturing process as the isolation structure between semiconductor device and the device.The manufacturing process of typical fleet plough groove isolation structure is on Semiconductor substrate, to form groove earlier, then in said groove, fills dielectric, promptly forms fleet plough groove isolation structure.Wherein, groove generally forms through etching technics, and its width and the degree of depth are confirmed according to the characteristic of semiconductor device; The dielectric of filling is generally the silica material, and silica and Semiconductor substrate have binding characteristic preferably, and have the good insulation effect.
The present invention provides a kind of manufacturing approach of fleet plough groove isolation structure, and comprising provides Semiconductor substrate, in said Semiconductor substrate, is formed with groove; Then, said groove top is carried out the oxygen gas plasma treatment process; Then said groove is carried out cleaning, remove the oxide skin(coating) of said groove top; Execute after the said oxygen gas plasma treatment process, in said groove, fill dielectric material.
In the above-mentioned method,, said groove top is carried out oxidation technology, form oxide with oxygen gas plasma through the groove top is carried out the oxygen gas plasma treatment process; And remove said oxide through follow-up cleaning, make groove top circular arcization.Because oxygen gas plasma has stronger activity, when using oxygen gas plasma that said slot wedge is handled, oxygen gas plasma can fully react with the Semiconductor substrate of groove top, generates oxide; And plasma also has the bombardment effect, and the oxide that can prune and generate at groove top wedge angle everywhere helps reaction and proceeds; Follow through after the follow-up cleaning removal silica littler, the more slick and sly circular arc edge of curvature that can form at the groove top.
The gathering that can reduce or eliminate stress of this circular arc edge; Can avoid the follow-up fill process of in groove, filling dielectric to damage the edge of groove on the one hand; Form the weakness defective; And then avoid forming depression defect at the fleet plough groove isolation structure top that forms, help guaranteeing or improving the performance of the semiconductor device of formation.Can reduce also on the other hand that charge carrier gathers the influence to opening feature when device is worked.Help the raising of stability of semiconductor device.
In addition; In the above-mentioned method; Said groove is carried out cleaning, when removing the oxide skin(coating) of said groove top, also can remove the natural oxidizing layer of said trenched side-wall and bottom in the lump; So that form pad silicon oxide layer at said trenched side-wall and bottom, and fill dielectric material in the groove on said pad silicon oxide layer.That is to say that the cleaning in the said method can be merged into a step with the cleaning of the nature layer of removing said trenched side-wall and bottom and carry out, and needn't carry out separately.
In addition, the oxygen gas plasma in said oxygen gas plasma treatment process can also include the plasma of fluoro-gas, and wherein, said fluoro-gas can comprise CF
4, C
2F
6, SF
6, NF
3In a kind of or the combination.
Through in oxygen gas plasma, mixing the plasma of fluoro-gas; Can improve the activity of oxygen gas plasma on the one hand; Edge to said groove top also has corrasion on the other hand, more helps forming oxide skin(coating), helps the circular arcization of groove top.
Can adjust the ratio of oxygen gas plasma and fluoro-gas plasma through the flow of adjustment oxygen and fluoro-gas, be not described in detail here.Those skilled in the art can adjust according to arts demand accordingly.
In addition, in the above-mentioned method, said oxygen gas plasma treatment process is a remote plasma treatment technology.Because in the remote plasma; Free radical in the plasma has certain distance apart from plasma discharge; When utilizing this free radical to carry out Cement Composite Treated by Plasma; Can suppress to a certain extent or reduce to be positioned at the electronics of plasma discharge region, the corrasion of ion, and strengthen the reaction of free radical.Thereby; Remote plasma treatment technology through oxygen and fluoro-gas; Help obtaining better treatment effect in the groove top; And in processing procedure, can also suppress electronics and the corrasion of ion pair trenched side-wall and bottom in the plasma, help protecting trenched side-wall and bottom.
Fig. 6 is the flow chart of embodiment of the manufacturing approach of fleet plough groove isolation structure of the present invention.
Please refer to Fig. 6, step S100 provides Semiconductor substrate, in said Semiconductor substrate, is formed with groove.
Step S110 carries out the oxygen gas plasma treatment process to said groove top.
Step S120 after said oxygen gas plasma treatment process, carries out cleaning to said groove, removes the oxide skin(coating) of said groove top.
Step S130 executes said cleaning and in said groove, fills dielectric material afterwards.
Below in conjunction with concrete embodiment the manufacturing approach of fleet plough groove isolation structure of the present invention is described in detail.Need to prove; Description to some details among the following embodiment only is schematic; It should not limit the protection range of claim improperly, and those skilled in the art can make corresponding modification, deletion and replacement under the situation that does not break away from spirit of the present invention and essence.
Please refer to Fig. 7; Semiconductor substrate 100 is provided; This Semiconductor substrate 100 can be a kind of in monocrystalline silicon, polysilicon, the amorphous silicon; Said Semiconductor substrate 100 also can be a kind of in silicon Germanium compound, the silicon gallium compound, and said Semiconductor substrate 100 can comprise silicon on epitaxial loayer or the insulating barrier (Silicon On Insulator, SOI) structure.
On said Semiconductor substrate 100, form pad oxide 110; The method that forms said pad oxide 110 can be that high temperature furnace pipe oxidation, rapid thermal oxidation, original position steam produce a kind of in the oxidizing process; Said pad oxide 110 is as the sticking and layer between hard mask layer that forms in the subsequent technique and Semiconductor substrate 100 surfaces; Be used to increase the caking property between said hard mask layer and Semiconductor substrate 100 surfaces, and the stress between said hard mask layer of balance and said Semiconductor substrate 100 surfaces.In a further embodiment, said pad oxide 110 also can form through the method for chemical vapour deposition (CVD).
Then, on said pad oxide 110, form hard mask layer 120, hard mask layer described in the present embodiment 120 is a silicon nitride; The method that forms said hard mask layer 120 can be chemical vapour deposition (CVD).Said hard mask layer 120 is on the one hand as the hard mask of etching groove in said Semiconductor substrate 100, on the other hand as the layer that stops of the cmp planarization of the dielectric material of in groove, filling.In other embodiment, said hard mask layer 120 can be a multilayer.
As shown in Figure 8, spin coating photoresist layer 130 on said hard mask layer 120, and form first opening 140 through exposure imaging technology, the surface of said hard mask layer 120 is exposed in the bottom of said first opening 140.In addition, before the said photoresist layer 130 of spin coating, can on said hard mask layer 120, form the anti-reflecting layer (not shown), said anti-reflecting layer can be an inorganic material, for example silicon oxynitride, or organic material; And then on said anti-reflecting layer, form photoresist layer 130, and exposure imaging forms first opening 140.
As shown in Figure 9, the hard mask layer 120 and the pad oxide 110 of said first opening of etching 140 bottoms form second opening 150, and the surface of said Semiconductor substrate 100 is exposed in the bottom of said second opening 150.Said etching is the anisotropic etching, for example is the plasma dry etching, and the etching gas of this plasma dry etching can be CF
4
Shown in figure 10, the Semiconductor substrate 100 of said second opening of etching 150 bottoms forms groove 160 in said Semiconductor substrate 100.The method of the said groove 160 of etching is the plasma dry etching; The etching gas that said plasma dry etching is selected for use will make the sidewall of said groove 160 comparatively smooth; Has less silicon crystal lattice defective; And make the corner, bottom of said groove 160 comparatively level and smooth, said etching gas also will make said groove 160 sidewalls have the comparatively profile of inclination, for example can be 70 to 90 degree.The etching gas of said etching can be Cl
2With the mist of HBr, or HBr and O
2And Cl
2Mist, or HBr and NF
3With mist of He etc., enumerate no longer one by one here.The degree of depth of the groove 160 that etching forms is through the time control of etching.Then, remove said photoresist layer 120.
Then, said groove 160 top are carried out the oxygen plasma treatment process, form oxide skin(coating) in said groove 160 edge top; In the present embodiment; Be silicon oxide layer, remove said oxide skin(coating) through cleaning then, make said groove 160 top circular arcizations.
Because oxygen gas plasma has stronger activity, when using oxygen gas plasma that said slot wedge is handled, oxygen gas plasma can fully react with the semiconductor substrate materials of groove 160 top, generates oxide; And plasma also has the bombardment effect, and the oxide that can prune and generate at groove 160 top wedge angles everywhere helps reaction and proceeds; Follow through after the follow-up cleaning removal silica littler, the more slick and sly circular arc edge of curvature that can form at groove 160 tops.
The gathering that can reduce or eliminate stress of this circular arc edge; Can avoid the follow-up edge of in groove 160, filling dielectric process-induced damage groove on the one hand; Form the weakness defective; And then avoid forming depression defect at the fleet plough groove isolation structure top that forms, help guaranteeing or improving the performance of the semiconductor device of formation.Can also reduce on the other hand that charge carrier gathers the influence to opening feature when device is worked.Help improving stability of semiconductor device.
In addition, in said oxygen gas plasma treatment process, can also include the plasma of fluoro-gas, wherein, said fluoro-gas can comprise CF
4, C
2F
6, SF
6, NF
3In a kind of or the combination.In the present embodiment, said fluorine-containing gas is CF
4Temperature during Cement Composite Treated by Plasma is 250 ℃.
Through in oxygen gas plasma, mixing the plasma of fluoro-gas; Can improve the activity of oxygen gas plasma on the one hand; Edge to said groove 160 tops also has corrasion on the other hand, more helps forming oxide skin(coating), helps the circular arcization of groove 160 top.
Can adjust the ratio of oxygen gas plasma and fluoro-gas plasma through the flow of adjustment oxygen and fluoro-gas, be not described in detail here.Those skilled in the art can adjust according to arts demand accordingly.
In the present embodiment, said oxygen gas plasma treatment process is a remote plasma treatment technology.Because in the remote plasma; Free radical in the plasma has certain distance apart from plasma discharge; When utilizing this free radical to carry out Cement Composite Treated by Plasma; Can suppress to a certain extent or reduce to be positioned at the electronics of plasma discharge region, the corrasion of ion, and strengthen the reaction of free radical.Thereby; Remote plasma treatment technology through oxygen and fluoro-gas; Help obtaining better treatment effect in groove 160 top; And in processing procedure, can also suppress the corrasion of electronics, ion pair groove 160 sidewalls and bottom in the plasma, help protecting groove 160 sidewalls and bottom.
In addition; In the above-mentioned method; Said groove 160 is carried out cleaning, when removing the oxide skin(coating) of said groove 160 top, also can remove the natural oxidizing layer of said groove 160 sidewalls and bottom in the lump; So that follow-up, and fill dielectric material in the groove on said pad silicon oxide layer in said groove 160 sidewalls and bottom formation pad silicon oxide layer.That is to say that the cleaning in the said method can be merged into a step with the cleaning of the nature layer of removing said trenched side-wall and bottom and carry out, and needn't carry out separately.
In addition; Before carrying out said oxygen gas plasma treatment process; Also can remove the part pad silicon oxide layer 110 of said groove 160 top earlier; Said pad silicon oxide layer 110 is shunk towards said hard mask layer 120 bottoms, with the part surface of the Semiconductor substrate of exposing said groove 160 top, shown in figure 11.Wherein said etching technics can be the wet etching of hydrofluoric acid solution.
Through etched portions pad silicon oxide layer 110; The part surface of the Semiconductor substrate of said groove 160 top is exposed; And then carry out described oxygen gas plasma treatment process and cleaning, help the better effects if of said groove 160 top circular arcizations.
In addition; Before said wet clean process; Can also comprise the step of removing the polymer that etching produces, wherein, polymer mainly is the polymer of etching etching agent and photoresist generation when forming said groove 160; This polymer can influence follow-up technology and carry out attached to the sidewall of said groove 160.Remove described polymer through the sulfuric acid solution cleaning in the present embodiment, certainly, also can use other technology to remove said polymer, do not enumerating one by one here.
Wherein, describedly groove 160 top are carried out the oxygen gas plasma treatment process can after the step of removing etch polymers, carry out, also can before execution.
Then, please refer to Figure 12, generate laying 180 on said groove 160 surfaces with thermal oxidation method.
Please refer to Figure 13, deposition medium material in said groove 160 and on the said hard mask layer 120, said dielectric material can be silica or silicon oxynitride.Medium described in the present embodiment is a silica material.The method that deposits said dielectric material can be a high density plasma CVD.It also can be other depositing operation.
Because the edge that said groove 160 tops have circular arcization, so in the technology of carrying out metallization medium layer, the etching technics in the high density plasma CVD technology can not cause damage to said groove top, can avoid the weakness defective.
Then, remove said hard mask layer 120 surfaces through chemical mechanical milling tech and go up unnecessary dielectric material, in said groove 160, form dielectric layer 190.
Please refer to Figure 14, remove said hard mask layer 120 and pad oxide 110 through wet etching.
The wet etching solution of removing said hard mask layer 120 can be phosphoric acid solution; Removing said pad oxide 110 wet etching solution can be hydrofluoric acid solution.
Because in the above-mentioned step said groove 160 top being carried out oxygen gas plasma handles; Can avoid forming the weakness defective in groove 160 top; Thereby after removing said hard mask layer 120 and pad oxide 110; The fleet plough groove isolation structure top that can avoid being formed on formation forms depression defect, helps improving the performance of the semiconductor device of formation.
Though the present invention with preferred embodiment openly as above; But it is not to be used for limiting the present invention; Any those skilled in the art are not breaking away from the spirit and scope of the present invention; Can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (9)
1. the manufacturing approach of a fleet plough groove isolation structure is characterized in that, comprising:
Semiconductor substrate is provided, in said Semiconductor substrate, is formed with groove;
Said groove top is carried out the oxygen gas plasma treatment process; Also include the plasma of fluoro-gas in the oxygen gas plasma in said oxygen gas plasma treatment process; To improve the active of said oxygen gas plasma and said groove top is carried out etching, to help the circular arcization of said groove top;
After said oxygen gas plasma treatment process, said groove is carried out cleaning, remove the oxide skin(coating) of said groove top;
In said groove, fill dielectric material after executing said cleaning.
2. the manufacturing approach of fleet plough groove isolation structure as claimed in claim 1 is characterized in that:
Said fluoro-gas comprises CF
4, C
2F
6, SF
6, NF
3In a kind of or the combination.
3. according to claim 1 or claim 2 the manufacturing approach of fleet plough groove isolation structure, it is characterized in that: said oxygen gas plasma treatment process is a remote plasma treatment technology.
4. the manufacturing approach of fleet plough groove isolation structure as claimed in claim 1 is characterized in that:
Also be included in before the said cleaning, said trenched side-wall carried out the step of removing etch polymers.
5. the manufacturing approach of fleet plough groove isolation structure as claimed in claim 4 is characterized in that:
Said groove top is carried out the oxygen gas plasma treatment process to be carried out after the step of removing etch polymers.
6. the manufacturing approach of fleet plough groove isolation structure as claimed in claim 4 is characterized in that:
Said groove top is carried out the oxygen gas plasma treatment process to be carried out before the step of removing etch polymers.
7. the manufacturing approach of fleet plough groove isolation structure as claimed in claim 1 is characterized in that: the step that in said Semiconductor substrate, forms groove is following:
On said Semiconductor substrate, form pad silicon oxide layer and hard mask layer successively;
In said hard mask layer, form the pattern of definition groove, said bottom portion is exposed described pad silicon oxide layer;
Etching is removed the pad silicon oxide layer of the bottom portion of said groove, and continues the said Semiconductor substrate of etching, in said Semiconductor substrate, forms groove.
8. the manufacturing approach of fleet plough groove isolation structure as claimed in claim 7 is characterized in that:
Said the groove top is carried out the oxidation plasma treatment process before; Remove the part pad silicon oxide layer of said groove top; Said pad silicon oxide layer is shunk, with the part surface of the Semiconductor substrate of exposing said groove top towards said hard mask layer bottom.
9. the manufacturing approach of fleet plough groove isolation structure as claimed in claim 8 is characterized in that:
The method of removing said part pad silicon oxide layer is the hydrofluoric acid solution etching technics.
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Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103137483B (en) * | 2011-11-30 | 2015-08-19 | 上海华虹宏力半导体制造有限公司 | A kind of method eliminating sharp corner at top end of groove |
| CN104143522B (en) * | 2013-05-09 | 2017-05-24 | 中芯国际集成电路制造(上海)有限公司 | Shallow trench forming method |
| CN104347377B (en) * | 2013-08-07 | 2018-03-30 | 中芯国际集成电路制造(上海)有限公司 | The forming method of NMOS metal gate transistors |
| CN103871841A (en) * | 2014-03-19 | 2014-06-18 | 武汉新芯集成电路制造有限公司 | Device isolation groove surface repairing method |
| CN105097695B (en) * | 2014-05-22 | 2018-08-21 | 中芯国际集成电路制造(上海)有限公司 | A kind of semiconductor devices and its manufacturing method, electronic device |
| CN104103569A (en) * | 2014-07-25 | 2014-10-15 | 上海华力微电子有限公司 | Forming method of shallow groove isolation structure |
| CN105448820B (en) * | 2014-09-02 | 2018-07-20 | 中芯国际集成电路制造(上海)有限公司 | Form the method and semiconductor devices of active area |
| CN109411404A (en) * | 2018-10-31 | 2019-03-01 | 武汉新芯集成电路制造有限公司 | Fleet plough groove isolation structure and its manufacturing method and semiconductor devices |
| CN112563190A (en) * | 2020-12-09 | 2021-03-26 | 广州粤芯半导体技术有限公司 | Method for forming shallow trench isolation structure |
| CN113651292B (en) * | 2021-10-21 | 2022-01-28 | 绍兴中芯集成电路制造股份有限公司 | Method for forming film layer in cavity and method for manufacturing electronic device |
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| US6541382B1 (en) * | 2000-04-17 | 2003-04-01 | Taiwan Semiconductor Manufacturing Company | Lining and corner rounding method for shallow trench isolation |
| CN101075574A (en) * | 2007-06-12 | 2007-11-21 | 上海宏力半导体制造有限公司 | Method for producing shallow groove isolating structure of high-voltage assembly |
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| US6541382B1 (en) * | 2000-04-17 | 2003-04-01 | Taiwan Semiconductor Manufacturing Company | Lining and corner rounding method for shallow trench isolation |
| CN101075574A (en) * | 2007-06-12 | 2007-11-21 | 上海宏力半导体制造有限公司 | Method for producing shallow groove isolating structure of high-voltage assembly |
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