CN103033736B - 测试多集成电路器件的方法及装置 - Google Patents

测试多集成电路器件的方法及装置 Download PDF

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Publication number
CN103033736B
CN103033736B CN201210349012.6A CN201210349012A CN103033736B CN 103033736 B CN103033736 B CN 103033736B CN 201210349012 A CN201210349012 A CN 201210349012A CN 103033736 B CN103033736 B CN 103033736B
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China
Prior art keywords
test
signal
controller
integrated circuit
interconnected body
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Expired - Fee Related
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CN201210349012.6A
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English (en)
Chinese (zh)
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CN103033736A (zh
Inventor
M·E·斯坦雷
J·S·瓦卡罗
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NXP USA Inc
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Freescale Semiconductor Inc
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318555—Control logic
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572—Input/Output interfaces
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
    • G01R31/318513—Test of Multi-Chip-Moduls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
CN201210349012.6A 2011-09-30 2012-09-19 测试多集成电路器件的方法及装置 Expired - Fee Related CN103033736B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/250,368 US9110142B2 (en) 2011-09-30 2011-09-30 Methods and apparatus for testing multiple-IC devices
US13/250,368 2011-09-30

Publications (2)

Publication Number Publication Date
CN103033736A CN103033736A (zh) 2013-04-10
CN103033736B true CN103033736B (zh) 2017-05-03

Family

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Family Applications (1)

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CN201210349012.6A Expired - Fee Related CN103033736B (zh) 2011-09-30 2012-09-19 测试多集成电路器件的方法及装置

Country Status (4)

Country Link
US (1) US9110142B2 (enExample)
EP (2) EP2574945B1 (enExample)
JP (2) JP6233948B2 (enExample)
CN (1) CN103033736B (enExample)

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US9213063B2 (en) * 2014-03-26 2015-12-15 Freescale Semiconductor, Inc. Reset generation circuit for scan mode exit
US9772376B1 (en) * 2016-04-29 2017-09-26 Texas Instruments Incorporated Increase data transfer throughput by enabling dynamic JTAG test mode entry and sharing of all JTAG pins
US9791505B1 (en) * 2016-04-29 2017-10-17 Texas Instruments Incorporated Full pad coverage boundary scan
CN106230431B (zh) * 2016-08-04 2019-05-14 浪潮电子信息产业股份有限公司 一种引脚复用方法及cpld芯片
CN106443408B (zh) * 2016-08-30 2019-06-14 无锡华润矽科微电子有限公司 实现单端口多功能复用的用于集成电路测试的电路结构
CN106844285B (zh) * 2017-01-20 2020-11-03 中颖电子股份有限公司 一种mcu芯片架构系统
CN109406902B (zh) * 2018-11-28 2021-03-19 中科曙光信息产业成都有限公司 逻辑扫描老化测试系统
CN109581197A (zh) * 2018-12-28 2019-04-05 中国电子科技集团公司第五十八研究所 一种基于JTAG接口的SiP封装用测试系统
CN110347139A (zh) * 2019-05-22 2019-10-18 苏州浪潮智能科技有限公司 一种i2c总线的测试治具
CN112578272A (zh) * 2019-09-30 2021-03-30 深圳市中兴微电子技术有限公司 一种jtag控制装置及实现jtag控制的方法
JP7310629B2 (ja) * 2020-01-31 2023-07-19 富士通株式会社 リセット制御回路およびリセット制御回路によるリセット方法
US11199582B2 (en) * 2020-04-06 2021-12-14 Xilinx, Inc. Implementing a JTAG device chain in multi-die integrated circuit
CN111752780B (zh) * 2020-06-12 2023-03-21 苏州浪潮智能科技有限公司 一种服务器jtag部件自适应互连系统、方法
CN111966077A (zh) * 2020-08-13 2020-11-20 格力电器（合肥）有限公司 测试设备及测试方法
CN112526327B (zh) * 2020-10-28 2022-07-08 深圳市紫光同创电子有限公司 边界扫描测试方法及存储介质
CN114253184B (zh) * 2021-11-29 2025-01-03 山东云海国创云计算装备产业创新中心有限公司 一种jtag控制装置
CN114597195A (zh) * 2022-03-02 2022-06-07 上海壁仞智能科技有限公司 多芯片系统以及多芯片系统的操作方法
US12092690B2 (en) * 2022-12-31 2024-09-17 Siliconch Systems Pvt Ltd Emulation of JTAG/SCAN test interface protocols using SPI communication device
US20240331461A1 (en) * 2023-03-27 2024-10-03 B/E Aerospace, Inc. Universal communication node
TWI881599B (zh) * 2023-12-14 2025-04-21 英業達股份有限公司 提供不同類型連接介面的通用檢測系統及其方法

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US5768289A (en) * 1997-05-22 1998-06-16 Intel Corporation Dynamically controlling the number of boundary-scan cells in a boundary-scan path
US6125464A (en) * 1997-10-16 2000-09-26 Adaptec, Inc. High speed boundary scan design
CN101065679A (zh) * 2004-11-22 2007-10-31 飞思卡尔半导体公司 集成电路及用于测试多tap集成电路的方法
CN101228451A (zh) * 2005-07-22 2008-07-23 Nxp股份有限公司 可测试集成电路，系统级封装和测试指令集
CN101432699A (zh) * 2006-04-26 2009-05-13 德克萨斯仪器股份有限公司 在多个处理器/核的测试与调试进程期间控制电源、时钟和复位的装置和方法

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JP3659772B2 (ja) * 1997-08-07 2005-06-15 三菱自動車工業株式会社 バッテリの劣化判定装置
US6115836A (en) * 1997-09-17 2000-09-05 Cypress Semiconductor Corporation Scan path circuitry for programming a variable clock pulse width
JP3980827B2 (ja) * 2000-03-10 2007-09-26 株式会社ルネサステクノロジ 半導体集積回路装置および製造方法
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US7346821B2 (en) * 2003-08-28 2008-03-18 Texas Instrument Incorporated IC with JTAG port, linking module, and off-chip TAP interface
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US7490231B2 (en) * 2004-07-23 2009-02-10 Broadcom Corporation Method and system for blocking data in scan registers from being shifted out of a device
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US7552360B2 (en) * 2005-03-21 2009-06-23 Texas Instruments Incorporated Debug and test system with format select register circuitry
ATE436029T1 (de) * 2005-10-26 2009-07-15 Nxp Bv Analog-ic mit testanordnung und testverfahren für ein solches ic
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US8275977B2 (en) * 2009-04-08 2012-09-25 Freescale Semiconductor, Inc. Debug signaling in a multiple processor data processing system
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US5768289A (en) * 1997-05-22 1998-06-16 Intel Corporation Dynamically controlling the number of boundary-scan cells in a boundary-scan path
US6125464A (en) * 1997-10-16 2000-09-26 Adaptec, Inc. High speed boundary scan design
CN101065679A (zh) * 2004-11-22 2007-10-31 飞思卡尔半导体公司 集成电路及用于测试多tap集成电路的方法
CN101228451A (zh) * 2005-07-22 2008-07-23 Nxp股份有限公司 可测试集成电路，系统级封装和测试指令集
CN101432699A (zh) * 2006-04-26 2009-05-13 德克萨斯仪器股份有限公司 在多个处理器/核的测试与调试进程期间控制电源、时钟和复位的装置和方法

Also Published As

Publication number Publication date
US20130085704A1 (en) 2013-04-04
JP6233948B2 (ja) 2017-11-22
EP2574945A1 (en) 2013-04-03
US9110142B2 (en) 2015-08-18
CN103033736A (zh) 2013-04-10
EP2687861A1 (en) 2014-01-22
JP2013079941A (ja) 2013-05-02
JP2017194483A (ja) 2017-10-26
EP2574945B1 (en) 2015-06-03

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