CN102916662A - 功率放大器 - Google Patents

功率放大器 Download PDF

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CN102916662A
CN102916662A CN2012102748681A CN201210274868A CN102916662A CN 102916662 A CN102916662 A CN 102916662A CN 2012102748681 A CN2012102748681 A CN 2012102748681A CN 201210274868 A CN201210274868 A CN 201210274868A CN 102916662 A CN102916662 A CN 102916662A
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drain pad
semiconductor substrate
power amplifier
ion implanted
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CN102916662B (zh
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三轮真一
塚原良洋
金谷康
小坂尚希
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Murata Manufacturing Co Ltd
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Abstract

本发明涉及功率放大器，其目的在于提供一种对吸收振荡功率的电阻的电阻值能容易地进行控制的功率放大器。本申请发明的功率放大器（10）具备：半导体基板（12），形成有多个晶体管单元；该多个晶体管单元的漏极电极（40），形成在该半导体基板上；漏极焊盘（42），在该半导体基板上以与该漏极电极连接的方式形成；离子注入电阻（44），在该半导体基板以沿着该漏极焊盘与该漏极焊盘相接的方式形成；浮动电极（46），在该半导体基板上以经由该离子注入电阻与该漏极焊盘相接的方式形成；输出匹配电路（16），形成在该半导体基板的外部；以及布线（18a，18b，18c，18d），连接该漏极焊盘和该输出匹配电路。

Description

功率放大器
技术领域
本发明涉及对例如在移动通信中使用的高频信号等进行放大的功率放大器。
背景技术
专利文献1所公开的功率放大器具备具有多个场效应晶体管（FET）的芯片。为了抑制在芯片上形成闭合环路的振荡（环路振荡），在芯片内在该闭合环路中并列地形成有电阻体。该电阻体由利用外延层形成的电阻（以下，称为外延电阻）而形成。
专利文献
专利文献1：日本特开2001-148616号公报。
非专利文献
非专利文献1：W. Struble and A. Plazker, “A Rigorous Yet Simple Method For Determining Stability of Linear N-port Networks,” IEEE GaAsICSymp. Dig., pp. 251-254, 1993.
非专利文献2：S. Mons, et al. “A Unified Approach for Linear and Nonlinear Stability Analysis of Microwave Circuits Using Commercially Available Tools,” IEEE Trans. Microwave Theory and Tech. vol. MTT-47, no. 12, pp. 2403-2409, 1999.
发明要解决的课题
为了吸收环路振荡的振荡功率来抑制环路振荡，优选前述的电阻体的电阻值为数欧姆～数十欧姆左右。可是，在专利文献1所公开的功率放大器中，由于以外延电阻形成电阻体，所以存在难以控制电阻体的电阻值的问题。
发明内容
本发明是为了解决上述那样的课题而完成的，其目的在于提供一种对吸收振荡功率的电阻的电阻值能容易地进行控制的功率放大器。
本申请发明的功率放大器的特征在于，具备：半导体基板，形成有多个晶体管单元；该多个晶体管单元的漏极电极，形成在该半导体基板上；漏极焊盘，在该半导体基板上以与该漏极电极连接的方式形成；离子注入电阻，在该半导体基板以沿着该漏极焊盘与该漏极焊盘相接的方式形成；浮动电极，在该半导体基板上以经由该离子注入电阻与该漏极焊盘相接的方式形成；输出匹配电路，形成在该半导体基板的外部；以及布线，连接该漏极焊盘和该输出匹配电路。
根据本发明，由于对闭合环路连接离子注入电阻，所以对吸收振荡功率的电阻的电阻值能容易地进行控制。
附图说明
图1是本发明的实施方式1的功率放大器的电路图。
图2是表示本发明实施方式1的半导体基板和输出匹配电路的平面图。
图3是图2的III-III虚线的剖面向示图。
图4是表示以奈奎斯特判别法模拟了有无环路振荡的结果的图。
图5是表示本发明实施方式2的半导体基板和输出匹配电路的平面图。
图6是表示本发明实施方式3的半导体基板和输出匹配电路的平面图。
图7是表示本发明实施方式4的半导体基板和输出匹配电路的平面图。
具体实施方式
实施方式1.
图1是本发明实施方式1的功率放大器的电路图。功率放大器10具备半导体基板12。半导体基板12是以GaN形成的芯片。在半导体基板12形成有多个晶体管单元。多个晶体管单元是指第一晶体管单元12a、与第一晶体管单元12a相邻的第二晶体管单元12b、与第二晶体管单元12b相邻的第三晶体管单元12c、以及与第三晶体管单元12c相邻的第四晶体管单元12d。多个晶体管单元12a、12b、12c、12d以场效应晶体管（FET）形成。为了一边维持功率放大器10的高频特性一边得到高输出，多个晶体管单元12a、12b、12c、12d并联地连接在功率放大器的输入输出之间。
在多个晶体管单元12a、12b、12c、12d的栅极侧连接有输入匹配电路14。输入匹配电路14形成在半导体基板12的外部。在多个晶体管单元12a、12b、12c、12d的漏极侧连接有输出匹配电路16。输出匹配电路16形成在半导体基板12的外部。
图2是表示本发明实施方式1的半导体基板和输出匹配电路的平面图。在半导体基板12上形成有栅极RF焊盘20。栅极RF焊盘20连接于栅极引出电极22。栅极引出电极22连接于栅极馈电部（gate feed portion）24。在栅极馈电部24形成有梳齿状的栅极梳状物（gate finger）26。
在半导体基板12上以夹着栅极RF焊盘20的方式形成有源极焊盘30。在源极焊盘30连接有梳齿状的源极电极32。在半导体基板12上形成有多个晶体管单元12a、12b、12c、12d的漏极电极40。漏极电极40呈梳齿状地形成。由漏极电极40、栅极梳状物26、以及源极电极32构成晶体管单元的电极。在半导体基板12上形成有与漏极电极40连接的漏极焊盘42。漏极焊盘42以具有长尺寸方向和短尺寸方向的方式细长地形成。沿着漏极焊盘42的长尺寸方向连接有漏极电极40。多个晶体管单元12a、12b、12c、12d的全部漏极电极40与1个漏极焊盘42连接。
在半导体基板12以沿着漏极焊盘42的长尺寸方向与漏极焊盘42相接的方式形成有离子注入电阻44。离子注入电阻44是通过将杂质离子注入于半导体基板12并实施热处理而形成的。离子注入电阻44对在半导体基板12上引起环路振荡的闭合环路并联地附加数欧姆～数十欧姆左右的电阻值的电阻。
在半导体基板12上以经由离子注入电阻44与漏极焊盘42相接的方式形成有浮动（floating）电极46。由此，离子注入电阻44沿着长尺寸方向被漏极焊盘42和浮动电极46夹住。
输出匹配电路16具备焊盘16a。漏极焊盘42和焊盘16a用接合线18a、18b、18c、18d连接。图3是图2的III-III虚线的剖面向示图。在图3中示出了在半导体基板12形成的离子注入电阻44与漏极焊盘42相接的情况。本发明实施方式1的功率放大器具备上述的结构。
由于在半导体基板12上形成的晶体管单元的数量越多，在接近的晶体管单元间会形成越多闭合环路，所以越容易产生环路振荡。可是，根据本发明实施方式1的功率放大器10，在半导体基板12上在引起环路振荡的闭合环路中并列地形成离子注入电阻44。因此，使离子注入电阻44作为晶体管单元间的并联电阻而发挥作用，能抑制在半导体基板12上产生的所有的模式的环路振荡。再有，有时将在晶体管单元间形成的电阻称为隔离（isolation）电阻。
而且，由于通过离子注入量、离子注入能量等能容易地控制离子注入电阻44的电阻值，所以能容易地实现环路振荡抑制所需要的数欧姆～数十欧姆左右的电阻值。特别是在作为半导体基板12而使用GaN等的外延薄层电阻高的材料的情况下，能容易地形成具有数欧姆～数十欧姆左右的电阻值的电阻。此外，由于接合线18a、18b、18c、18d跨越离子注入电阻44连接，所以能避免离子注入电阻44对功率放大器10的增益、输出等的各特性的影响。
图4是表示以奈奎斯特判别法模拟了有无环路振荡的结果的图。奈奎斯特判别法是在Polar图上描绘在各频率的晶体管的返回比（环路增益），并根据该轨迹是否与负的实轴具有交点来判别有无振荡的方法（参照非专利文献1、2）。图4A表示不具有本发明实施方式1的离子注入电阻44的功率放大器的模拟结果。在该情况下的返回比的轨迹在7.6GHz附近与负的实轴具有交点，部分地满足振荡条件。
图4B表示在形成有本发明实施方式1的离子注入电阻44的情况下的模拟结果。在该情况下的返回比的轨迹在全部频率与负的实轴不相交。即，利用离子注入电阻44能吸收环路振荡的振荡功率。再有，这些模拟是针对并列形成有32个晶体管单元的半导体基板而实施的。
在本发明实施方式1的功率放大器10中，虽然晶体管单元以FET形成，但是以双极晶体管等其它的晶体管形成也可。此外，虽然半导体基板12以GaN形成，但是以例如GaAs等其它材料形成也可。将接合线18a、18b、18c、18d替换成在电连接中使用的其它布线也可。
实施方式2.
由于本发明实施方式2的功率放大器与本发明实施方式1的功率放大器的共同点较多，所以以与本发明实施方式1的功率放大器的不同点为中心进行说明。图5是表示本发明实施方式2的半导体基板和输出匹配电路的平面图。
在半导体基板12以经由浮动电极46与离子注入电阻44相接的方式形成有追加离子注入电阻50。追加离子注入电阻50是通过将杂质离子注入于半导体基板12并实施热处理而形成的。
在半导体基板12上以经由追加离子注入电阻50与浮动电极46相接的方式形成有追加浮动电极52。而且，漏极焊盘42和浮动电极46以接合线60、62、64、66连接。
在本发明实施方式1的功率放大器的情况下，在形成了离子注入电阻之后不能改变在闭合环路中并联连接的电阻的电阻值。可是，根据本发明实施方式2的功率放大器，在形成了离子注入电阻之后也能变更在闭合环路中并联连接的电阻的电阻值。即，能根据有无接合线60、62、64、66来实现2种电阻值。再有，本发明实施方式2的功率放大器能进行至少与本发明实施方式1相同程度的变形。
实施方式3.
由于本发明实施方式3的功率放大器与本发明实施方式1的功率放大器的共同点较多，所以以与本发明实施方式1的功率放大器的不同点为中心进行说明。图6是表示本发明实施方式3的半导体基板和输出匹配电路的平面图。
本发明实施方式3的功率放大器的特征在于，针对每个晶体管单元具有独立的漏极焊盘。本发明实施方式3的功率放大器具有第一漏极焊盘70。第一漏极焊盘70是第一晶体管单元12a的漏极焊盘。在第一漏极焊盘70的旁边，与其分离地形成有第二漏极焊盘72。第二漏极焊盘72是第二晶体管单元12b的漏极焊盘。在第二漏极焊盘72的旁边，与第一第二漏极焊盘70、72分离地形成有第三漏极焊盘74。第三漏极焊盘74是第三晶体管单元12c的漏极焊盘。在第三漏极焊盘74的旁边，与第一～第三漏极焊盘70、72、74分离地形成有第四漏极焊盘76。第四漏极焊盘76是第四晶体管单元12d的漏极焊盘。
第一～第四漏极焊盘70、72、74、76仅经由离子注入电阻44连接。例如，第一漏极焊盘70和第二漏极焊盘72不直接接触而是经由离子注入电阻44连接。
根据本发明实施方式3的功率放大器，第一～第四漏极焊盘70、72、74、76仅经由离子注入电阻44连接。由此，在形成引起环路振荡的闭合环路的漏极焊盘和其它的漏极焊盘之间串联连接离子注入电阻44。因此，使离子注入电阻44作为隔离电阻而发挥作用，能抑制环路振荡。在本发明实施方式3的功率放大器中，虽然针对每个晶体管单元形成了独立的漏极焊盘，但是针对每多个晶体管单元形成1个漏极焊盘也可。再有，本发明实施方式3的功率放大器能进行至少与本发明实施方式1相同程度的变形。
实施方式4.
由于本发明实施方式4的功率放大器与本发明实施方式3的功率放大器的共同点较多，所以以与本发明实施方式3的功率放大器的不同点为中心进行说明。图7是表示本发明实施方式4的半导体基板和输出匹配电路的平面图。
本发明实施方式4的功率放大器的特征在于，离子注入电阻80延伸至第一漏极焊盘70和第二漏极焊盘72之间、第二漏极焊盘72和第三漏极焊盘74之间、以及第三漏极焊盘74和第四漏极焊盘76之间。
根据本发明实施方式4的功率放大器，由于离子注入电阻80延伸至漏极焊盘之间，所以容易控制漏极焊盘间的电阻值。此外，通过变更漏极焊盘和与其相邻的漏极焊盘的间隔，从而能容易地控制漏极焊盘间的电阻值。再有，本发明实施方式4的功率放大器能进行至少与本发明实施方式1相同程度的变形。
附图标记的说明：
10 功率放大器、12 半导体基板、12a，12b，12c，12d 晶体管单元、14 输入匹配电路、16 输出匹配电路、18 接合线、18a，18b，18c，18d 接合线、20 栅极RF焊盘、26 栅极梳状物、30 源极焊盘、40 漏极电极、42 漏极焊盘、44 离子注入电阻、46 浮动电极。

Claims (5)

1.一种功率放大器，其特征在于，具备：
半导体基板，形成有多个晶体管单元；
所述多个晶体管单元的漏极电极，形成在所述半导体基板上；
漏极焊盘，在所述半导体基板上以与所述漏极电极连接的方式形成；
离子注入电阻，在所述半导体基板以沿着所述漏极焊盘与所述漏极焊盘相接的方式形成；
浮动电极，在所述半导体基板上以经由所述离子注入电阻与所述漏极焊盘相接的方式形成；
输出匹配电路，形成在所述半导体基板的外部；以及
布线，连接所述漏极焊盘和所述输出匹配电路。
2.根据权利要求1所述的功率放大器，其特征在于，具备：
追加离子注入电阻，在所述半导体基板以经由所述浮动电极与所述离子注入电阻相接的方式形成；以及
追加浮动电极，在所述半导体基板上以经由所述追加离子注入电阻与所述浮动电极相接的方式形成。
3.根据权利要求1所述的功率放大器，其特征在于，
所述多个晶体管单元具有第一晶体管单元和与所述第一晶体管单元相邻的第二晶体管单元，
所述漏极焊盘具有作为所述第一晶体管单元的漏极焊盘的第一漏极焊盘和作为所述第二晶体管单元的漏极焊盘的与所述第一漏极焊盘分离形成的第二漏极焊盘，
所述第一漏极焊盘和所述第二漏极焊盘经由所述离子注入电阻连接。
4.根据权利要求3所述的功率放大器，其特征在于，所述离子注入电阻以延伸至所述第一漏极焊盘和所述第二漏极焊盘之间的方式形成。
5.根据权利要求1至4的任一项所述的功率放大器，其特征在于，所述半导体基板以GaN形成。
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