CN102903691A - 半导体器件、封装方法和结构 - Google Patents

半导体器件、封装方法和结构 Download PDF

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Publication number
CN102903691A
CN102903691A CN2012102328789A CN201210232878A CN102903691A CN 102903691 A CN102903691 A CN 102903691A CN 2012102328789 A CN2012102328789 A CN 2012102328789A CN 201210232878 A CN201210232878 A CN 201210232878A CN 102903691 A CN102903691 A CN 102903691A
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China
Prior art keywords
integrated circuit
circuit lead
substrate
separator
central area
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CN2012102328789A
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CN102903691B (zh
Inventor
陈煜仁
曾明鸿
赖怡仁
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

公开了半导体器件、封装方法和结构。在一个实施例中，一种半导体器件包括：具有表面的集成电路管芯，该表面具有外围区域和中心区域。多个凸块被设置在外围区域中的集成电路管芯的表面上。隔离件被设置在中心区域中的集成电路管芯的表面上。

Description

半导体器件、封装方法和结构
技术领域
本发明涉及半导体领域，更具体地，本发明涉及一种半导体器件、封装方法和结构。
背景技术
半导体器件用在各种电子应用中，例如，个人计算机、手机、数码相机、以及其他电子设备。通常通过在半导体衬底上方顺序沉积材料的绝缘层或介电层、导电层、以及半导体层，并且使用光刻法图案化各种材料层来制造半导体器件，从而形成电路组件和其上的元件。
半导体工业通过不断减小最小部件尺寸继续改善各种电子元件(例如，晶体管、二极管、电阻器、电容器等)的集成密度，从而允许更多元件集成在给定区域中。在一些应用中，这些更小的电子元件也需要更小的封装件，而这些更小的封装件利用了比过去的封装件更小的面积。
一种半导体封装件的较小类型为倒装芯片(FC)球栅阵列(BGA)封装件，其中，将半导体管芯倒装置于衬底上并且使用微凸块将半导体管芯接合至衬底。衬底具有经过引线布线，从而将位于管芯上的微凸块连接至位于衬底上的接触焊盘，衬底上的该接触焊盘具有较大的器件封装件。在衬底的相反面上形成焊料球的阵列，并且用于将封装管芯电连接至终端应用。
然而，一些FC-BGA封装件趋于呈现弯曲，其中，诸如温度应变期间的工艺期间产生衬底变形。这种弯曲导致可靠性问题和微凸块的接合破裂。
因此，本领域中亟需改善半导体器件的封装技术。
发明内容
为了解决现有技术中所存在的问题，根据本发明的一个方面，提供了一种半导体器件，包括：集成电路管芯，所述集成电路管芯包括表面，所述表面具有外围区域和中心区域；多个凸块，被设置在所述外围区域中的所述集成电路管芯的所述表面上；以及隔离件，被设置在所述中心区域中的所述集成电路管芯的所述表面上。
在该半导体器件中，所述多个凸块具有第一厚度，其中，所述隔离件具有第二厚度，所述第二厚度基本上等于或小于所述第一厚度。
在该半导体器件中，所述隔离件通过粘合剂与所述集成电路管芯相连接。
在该半导体器件中，所述隔离件与所述多个凸块间隔开约10μm或更大。
在该半导体器件中，所述多个凸块包括多个金属钉状件。
根据本发明的另一方面，提供了一种半导体器件的封装件，所述封装件包括：衬底，所述衬底具有第一表面和与所述第一表面相对的第二表面，在所述衬底的俯视图中，所述衬底具有外围区域、中心区域、以及被设置在所述外围区域和所述中心区域之间的中间区域；多个接合焊盘，被设置在所述中间区域中的所述衬底的所述第一表面上；隔离件，被设置在所述中心区域中的所述衬底的所述第一表面上；多个接触焊盘，被设置在所述外围区域中的所述衬底的所述第二表面上；以及多个电连接件，被设置在所述衬底中，其中，所述多个电连接件被设置在所述多个接触焊盘和所述多个接合焊盘之间，并将所述多个接触焊盘与所述多个接合焊盘电连接。
在该封装件中，所述隔离件具有约50μm或者更小的厚度。
在该封装件中，所述隔离件通过粘合剂与所述衬底相连接。
在该封装件中，所述衬底包括倒装芯片球栅阵列(FC-BGA)封装件、倒装芯片芯片级封装件(FC-CSP)、或者触点栅格阵列(LGA)封装件。
在该封装件中，进一步包括：多个焊球，与所述多个接触焊盘相连接。
在该封装件中，进一步包括：集成电路管芯，所述集成电路管芯包括第三表面，所述第三表面具有第二外围区域和第二中心区域；多个凸块，被设置在所述第二外围区域中的所述集成电路管芯的所述第三表面上；其中，所述衬底与所述集成电路管芯的所述多个凸块相连接；以及所述隔离件，被设置所述衬底和所述集成电路管芯之间靠近所述集成电路管芯的所述第二中心区域。
在该封装件中，所述隔离件包含硅。
在该封装件中，所述隔离件所包含的材料与焊料掩模材料相同，所述焊料掩模材料用于在所述集成电路管芯的所述第三表面上形成所述多个凸块或在所述衬底上形成多个焊球。
在该封装件中，所述隔离件包括主要物质和硬化剂。
在该封装件中，所述主要物质选自基本上由丙烯酸树脂、诸如二氧化硅的填充剂、光引发剂、着色颜料、环氧树脂硬化剂、添加剂、有机溶剂、以及其组合所构成的组。
在该封装件中，所述硬化剂含有选自基本上由诸如丙烯酸树脂的树脂、丙烯酸单体、环氧树脂、填充剂、有机溶剂、以及其组合所构成的组的材料。
在该封装件中，所述隔离件包含B级环氧树脂。
根据本发明的又一方面，提供了一种封装半导体器件的方法，所述方法包括：提供衬底，所述衬底具有中心区域；提供集成电路管芯，所述集成电路管芯具有外围区域和中心区域，所述集成电路管芯包括被设置在所述外围区域中的所述集成电路管芯的表面上的多个凸块；在所述衬底的中心区域和所述集成电路管芯的中心区域之间形成隔离件；将所述集成电路管芯与所述衬底电连接；在所述集成电路管芯上方形成底部填充材料；在所述集成电路管芯上方、所述底部填充材料上方、和所述衬底上方形成模塑料；以及在所述衬底上形成多个焊球。
在该方法中，形成所述隔离件包括：将单个隔离件与所述集成电路管芯相连接，将单个隔离件与所述衬底相连接，或者将第一隔离件与所述集成电路管芯相连接并将第二隔离件与所述衬底相连接。
在该方法中，提供所述集成电路管芯包括：提供集成电路管芯，其中，被设置在所述外围区域中的所述集成电路管芯的表面上的所述多个凸块包括：多个微凸块。
附图说明
为了更好地理解本发明及其优点，现在将结合附图所进行的以下描述作为参考，其中：
图1至图5示出了根据本发明的实施例的封装集成电路管芯的方法的横截面图，其中，隔离件被附接至位于管芯的中心区域中的管芯；
图6示出了包括管芯的凸块区域和隔离件的图5的一部分的更详细的横截面图；
图7示出了根据另一个实施例的封装集成电路管芯的方法的横截面图，其中，隔离件被附接至位于衬底的中心区域中的封装件的衬底；
图8示出了另一个实施例，其中，隔离件形成在集成电路管芯和衬底上；
图9示出了在衬底的接触焊盘上形成焊料球之后的经过封装的半导体器件的横截面图；
图10示出了将集成电路管芯附接至衬底之后的经过封装的半导体器件的俯视图。
除非另有说明，否则不同附图中的相应数字和标号通常指的是相应部件。为了清晰示出实施例的相关方面，绘制附图，并且这些附图没有必要按比例绘制。
具体实施方式
下面，详细讨论本发明的实施例的制造和使用。然而，应该理解，本发明提供了许多可以在各种具体环境中实现的可应用的发明概念。所讨论的具体实施例仅仅示出制造和使用本发明的具体方式，而不用于限制本发明的范围。
本发明的实施例通常涉及半导体器件，更具体地来说，涉及集成电路封装。公开了新型封装半导体器件，其中，在封装工艺、热循环期间，将隔离件用于防止封装件的衬底和半导体管芯的弯曲，并且在终端应用中，使用封装的半导体器件。增大了管芯厚度或者封装件的衬底的厚度，使用隔离件填充在衬底和管芯之间的区域(本文要进一步描述的)。
图1至图5示出了根据本发明的实施例封装集成电路管芯100的方法的横截面图。首先，参考图1，提供了集成电路管芯100。集成电路管芯100可以包括未示出的多个电路和形成在其上的电元件。先前，已经在半导体晶圆(未示出)上制造了集成电路管芯100，该半导体晶圆包括诸如硅或其它半导体的半导体材料，并且例如，沿划片槽切割从而形成多个单管芯100。集成电路管芯100具有表面，其中，外围区域132接近管芯100的边缘(例如，接近管芯100的周围)。集成电路管芯100表面还具有设置在外围区域132内的中心区域134。在俯视图中，集成电路管芯100可以包括正方形或矩形形状(在图1中未示出；参见图10)。本文中，例如，集成电路管芯100还称作管芯或半导体器件。
集成电路管芯100包括形成在其表面上的多个凸块102/104。在一些实施例中，例如，凸块102/104包括微凸块。凸块102/104在管芯100的外围区域132中形成，并且该凸块102/104在外围区域132中被配置为一行或多行。作为实例，在图1至图6的集成电路管芯100的每个侧面上，将凸块102/104配置为3行。每个凸块102/104都可以包括金属钉状件(metalstud)102，该金属钉状件可以包含铜、铜合金、或者其他金属，并且在金属钉状件102上方形成焊料104。可选地，凸块102/104可以包含其他材料。
根据本发明的实施例，使用隔离件增大位于中心区域134中的集成电路管芯100的厚度。如图2所示，将隔离件106连接或附接至位于集成电路管芯100的中心区域134中的集成电路管芯100。隔离件106包括约小于或等于凸块102/104的高度的厚度(本文中要进一步描述的)。在一些实施例中，隔离件106可以包括约50μm或者更小的厚度，但是可选地，隔离件106可以包括其他尺寸。
在一些实施例中，隔离件106所包含的材料与集成电路管芯100相同或相似。例如，隔离件106可以包括伪管芯，该伪管芯由硅、锗、或者构成集成电路管芯100的其他半导体材料组成。在其他实施例中，隔离件106所包含的材料与焊料掩模的材料相同或相似，将该焊料掩模材料用于封装半导体器件的另一工艺步骤。例如，可以将焊料掩模材料用于形成凸块102/104，例如，在形成凸块102/104时，掩盖(mask)集成电路管芯100的一部分，或者在衬底110上形成焊球128(参见图9和图10)时，掩盖衬底110的一部分。包含焊料掩模材料的隔离件106可以包括一种或多种主要物质(主要试剂、主剂，main agent)。例如，主要物质可以包括以下物质中的一种或多种：丙烯酸树脂、诸如二氧化硅的填充剂、光引发剂、着色颜料、环氧树脂硬化剂、添加剂、和/或有机溶剂。包含焊料掩模材料的隔离件106还可以包含硬化剂。硬化剂可以包括以下材料中的一种或多种：诸如丙烯酸树脂的树脂、丙烯酸单体、环氧树脂、填充剂、和/或有机溶剂。在其他实施例中，隔离件106可以包含B级环氧树脂材料。B级环氧树脂材料可以包括在某些热固化树脂的反应的中间阶段，其中，该B级环氧树脂材料当加热时材料变软，并且当与某些液体接触时膨胀，但是不会完全熔化或溶解。例如，未固化的热固化系统的树脂通常在该阶段。可选地，隔离件106可以包括其他材料；本文所列举的材料仅为实例。
使用粘合剂108将隔离件106附接至集成电路管芯100。在一些实施例中，例如，粘合剂108可以包含：胶水(glue)、聚合物、环氧树脂、膜、或多层、或者其组合。粘合剂108还可以包含其他材料。
接下来，如图3所示，提供了衬底110。例如，衬底110可以包括：具有约100μm的厚度的陶瓷、塑料、和/或有机材料，但是可选地，衬底110可以包括其他材料和尺寸。衬底110包括集成电路管芯100的封装件。衬底110具有第一表面，例如，在图3中的表面的顶面。衬底110还具有与第一表面相对的第二表面。第二表面包括在图3中的底面。在衬底110的俯视图(参见图10)中，衬底具有中心区域138、外围区域140、以及设置在外围区域140和中心区域138之间的中间区域142。衬底110可以包括倒装芯片球栅阵列(FC-BGA)封装件、倒装芯片芯片级封装件(FC-CSP)、或者触点栅格阵列(LGA)封装的衬底，但是可选地，可以使用其他类型的衬底。
将多个接合焊盘126设置在位于中间区域142中的衬底110的第一表面上。接合焊盘126适用于连接至集成电路管芯100的凸块102/104。多个接触焊盘129被设置在位于外围区域140中的衬底110的第二表面上。接触焊盘129适用于连接多个焊球128(在图3中未示出；参见图9)。
在附图中未示出，多个电连接件被设置在衬底110中。多个电连接件被设置在衬底110的多个接触焊盘129和多个接合焊盘126之间，并电连接衬底的该多个接触焊盘129和多个接合126焊盘。例如，电连接件可以包括：通过光刻法形成在衬底110中的或者形成与衬底110的表面附近的电引线的迹线。例如，电连接件可以包含：铜、铝、其他金属、或多层或者其组合。多个电连接件可以包括形成在衬底110中的再分布层(RDL)(未示出)，例如，在一些实施例中，位于衬底110的表面附近。RDL可以包括引线的扇出(fan-out)区域。集成电路管芯可以电连接至衬底100的RDL。衬底110可以连接至RDL的可选的凸块下金属(UBM)结构(也没有示出；参见在图6中所示的类似的管芯100的UBM 124)。例如，可选的UBM可以便于将焊球128(参见图9和图10)连接至衬底110。
如图3所示，将衬底110附接至集成电路管芯100。例如，使用焊料工艺、焊料回流工艺、和/或热压接合将集成电路管芯100的凸块102/104连接至衬底110的接合焊盘126。可选地，可以使用其他方法将集成电路管芯100接合至衬底110。
如图4中所示，在集成电路管芯100上方形成底部填充材料112。例如，底部填充材料112可以包含：填充剂、环氧树脂、硬化剂、或多层或者其组合，但是可选地，底部填充材料112可以包含其他材料。如图5所示，在集成电路、底部填充材料112、以及衬底110的上方形成复合材料114。例如，复合材料可以包含环氧树脂、填充剂、有机材料、或多层或者其组合，但是复合材料114还可以包含其他材料。例如，复合材料114可以在集成电路管芯的顶面上方延伸约10μm或者更多。如果集成电路管芯100较大，则可以使用大量复合材料114，从而在一些实施例中，为封装件提供了更强的强度(robustness)。
图6示出了包括管芯100的凸块结构和隔离件110的图5的一部分的更详细的横截面图。在图6中示出了管芯100的外围区域132的一部分和管芯100的中心区域134的一部分，和衬底110的中间区域142的一部分和中心区域138的一部分。
管芯100包括工件101，工件101包含硅或其他半导体材料。在工件101的上方形成绝缘材料120和122以及导线118。例如，导线118可以电连接在凸块102/104和工件101的电元件之间。在一些实施例中，例如，导线118可以包括铝焊盘，但是可以使用其他金属。如所示，凸块102/104可以包括可选的金属盖(metal cap)116，该金属盖被设置在金属钉状件102和焊料凸块104之间。例如，金属盖116可以包含镍和其他金属。可选地，在管芯100的导线118上方形成球下金属(UBM)124结构。
凸块102/104/116可以包括尺寸d1的高度(在附图中的垂直方向上)或者厚度，其中，在一些实施例中，尺寸d1可以包括约50μm或者更小。例如，凸块102/104/116可以包括约35μm的宽度，并且例如，可以具有约60μm的凸块102/104/116之间的间距(pitch)或距离。隔离件106包括在垂直方向上的尺寸d2的厚度，例如，该垂直方向上的尺寸厚度基本上等于或者小于尺寸d1。隔离件110与最近凸块102/104/116横向间隔开尺寸d3，在一些实施例中，尺寸d3可以包括约10μm或者更小。可选地，尺寸d1、d2、d3和凸块102/104/116的宽度和间距可以包括其他尺寸。
集成电路管芯100的中心区域134基本上与衬底110的中心区域138的对准。例如，在本发明的一些实施例中，隔离件106基本上被填充在集成电路管芯100的中心区域134和衬底110的中心区域138之间。
图7示出了根据另一个实施例的封装集成电路管芯100的方法的横截面图。在该实施例中，将隔离件106附接至位于衬底110的中心区域138中的封装件的衬底110。将相同的数字用于在图7中的各个元件，将图7中的各个元件用于描述图1至图6，并且为了避免重复，本文中没有再次详细描述在图7中所示的每个参考数字。例如，隔离件106所包含的材料可以与图2中所描述的隔离件106的材料相似。
在该实施例中，使用附接在中心区域138中的隔离件106增大衬底110的厚度。如所示，将隔离件106设置在位于中心区域138中的衬底110的第一表面(例如，顶面)上。然后，如在之前实施例中所描述的，将集成电路管芯100的凸块102/104连接至衬底110的接合焊盘126，并且完成集成电路管芯100的封装，形成在图5中所示的封装的半导体器件130。
图8示出了另一个实施例，其中，在集成电路管芯100上形成第一隔离件106a，并且在衬底110上形成第二隔离件106b。通过粘合剂108a和108b将每个隔离件106a和106b分别粘合(glue)至管芯100和衬底110。隔离件106a和106b的总高度或总厚度约小于或等于位于衬底110和管芯100之间的间隔，例如，尺寸d1包括如结合图6所描述的凸块102/104的高度。
图9示出了在衬底110的接触焊盘129上形成了焊球128之后封装半导体器件130的横截面图。然后，可以使用焊球128将封装的半导体器件130附接至另一器件、印刷电路板(PCB)、或者另一终端应用(endapplication)。
图10示出了在将集成电路管芯100附接至衬底110之后，封装的半导体器件130的俯视图。以位于衬底110下方的虚拟件(phantom)示出了管芯100和隔离件106。示出了焊球128和凸块102/104的可能布局；然而，可选地，位于衬底110上的焊球128和位于集成电路管芯100上的凸块102/104的布局可能包括根据本发明的实施例的各种其他配置。
本发明的实施例的优点包括提供新型封装技术，该新型封装技术由于使用了设置在管芯100和衬底110之间的隔离件106、106a、106b而增加了可靠性和较高的成品率。封装件提供了微间距的管芯100的高输入/输出(I/O)，具有低功耗，和较低的电阻/电容(R/C)延迟。由于分别在管芯100的中心区域134和衬底110的中心区域138之间存在隔离件106、106a、以及106b，因此通过本文所描述的本发明的实施例降低或去除了在可靠性测试期间的弯曲效应和热应力。降低或去除了凸块102/104的连接的断裂和封装件(该封装件可以包括低介电常数(k)材料层)的各个材料层的分层，改善了可靠性。优选地，隔离件106、106a、以及106b的存在便于在封装工艺期间将管芯100与衬底110对准。隔离件106、106a、以及106b改善了附接至衬底110的管芯100的直立高度的控制，并且改善了底部填充材料112的填充。在制造和封装工艺流程中容易实施半导体器件100的新型封装方法。
本发明的实施例包括：半导体器件或管芯100，具有形成在中心区域134中的隔离件106；以及衬底110，具有形成在中心区域138中的隔离件106。本发明的实施例包括：封装本文中所描述的半导体器件或管芯100的方法，并且还包括经过封装的半导体器件130，该经过封装的半导体器件使用本文中所描述的方法和材料进行封装。
在一个实施例中，一种半导体器件包括：具有表面的集成电路管芯，该集成电路管芯的表面具有外围区域和中心区域。多个凸块被设置在外围区域中的集成电路管芯的表面上。隔离件被设置在中心区域中的集成电路管芯的表面上。
在另一个实施例中，一种半导体器件的封装件包括：衬底，该衬底具有第一表面和与第一表面相对的第二表面。在俯视图中，衬底包括外围区域、中心区域、以及设置在外围区域和中心区域之间的中间区域。多个接合焊盘被设置在位于中间区域中的衬底的第一表面上，并且隔离件被设置在位于中心区域中的衬底的第一表面上。多个接触焊盘被设置在外围区域中的衬底的第二表面上。多个电连接件被设置在衬底中。多个电连接件被设置在多个接触焊盘和多个接合焊盘之间，并且将多个接触焊盘与多个接合焊盘电连接。
在又一个实施例中，一种封装半导体器件包括：集成电路管芯，该集成电路管芯具有表面，该表面具有外围区域和中心区域。多个凸块被设置在外围区域中的集成电路管芯的表面上。衬底与集成电路管芯的多个凸块相连接。隔离件被设置在在衬底和集成电路管芯之间的靠近集成电路管芯的中心区域的位置上。多个焊球被设置在衬底的表面上。
在另一个实施例中，一种封装半导体衬底的方法包括：提供具有中心区域的衬底。提供集成电路管芯，该集成电路管芯具有外围区域和中心区域。集成电路管芯具有多个凸块，该多个凸块被设置在外围区域中的该集成电路的表面上。在衬底的中心区域和集成电路管芯之间形成隔离件，并且将集成电路管芯与衬底电连接。在集成电路管芯上方形成底部填充材料，并且在集成电路管芯、底部填充材料、以及衬底的上方形成模塑料。在衬底上形成多个焊球。
尽管已经详细地描述了本发明的实施例及其优势，但应该理解，可以在不背离所附权利要求限定的本发明主旨和范围的情况下，做各种不同的改变，替换和更改。例如，本领域技术人员应该容易理解，本文中所述的多个部件、功能、工艺、以及材料可以改变，同时保持在本发明的范围内。而且，本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。作为本领域普通技术人员应理解，通过本发明的公开，现有的或今后开发的用于执行与本文所述相应实施例基本相同的功能或获得基本相同结果的工艺、机器、制造，材料组分、装置、方法或步骤根据本发明可以被使用。因此，所附权利要求应该包括在这样的工艺、机器、制造、材料组分、装置、方法或步骤的范围内。

Claims (10)

1.一种半导体器件，包括：
集成电路管芯，所述集成电路管芯包括表面，所述表面具有外围区域和中心区域；
多个凸块，被设置在所述外围区域中的所述集成电路管芯的所述表面上；以及
隔离件，被设置在所述中心区域中的所述集成电路管芯的所述表面上。
2.根据权利要求1所述的半导体器件，其中，所述多个凸块具有第一厚度，其中，所述隔离件具有第二厚度，所述第二厚度基本上等于或小于所述第一厚度，或者
其中，所述隔离件通过粘合剂与所述集成电路管芯相连接，或者
其中，所述隔离件与所述多个凸块间隔开约10μm或更大，或者
其中，所述多个凸块包括多个金属钉状件。
3.一种半导体器件的封装件，所述封装件包括：
衬底，所述衬底具有第一表面和与所述第一表面相对的第二表面，在所述衬底的俯视图中，所述衬底具有外围区域、中心区域、以及被设置在所述外围区域和所述中心区域之间的中间区域；
多个接合焊盘，被设置在所述中间区域中的所述衬底的所述第一表面上；
隔离件，被设置在所述中心区域中的所述衬底的所述第一表面上；
多个接触焊盘，被设置在所述外围区域中的所述衬底的所述第二表面上；以及
多个电连接件，被设置在所述衬底中，其中，所述多个电连接件被设置在所述多个接触焊盘和所述多个接合焊盘之间，并将所述多个接触焊盘与所述多个接合焊盘电连接。
4.根据权利要求3所述的封装件，其中，所述隔离件具有约50μm或者更小的厚度，或者
其中，所述隔离件通过粘合剂与所述衬底相连接，或者
其中，所述衬底包括倒装芯片球栅阵列(FC-BGA)封装件、倒装芯片芯片级封装件(FC-CSP)、或者触点栅格阵列(LGA)封装件，或者
进一步包括：多个焊球，与所述多个接触焊盘相连接。
5.根据权利要求3所述的封装件，进一步包括：
集成电路管芯，所述集成电路管芯包括第三表面，所述第三表面具有第二外围区域和第二中心区域；
多个凸块，被设置在所述第二外围区域中的所述集成电路管芯的所述第三表面上；其中，
所述衬底与所述集成电路管芯的所述多个凸块相连接；以及
所述隔离件，被设置所述衬底和所述集成电路管芯之间靠近所述集成电路管芯的所述第二中心区域。
6.根据权利要求5所述的封装件，其中，所述隔离件包含硅，或者
其中，所述隔离件所包含的材料与焊料掩模材料相同，所述焊料掩模材料用于在所述集成电路管芯的所述第三表面上形成所述多个凸块或在所述衬底上形成多个焊球，或者
其中，所述隔离件包含B级环氧树脂。
7.根据权利要求5所述的封装件，其中，所述隔离件包括主要物质和硬化剂。
8.根据权利要求7所述的封装件，其中，所述主要物质选自基本上由丙烯酸树脂、诸如二氧化硅的填充剂、光引发剂、着色颜料、环氧树脂硬化剂、添加剂、有机溶剂、以及其组合所构成的组，或者
其中，所述硬化剂含有选自基本上由诸如丙烯酸树脂的树脂、丙烯酸单体、环氧树脂、填充剂、有机溶剂、以及其组合所构成的组的材料。
9.一种封装半导体器件的方法，所述方法包括：
提供衬底，所述衬底具有中心区域；
提供集成电路管芯，所述集成电路管芯具有外围区域和中心区域，所述集成电路管芯包括被设置在所述外围区域中的所述集成电路管芯的表面上的多个凸块；
在所述衬底的中心区域和所述集成电路管芯的中心区域之间形成隔离件；
将所述集成电路管芯与所述衬底电连接；
在所述集成电路管芯上方形成底部填充材料；
在所述集成电路管芯上方、所述底部填充材料上方、和所述衬底上方形成模塑料；以及
在所述衬底上形成多个焊球。
10.根据权利要求9所述的方法，其中，形成所述隔离件包括：将单个隔离件与所述集成电路管芯相连接，将单个隔离件与所述衬底相连接，或者将第一隔离件与所述集成电路管芯相连接并将第二隔离件与所述衬底相连接，或者
其中，提供所述集成电路管芯包括：提供集成电路管芯，其中，被设置在所述外围区域中的所述集成电路管芯的表面上的所述多个凸块包括：多个微凸块。
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