CN103794568A - 集成电路底部填充方案 - Google Patents

集成电路底部填充方案 Download PDF

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Publication number
CN103794568A
CN103794568A CN201310071559.9A CN201310071559A CN103794568A CN 103794568 A CN103794568 A CN 103794568A CN 201310071559 A CN201310071559 A CN 201310071559A CN 103794568 A CN103794568 A CN 103794568A
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China
Prior art keywords
substrate
solder projection
depression
bottom filler
integrated circuit
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CN201310071559.9A
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CN103794568B (zh
Inventor
梁世纬
吕俊麟
吴凯强
杨青峰
刘明凯
缪佳君
王彦评
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Publication of CN103794568A publication Critical patent/CN103794568A/zh
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Abstract

一种集成电路，包括在顶面上方具有至少一个凹陷的衬底。至少一个焊料凸块设置在衬底上方。管芯设置在至少一个焊料凸块上方并通过至少一个焊料凸块与衬底电连接。底部填充物环绕至少一个焊料凸块并形成在衬底和管芯之间。至少一个凹陷设置在底部填充物周围以使来自底部填充物的任意溢出物保留在至少一个凹陷中。本发明还提供了集成电路底部填充方案。

Description

集成电路底部填充方案
优先权
本申请要求于2012年10月30日提交的名称为“Integrated CircuitUnderfill Scheme”的美国临时专利申请第61/720,266号的利益，其全部内容结合于此作为参考。
技术领域
本公开总的来说涉及集成电路，更具体地，涉及底部填充方案。
背景技术
在一些集成电路封装中，底部填充材料用于填充芯片和通过焊料凸块将该芯片安装在其上的衬底之间的空间。底部填充物保护焊料凸块免受湿气或其他环境危害，并为组件提供附加机械强度而且补偿芯片和衬底之间的热膨胀差异。然而，底部填充材料能够溢出目标区域并且溢出物会污染衬底上方的用于焊料凸块的叠层封装件(PoP)焊盘。一些封装件在底部填充物外面使用阻挡材料(damming material)阻止溢出，从而导致附加成本以及因柔软的液态阻挡材料和工具公差产生的较低的宽度/高度控制精度。
发明内容
为了解决现有技术中所存在的缺陷，根据本发明的一方面，提供了一种集成电路，包括：衬底，在其顶面上具有至少一个凹陷；至少一个焊料凸块，设置在所述衬底上方；管芯，设置在所述至少一个焊料凸块上方并通过所述至少一个焊料凸块与所述衬底电连接；以及底部填充物，环绕所述至少一个焊料凸块并形成在所述衬底和所述管芯之间，其中，所述至少一个凹陷被设置在所述底部填充物周围以使来自所述底部填充物的任意溢出物保留在所述至少一个凹陷中。
在该集成电路中，所述至少一个凹陷形成环绕所述底部填充物的互连通道。
在该集成电路中，多个凹陷散布在所述底部填充物周围。
在该集成电路中，所述至少一个凹陷具有矩形、圆形、椭圆形或它们的任意组合。
在该集成电路中，所述至少一个焊料凸块是微焊料凸块。
该集成电路进一步包括至少一个球栅阵列(BGA)焊料凸块，在所述底部填充物的外侧被设置在所述衬底上方。
该集成电路进一步包括顶部封装件，设置在所述至少一个BGA焊料凸块的上方并通过所述至少一个BGA焊料凸块与所述衬底电连接。
该集成电路进一步包括位于所述衬底下方的至少一个BGA焊料凸块。
在该集成电路中，所述衬底是中介片。
该集成电路进一步包括底部衬底，设置在所述至少一个BGA焊料凸块的下方并通过所述至少一个BGA焊料凸块与所述衬底电连接。
在该集成电路中，所述底部衬底是印刷电路板(PCB)。
根据本发明的另一方面，提供了一种方法，包括：在衬底的顶面上形成至少一个凹陷；形成设置在所述衬底上方的至少一个焊料凸块；将管芯安装在所述至少一个焊料凸块和所述衬底上方；以及在所述衬底和所述管芯之间形成底部填充物，其中，所述至少一个凹陷被设置在所述底部填充物周围以使来自所述底部填充物的任意溢出物保留在所述至少一个凹陷中。
在该方法中，在所述衬底的顶面上形成至少一个凹陷包括：在所述衬底上方形成钝化层并在所述钝化层中光刻限定所述至少一个凹陷。
在该方法中，在所述衬底和所述管芯之间形成底部填充物包括：将处于流体状态的所述底部填充物施加在所述管芯和所述衬底之间并固化所述底部填充物。
在该方法中，在施加工艺期间，多余的底部填充材料流入所述至少一个凹陷。
该方法进一步包括在所述底部填充物的外侧形成设置在所述衬底上方的至少一个球栅阵列(BGA)焊料凸块。
该方法进一步包括将顶部封装件安装在所述至少一个BGA焊料凸块和所述管芯上方。
该方法进一步包括利用所述衬底和底部衬底之间的至少一个BGA焊料凸块将所述衬底安装在所述底部衬底上方。
根据本发明的又一方面，提供了一种集成电路，包括：衬底，在其顶面上具有多个凹陷；至少一个微焊料凸块，设置在所述衬底上方；管芯，设置在所述至少一个微焊料凸块上方并通过所述至少一个微焊料凸块与所述衬底电连接；底部填充物，环绕所述至少一个微焊料凸块并形成在所述衬底和所述管芯之间；以及至少一个球栅阵列(BGA)焊料凸块，在所述底部填充物的外侧被设置在所述衬底上方，其中，所述多个凹陷散布在所述底部填充物周围以使来自所述底部填充物的任意溢出物保留在至少一个凹陷中。
在该集成电路中，所述多个凹陷至少部分地填充有所述底部填充物。
附图说明
现在将结合附图所进行的以下描述作为参考，其中：
图1是根据一些实施例的示例性集成电路底部填充方案的示意图；
图2A至图2B是根据一些实施例的图1中的集成电路底部填充方案的衬底的示意图；
图3是根据一些实施例的制造图1中的集成电路底部填充方案的方法的流程图。
具体实施方式
以下详细讨论了各种实施例的制造和使用。然而，应该理解，本公开提供了许多可以在各种具体环境中实现的可应用的创造性概念。所讨论的具体实施例仅用于制造和使用本发明的具体方式的说明，并且没有限定本公开的范围。
此外，本公开可能在各种示例中重复参考数字和/或字母。这种重复只是为了简明和清楚的目的并且其本身并不指定各个实施例和/或所讨论的结构之间的关系。而且，在随后的本公开内容中，一个部件位于另一个部件上、一个部件与另一个部件的连接和/或一个部件耦合至另一个部件的形成包括其中以直接接触的方式形成部件的实施例，并且也可包括其中额外的部件形成在部件之间使得部件不直接接触的实施例。另外，空间相对位置的术语，例如“下方”、“上方”、“水平”、“垂直”、“在...之上”、“在...上方”、“在...之下”、“在...下方”、“向上”、“向下”、“顶部”、“底部”等及其派生词(例如，“水平地”、“向下地”、“向上地”等)是用于简化本公开中一个部件和另一个部件的关系。这些空间相对位置术语为了表示具有这些部件的器件的不同方位。
图1是根据一些实施例的示例性集成电路100的底部填充方案的示意图。集成电路100包括顶部集成电路封装件(“顶部封装件”)102、底部集成电路封装件(“底部封装件”)104、用于球栅阵列(BGA)封装的焊料凸块(焊球)106和110以及诸如印刷电路板(PCB)的底部衬底112。在该示例中，顶部封装件102包括在倒装芯片封装件中的集成电路管芯116，使用顶部衬底114上的一些焊盘120将管芯116电连接至顶部衬底114的接合引线118。模塑料130封装管芯116和接合引线118。接合引线118和焊盘120可以包括铝、铜、金或任意其他合适的导电材料。
底部封装件104包括衬底122和使用用于电连接的诸如微焊料凸块(C4凸块)的焊料凸块126安装在衬底122上方的管芯124。衬底122具有形成在衬底122的顶面上的凹陷108。凹陷108(一个或多个)设置在底部填充物128周围以使来自底部填充物128的任意溢出物保留在凹陷108中。
在一些实施例中，凹陷108具有矩形、圆形、椭圆形、任意其他形状或它们的任意组合。例如，可以通过光刻工艺在形成在衬底122的表面上的诸如二氧化硅、氮化硅或聚合物的钝化层中形成凹陷108。在一些实施例中，凹陷108的深度在1μm至5μm的范围内并且该凹陷具有可变的宽度和长度。在一些示例中，凹陷108和管芯124之间的距离具有小于1mm的距离。
底部填充物128(例如，环氧树脂混合物)环绕焊料凸块126并填充衬底122和管芯124之间的间隙。在一些实施例中，例如，如图2A至图2B所示，凹陷108形成环绕底部填充物128的通道和/或多个凹陷108分布在底部填充物128周围。
BGA焊料凸块106在底部填充物128外侧被设置在衬底122上方并且将设置在BGA焊料凸块106上方的顶部封装件102与衬底122电连接。BGA焊料凸块10设置在衬底122下方并且将衬底122与底部衬底112电连接。在一些实施例中，衬底122是中介片和/或底部衬底112是PCB。诸如再分布层的金属表面121提供用于焊料凸块106和110的电连接件。
焊料凸块106和110可以包括SAC405、SAC105、其他基于SnCu的材料或任意其他合适的材料。顶部衬底114和衬底122可以包括有机材料、Si中介片或任意其他合适的材料。
在一个实施例中，顶部封装件102具有约500μm的厚度和约12×12mm的大小，顶部衬底114具有约175μm的厚度(和大约12×12mm的大小)，衬底122具有约250μm的厚度(和约12×12mm的大小)，管芯124和底部填充物128的组合厚度为约190μm，以及焊料凸块(BGA球)106和110的直径为约240μm。
凹陷108防止底部填充物128溢出目标区域外侧以阻止自底部填充物128的任意溢出物污染其他非目标区域，如在衬底122上方的焊料凸块106区(PoP焊盘区)。凹陷108储存来自底部填充物128的任意溢出物。与诸如在衬底122上方形成附加底部填充物阻挡结构的一些其他底部填充方案相比，可以以相对较低成本和较少工艺步骤来实现具有用于底部填充物溢出控制的凹陷108的集成电路100。
图2A至图2B是根据一些实施例的图1中的集成电路100的底部填充方案的衬底122的示意图。在图2A中，凹陷108形成环绕底部填充物128区的互连通道。凹陷108防止环绕焊料凸块126(例如，用于倒装芯片封装的微焊料凸块)的底部填充物128的任意溢出物溢出到其他非目标区域，诸如焊料凸块106区(例如，PoP焊盘区中的BGA焊料凸块)。
在图2B中，多个凹陷108散布在底部填充物128的周围。凹陷108防止环绕焊料凸块126(例如，用于倒装芯片封装的微焊料凸块)的底部填充物128的任意溢出物溢出到其他非目标区域，诸如焊料凸块106区(例如，PoP焊盘区中的BGA焊料凸块)。在一些实施例中，凹陷108具有矩形、圆形、椭圆形、任意其他形状或它们的任意组合。
图3是根据一些实施例制造图1中的集成电路100的底部填充方案的方法的流程图。在步骤302中，至少一个凹陷形成在衬底的顶面上。衬底可以包括有机材料、Si中介片或任意其他合适的材料。凹陷可以形成互连的通道和/或具有矩形、圆形、椭圆形、任意其他形状或它们的任意组合。
可以通过光刻工艺在形成在衬底表面上的诸如二氧化硅、氮化硅或聚合物的钝化层中形成凹陷。例如，可以使用掩模并暴露在紫外线(UV)光下显影光刻胶图案。在一些实施例中，凹陷的深度在1μm至5μm的范围内并且具有可变的宽度和长度。
在步骤304中，至少一个焊料凸块形成在衬底上方。焊料凸块可以以包括蒸发、电镀、印刷、喷射、柱形凸块以及直接放置的多种方式形成或放置在衬底上方。焊料凸块可以包括SAC405、SAC105、其他基于SnCu的材料或任意其他合适的材料。
在步骤306中，在至少一个焊料凸块和衬底上方安装管芯。在一些示例中，凹陷和管芯之间的距离小于1mm。
在步骤308中，在衬底和管芯之间形成底部填充物，其中，至少一个凹陷设置在底部填充物周围以使来自底部填充物的任意溢出物保留在至少一个凹陷中。在一些实施例中，沿着管芯的一个或两个边缘针涂(needle-dispense)底部填充物。底部填充物可以包括聚合物材料和二氧化硅填充剂，或任意其他合适的非导电材料。底部填充物保护焊料凸块免受湿气或其他环境危害，并为封装组件提供附加机械强度。此外，底部填充物可以有助于补偿管芯和衬底之间的任意热膨胀差以防止焊料凸块电连接的断裂或损坏。
在各种实施例中，至少一个球栅阵列(BGA)焊料凸块形成在底部填充物外侧的衬底上方。顶部封装件安装在至少一个BGA焊料凸块和管芯上方。利用在衬底和底部衬底之间的至少一个BGA焊料凸块，衬底被安装在底部衬底上方。在一些实施例中，底部衬底是PCB板。
根据一些实施例，集成电路包括在顶面上方具有至少一个凹陷的衬底。至少一个焊料凸块设置在衬底上方。管芯设置在至少一个焊料凸块上方并通过至少一个焊料凸块与衬底电连接。底部填充物环绕至少一个焊料凸块并形成在衬底和管芯之间。至少一个凹陷设置在底部填充物周围以使来自底部填充物的任意溢出物保留在至少一个凹陷中。
根据一些实施例，方法包括将至少一个凹陷形成在衬底的顶面上。至少一个焊料凸块形成在衬底上方。管芯被安装在至少一个焊料凸块和衬底上方。底部填充物形成在衬底和管芯之间。至少一个凹陷设置在底部填充物周围以使来自底部填充物的任意溢出物保留在至少一个凹陷中。
本领域技术人员应该理解，可以有许多本公开的实施例的变型例。尽管已经详细地描述了本实施例及其特征，但应该理解，可以在不背离本实施例主旨和范围的情况下，做各种不同的改变、替换和更改。而且，本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。作为本领域普通技术人员应理解，通过本发明，现有的或今后开发的用于执行与根据本发明所采用的所述相应实施例基本相同的功能或获得基本相同结果的工艺、机器、制造、材料组分、装置、方法或步骤根据本发明可以被使用。
以上方法实施例示出了示例性步骤，但是没有必要按照所示顺序实施。根据本发明的实施例的主旨和范围，可以适当地增加，替换，改变顺序和/或删除步骤。结合不同权利要求和/或不同实施例的实施例在本发明的范围内并且对本领域技术人员而言在阅读本公开之后是显而易见的。

Claims (10)

1.一种集成电路，包括：
衬底，在其顶面上具有至少一个凹陷；
至少一个焊料凸块，设置在所述衬底上方；
管芯，设置在所述至少一个焊料凸块上方并通过所述至少一个焊料凸块与所述衬底电连接；以及
底部填充物，环绕所述至少一个焊料凸块并形成在所述衬底和所述管芯之间，
其中，所述至少一个凹陷被设置在所述底部填充物周围以使来自所述底部填充物的任意溢出物保留在所述至少一个凹陷中。
2.根据权利要求1所述的集成电路，其中，所述至少一个凹陷形成环绕所述底部填充物的互连通道。
3.根据权利要求1所述的集成电路，其中，多个凹陷散布在所述底部填充物周围。
4.根据权利要求1所述的集成电路，其中，所述至少一个凹陷具有矩形、圆形、椭圆形或它们的任意组合。
5.根据权利要求1所述的集成电路，其中，所述至少一个焊料凸块是微焊料凸块。
6.根据权利要求5所述的集成电路，进一步包括至少一个球栅阵列(BGA)焊料凸块，在所述底部填充物的外侧被设置在所述衬底上方。
7.根据权利要求6所述的集成电路，进一步包括顶部封装件，设置在所述至少一个BGA焊料凸块的上方并通过所述至少一个BGA焊料凸块与所述衬底电连接。
8.根据权利要求1所述的集成电路，进一步包括位于所述衬底下方的至少一个BGA焊料凸块。
9.一种方法，包括：
在衬底的顶面上形成至少一个凹陷；
形成设置在所述衬底上方的至少一个焊料凸块；
将管芯安装在所述至少一个焊料凸块和所述衬底上方；以及
在所述衬底和所述管芯之间形成底部填充物，其中，所述至少一个凹陷被设置在所述底部填充物周围以使来自所述底部填充物的任意溢出物保留在所述至少一个凹陷中。
10.一种集成电路，包括：
衬底，在其顶面上具有多个凹陷；
至少一个微焊料凸块，设置在所述衬底上方；
管芯，设置在所述至少一个微焊料凸块上方并通过所述至少一个微焊料凸块与所述衬底电连接；
底部填充物，环绕所述至少一个微焊料凸块并形成在所述衬底和所述管芯之间；以及
至少一个球栅阵列(BGA)焊料凸块，在所述底部填充物的外侧被设置在所述衬底上方，
其中，所述多个凹陷散布在所述底部填充物周围以使来自所述底部填充物的任意溢出物保留在至少一个凹陷中。
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