CN102779761A - 用于封装半导体管芯的引线框架和方法 - Google Patents
用于封装半导体管芯的引线框架和方法 Download PDFInfo
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Abstract
在一个实施例中,提供了一种封装半导体管芯的方法。将具有管芯焊盘以及一个或多个引线焊盘的引线框架放置(502)在组装表面上。所述管芯焊盘具有位于所述组装表面上的底部部分(202),在所述底部之上并且从所述底部侧向延伸的上部部分(204),以及从所述管芯焊盘的上部部分延伸并且支撑所述上部部分的支撑臂(208)。将半导体管芯(206)引线结合(504)到所述管芯焊盘上部部分的上表面。将所述半导体管芯引线结合(506)到所述一个或者多个引线焊盘(210)。将所述半导体管芯和引线框架包裹(508)在封装材料(802)中。所述封装材料填充所述管芯焊盘的上部部分与所述组装表面之间的空间。去除(512)所述支撑臂位于切割道中的部分。
Description
技术领域
本发明涉及一种用于封装半导体管芯的引线框架和方法。
背景技术
在半导体封装行业中,一个主要趋势是采用表面组装技术(SMT)作为传统镀通孔(PTH)技术的替代。SMT提供了一些与PTH技术相比显著的优势,诸如更大的封装密度、具有较短互连长度的更高的引线数(lead count)以及更容易的自动化。由于SMT要求电子器件和部件可安装在印制电路板(PCB)或者衬底的表面上,因此不得不重新设计传统的通孔部件(包括电容器、电阻器和电感器)的材料和结构,以便满足短、薄、轻、小电子器件的现代要求。实现这些目标的半导体器件的示例包括方形扁平无引线封装(quad flat non-leaded package)。方形扁平无引线封装具有一种封装结构,其中消除了侧向突出封装的占用空间的外部引线。替代地,在所述方形扁平无引线封装的下表面上提供了与电路板电连接的外部电极焊盘(electrode pad)。与所述电路板相连的所述封装的下表面可以称作如这里所述封装的背面(backside)。
方形扁平无引线封装(特别是无引线框架封装(leadless leadframepackage))使用金属引线框架作为半导体管芯封装中的支撑结构。典型地,在一条用于封装多个小片(dice)的引线框架中同时提供多个引线框架。每一个引线框架都包括一个管芯贴附焊盘(die attach pad)(管芯焊盘)以及一个或者多个设置在所述引线框架附近的触点(引线焊盘)。在组装期间,将小片贴附到各个管芯焊盘并且使用引线结合来将每一个管芯的触点和与其相关联的引线焊盘电连接。可以采用包括球焊、楔焊等许多不同的方法来执行引线结合。在此所用的引线结合通常用来表示本领域用于将管芯和与其相关联的引线焊盘电连接的各种已知方法。在所述引线结合工艺之后,通过在所述引线结合的小片和引线框架的上表面上模铸封装材料(例如树脂)来封装所述引线框架和小片。然后采用传统的锯切来分割(singulate)所述已封装的无引线框架封装。然后所述已封装管芯可被安装在印制电路板(PCB)上。当被安装时,引线焊盘的下表面和/或所述封装背面上的管芯焊盘与PCB触点相连,从而将所述管芯与PCB电路相连。
可以限制所述封装背面上的管芯焊盘和引线焊盘的面积,从而满足一组设计和布局规则。设计规则组规定了确定的几何形状和连接限制,以确保有足够的裕度来考虑制造工艺中的变化,确保各种电性能,并且减小电路的面积要求。然而,期望半导体管芯的面积大于所述管芯焊盘背面上的触点所允许的面积。
发明内容
一个或者多个实施例可以解决一个或者多个上述问题。
在一个实施例中,提供了一种用于封装半导体管芯的方法。将具有管芯焊盘以及一个或多个引线焊盘的引线框架放置在组装表面上。所述管芯焊盘具有位于所述组装表面上的底部部分、在所述底部部分之上并且从所述底部部分侧向延伸的上部部分以及从所述管芯焊盘的上部部分延伸并且支撑所述上部部分的支撑臂。将半导体管芯结合到所述管芯焊盘上部部分的上表面。将所述半导体管芯引线结合到一个或者多个引线焊盘。将所述半导体管芯和引线框架包裹(encase)在封装材料中。所述封装材料填充所述管芯焊盘的上部部分与所述组装表面之间的空间。去除所述支撑臂的一部分。
在另一个实施例中,提供了一种用于制造电子封装的中间结构。所述中间结构包括管芯焊盘,所述管芯焊盘具有底部部分以及在所述底部部分上方并且从所述底部部分侧向延伸的上部部分。将半导体管芯安装在所述管芯焊盘上部部分的上表面上。支撑臂从所述管芯焊盘的上部部分延伸并且支撑所述上部部分。所述支撑臂延伸超过由所述电子封装的轮廓限定的区域。
在再一个实施例中,提供了一种制造产物。所述制造产物的特征在于排列成行或者矩阵的多个电子封装。所述电子封装的每一个都包括管芯焊盘和安装在所述管芯焊盘的上表面上的半导体管芯。在成对的相邻管芯焊盘之间,各个连接臂(connection arm)将这些管芯焊盘对相连。支撑臂从每一个连接臂延伸并且为与其相连的管芯焊盘提供支撑。所述支撑臂延伸到多个所述电子封装的切割道(cutting lane)中。
附图说明
上述讨论并非意欲描述每一个实施例或者每一种实施方法。考虑结合附图的以下详细描述,可以更全面地理解各种示例实施例,其中:
图1示出了引线结合在引线框架上的管芯的透视图;
图2示出了引线结合在引线框架上的管芯的侧视图;
图3示出了图2所示的引线结合在引线框架上的管芯的截面I;
图4示出了图2所示的引线结合在引线框架上的管芯的顶视图;
图5示出了一种用于封装半导体管芯的方法的流程图;
图6示出了多个排列成行的引线框架;
图7说明了将半导体管芯安装和引线结合在图6所示的多个引线框架上;
图8说明了所述引线框架和管芯在封装材料中的封装;
图9说明了从所述已封装的引线框架上去除支撑带;
图10说明了所述已封装引线框架分离成独立的电子封装;
图11示出了引线结合在引线框架上的管芯的侧视图;
图12示出了图11所示的引线结合在引线框架上的管芯的正视图;以及
图13示出了图11所示的引线结合在引线框架上的管芯的顶视图。
具体实施方式
尽管本公开可以修订为各种改进和替代形式,但是其示例已经以示例的形式在附图中示出并且将进行详细描述。然而应当理解的是,本发明不局限于对所示和/或所述的特定实施例的公开。相反,其目的旨在覆盖落在本公开的精神和范围内的所有修改、等效和替代。
在一个或者多个实施例中,提供了用于管芯封装的引线框架和方法。所述引线框架和方法利用一个或者多个引线焊盘以及一个或者多个管芯焊盘。每一个管芯焊盘都包括底部部分和在所述底部部分上方的上部部分。所述上部部分大于所述底部部分,并且提供了大于只用于所述底部部分的管芯安装表面的管芯安装表面。所述上部部分从所述底部部分侧向延伸。然而在组装期间,从所述底部部分延伸的那部分上部部分可以引起所述管芯焊盘在所述引线结合和封装工艺期间变得不均衡或者不稳定。在一个或者多个实施例中,支撑臂设置于管芯封装之间的切割道中。所述支撑臂在引线结合工艺期间提供支撑并且提高了所述管芯焊盘的稳定性。一旦所述管芯和管芯焊盘被封装在封装材料中,作为封装分割的结果,去除位于所述切割道中的支撑臂。
应当认识到所述引线框架可以包括任何数量的管芯焊盘和引线焊盘,以便为包括在每一个封装中所包括的所述管芯的各个接触焊盘提供外部接触。为解释方便起见,所述实施例和示例主要参考具有两个外部接触的半导体封装进行描述,所述外部接触由一个管芯焊盘的下表面和一个引线焊盘的下表面形成。
图1说明了一个引线框架,具有在上部部分之上带有管芯安装表面的管芯焊盘。在这个示例中,所述引线框架100包括一个管芯焊盘102和一个引线焊盘110。所述管芯焊盘102具有底部部分106和上部部分104,所述上部部分从所述底部部分106侧向延伸。当完成封装时,所述底部部分106的下表面112和所述引线焊盘110的下表面118形成用于所述半导体封装背面的外部接触端(contact terminal)。将半导体管芯108安装在所述管芯焊盘的上表面122上并且用结合材料120固定。延伸超过所述底部部分106的所述管芯焊盘102的上部部分104提供了用于管芯安装的面积,所述面积在尺寸上大于只由所述底部部分106提供的面积。在封装期间,用引线结合116将所述半导体管芯108的接触焊盘114与引线焊盘110电连接。
在封装期间,所述管芯焊盘102的底部部分106位于组装表面上。如上所述,由于特定的设计和相关联的设计规则,所述管芯焊盘102的底部部分106可能不能为所述管芯焊盘提供足够的支撑。因此,在所述上部部分104上的所述半导体管芯108的重量或者所述引线结合工艺的力可能造成所述管芯焊盘102倾斜,或另外在封装期间变得不均衡。在一个或者多个实施例中,所述引线框架100实施成包括从所述管芯焊盘102的所述上部部分104延伸的支撑臂(未示出),以便在封装期间为所述管芯焊盘提供稳定性。在切割道中形成所述支撑臂,位于所述完成封装的半导体管芯的尺寸之外,以便在所述封装工艺期间去除所述支撑臂。因为所述支撑臂不存在于最终的封装中,因此所述支撑臂不与由设计规则所施加的任何限制冲突。
各种用于支撑所述管芯焊盘的结构都可以位于所述切割道中,并且在最终完成封装的尺寸之外。图2至图4示出了一种引线框架,在所述切割道中具有示例支撑臂结构。图2示出了引线结合在引线框架上的管芯的侧视图,图3示出了图2所示的引线结合在所述引线框架上的所述管芯的截面I,以及图4示出了引线结合在所述引线框架上的所述管芯的顶视图。所示引线框架200包括管芯焊盘,具有底部部分202和上部部分204。在这个示例说明中,将半导体管芯206安装在所述管芯焊盘的上表面上,并且所述半导体管芯的一部分占据了所述上部部分204未被所述底部202部分支撑的区域。所述半导体管芯206的接触经由引线结合212与引线焊盘210引线结合。所述引线结合212和引线焊盘210形成从所述引线焊盘210的所述下表面232上的外部接触区域到所述半导体管芯206的电学路径。
在图2、图3和图4的方框230示出了在分割之后最终完成的封装的轮廓。支撑臂208从所述上部部分204延伸并且为所述上部部分提供支撑。在所述封装分割之前,所述支撑臂208延伸超过所述封装轮廓230(图3和图4)。在这个实施例中,所述支撑臂208从所述上部部分的侧面206侧向延伸,如图3和图4所示,并且向下达到一定程度,通常与所述底部部分202的下表面234以及引线焊盘210的下表面232是共面的。因为所述支撑臂208延伸超过所述已完成封装230的尺寸,可以在多个封装的分割期间去除所述支撑臂。因此,一旦分割所述封装,所述支撑臂将已经被去除并且将不违反任何调整所述管芯焊盘202和引线焊盘210的接触区域和位置的设计规则。
出于解释的目的,所述管芯焊盘的底部部分202和上部部分204被描述成独立的元件。应当理解,所述底部部分202和上部部分204可以是单片结构。同样地,支撑臂208可以作为所述管芯焊盘的一部分被整体形成。替代地,可以独立地形成并且如图所示附接所述部分和支撑臂。
在一些实施例中,所述管芯焊盘可以与在所述半导体管芯底面上的接触焊盘电连接。例如,采用诸如导电胶的导电粘接剂或者诸如焊膏或焊料的可焊接材料,将所述管芯接触与所述管芯焊盘电连接。在一些其他实施例中,所述半导体管芯的接触焊盘可以与所述管芯焊盘引线结合。
图5示出了一种用于封装半导体管芯的方法的流程图。在工艺方框502处,将引线框架的管芯焊盘和引线焊盘定位在制造表面上。在一些实施例中,为了制造的方便,可以将引线框架的管芯焊盘和引线焊盘预先定位并且提供在支撑带(support tape)上。在方框504处,将半导体管芯结合到所述管芯焊盘上。在方框506处,将每一个管芯的接触都引线结合到各个引线框架的引线焊盘上。在方框508处,将所述小片和引线框架封装在封装材料中。在方框510处,如果使用支撑带的话将支撑带去除。在方框512处,所述已封装小片和引线框架被切割为独立的封装(已分割的)。作为分割的结果,从已完成的封装中去除了所述支撑臂。
图6至图10说明了根据图5所述工艺封装多个半导体管芯。图6示出了在管芯结合(diebonding)之前排列成行的多个引线框架。在这个示例说明中,每一个引线框架(例如引线框架710)都被说明成截面类似于图3所示的截面。每一个引线框架都包括具有底部部分702和从所述底部部分侧向延伸的上部部分704的管芯焊盘。支撑臂708从所述管芯焊盘的上部部分延伸并且支撑所述上部部分。在这个示例中,将所述引线框架贴附在支撑带712上。
图7说明了将半导体小片安装和引线结合在图6所示的多个引线框架上。将半导体管芯722安装在所述管芯焊盘的上部部分704上。经由引线结合724将所述小片的接触引线结合到一个或者多个引线焊盘(未示出)。
图8说明了将所述引线框架和小片封装在封装材料(诸如树脂聚合物)中。通过利用本领域已知的任何合适的成型技术将封装材料应用在所述引线框架载体和管芯的上方来稳定并且密封所述管芯封装。例如,可以利用在合适的模具托盘(mold tray)中成型将所述本体(body)应用到所述载体。例如,可以通过在所述载体的上方传递或者注射模塑形成所述封装材料本体。所述封装材料本体完全地封装所述管芯焊盘、管芯和引线焊盘,填充在所述封装尺寸内的任何开放空间,而不覆盖所述管芯焊盘和引线焊盘的下表面,因为它们被附接到所述支撑带712。所述下表面在所述封装的背面上形成外部接触。采用本领域已知的技术(诸如烘箱固化)固化并且至少部分硬化封装材料的本体。
在这个说明性的示例中,所述引线框架被封装在一起,所述封装材料填充了在所述引线框架之间的切割道中的区域。在一些实施例中,所述支撑臂的一部分可能会露出而没有被封装材料包裹起来。
图9说明了在固化之后从所述多个已封装的引线框架和小片902上去除支撑带712。图10说明了所述已封装引线框架分离成独立的电子封装。沿单独的封装1002之间的切割道1004分离或者分割所述封装,每一个封装都包括一个半导体管芯。可以采用本领域普通技术人员已知的技术实现所述分割。一旦分割,可以将所述封装电学地安装在衬底或者印制电路板上。
图11至图13示出了具有支撑臂替代结构的引线框架。
图11示出了引线结合在引线框架上的管芯的侧视图,图12示出了图11所示的引线结合在引线框架上的管芯的正视图,以及图13示出了图11所示的引线结合在引线框架上的管芯的顶视图。所述引线框架包括具有底部部分1102和上部部分1104的管芯焊盘。所述上部部分从所述底部部分侧向延伸。当所述封装完成时,所述管芯焊盘底部部分1102的下表面1134和所述引线焊盘1110的下表面1132在所述封装的背面形成外部接触。在这个示例说明中,将半导体管芯1106安装在所述管芯焊盘的所述上部部分1104。所述管芯1106经由引线结合1112与引线焊盘1110引线结合。支撑臂1108支撑所述上部部分1104未被所述底部部分1102支撑的部分。以贴附在所述上部部分1104和所述引线焊盘1110的支撑臂的形式提供所述支撑。所述支撑臂1108的一部分位于所述切割道中。这样,当所述封装被分割时,所述管芯焊盘将不会经由所述支撑臂与所述引线焊盘1110电连接。
基于上述讨论和说明,本领域的普通技术人员将很容易地认识到可以在不严格地遵守在此所述的示意实施例和应用的情况下做出各种修改和变化。这种修改并没有脱离本公开的包括在所附权利要求中详细描述的真实精神和范围。
Claims (20)
1.一种封装半导体管芯的方法,所述方法包括:
将引线框架放置(502)在组装表面上,所述引线框架具有管芯焊盘(202、204)以及一个或多个引线焊盘(210),所述管芯焊盘具有位于所述组装表面上的底部部分(202)、在所述底部部分之上并且从所述底部部分侧向延伸的上部部分(204)以及从所述管芯焊盘的上部部分延伸并且支撑所述上部部分的支撑臂(208);
将半导体管芯(206)结合(504)到所述管芯焊盘上部部分的上表面;
将所述半导体管芯引线结合(506)到一个或多个引线焊盘(210);
将所述半导体管芯和引线框架包裹(508)在封装材料(802)中,所述封装材料填充所述管芯焊盘的上部部分与所述组装表面之间的空间;以及
去除(512)所述支撑臂的一部分。
2.根据权利要求1所述的方法,其中所述支撑臂从所述管芯焊盘的上部部分向下延伸到所述组装表面。
3.根据权利要求1所述的方法,其中所述支撑臂将所述管芯焊盘的上部部分与一个或多个引线焊盘之一相连。
4.根据权利要求1所述的方法,其中所述支撑臂将第一管芯焊盘的上部部分与第二管芯焊盘相连。
5.根据权利要求1所述的方法,其中:
将所述半导体管芯和引线框架包裹在所述封装材料中将所述支撑臂包裹在所述封装材料中;以及
去除所述支撑臂的一部分包括去除延伸到由所述已封装的半导体管芯尺寸所限定的区域之外的所述封装材料的一部分。
6.根据权利要求1所述的方法,其中将所述半导体管芯和引线框架包裹在所述封装材料使得所述支撑臂延伸到由所述已封装的半导体管芯尺寸所限定的区域之外的那部分暴露在外。
7.根据权利要求1所述的方法,其中所述管芯焊盘具有至少从所述管芯焊盘的上部部分延伸的第二支撑臂。
8.根据权利要求7所述的方法,其中所述第二支撑臂从所述上部部分沿与所述第一支撑臂相反的方向延伸。
9.根据权利要求1所述的方法,其中:
经由所述支撑臂将所述引线框架与第二类似引线框架相连;以及
通过包括从第二类似引线框架分离所述第一引线框架的工艺去除所述支撑臂部分。
10.一种用于制造电子封装的中间结构,包括:
管芯焊盘,具有底部部分(202)以及在所述底部部分上方并且从所述底部部分侧向延伸的上部部分(204);
半导体管芯(206),安装在所述管芯焊盘上部部分的上表面上;以及
支撑臂(208),从所述管芯焊盘的上部部分延伸并且支撑所述上部部分,所述支撑臂延伸超过由所述电子封装限定的区域(230)。
11.根据权利要求10所述的引线框架结构,其中所述支撑臂从所述管芯焊盘的上部部分延伸到所述管芯焊盘底部部分的下表面所在平面。
12.根据权利要求10所述的引线框架结构,其中所述支撑臂将所述管芯焊盘的上部部分与引线焊盘相连。
13.根据权利要求10所述的引线框架结构,其中所述支撑臂将所述第一管芯焊盘的上部连接到第二管芯焊盘。
14.根据权利要求12所述的引线框架结构,其中将所述引线焊盘引线结合到所述半导体管芯。
15.一种制造产物,包括:
排列成行和矩阵的多个电子封装(710),每一个封装都包括:
管芯焊盘(702、704);以及
安装在所述管芯焊盘的上表面上的半导体管芯(722);
在成对的相邻管芯焊盘之间,连接管芯焊盘对的各个连接臂;以及
支撑臂(708),从每一个连接臂延伸并且为与其相连的管芯焊盘提供支撑,所述支撑臂延伸到所述多个电子封装的切割道(1004)中。
16.根据权利要求15所述的制造产物,其中每一个封装还包括与所述封装的半导体管芯引线结合的一个或多个引线焊盘。
17.根据权利要求15所述的制造产物,其中所述支撑臂将所述管芯焊盘与所述多个半导体器件之一的引线焊盘之一相连。
18.根据权利要求15所述的制造产物,其中所述支撑臂从所述连接臂延伸到包围所述管芯焊盘下表面的平面。
19.根据权利要求15所述的制造产物,其中所述支撑臂将所述连接臂与所述多个电子封装之一的引线焊盘相连。
20.根据权利要求15所述的制造产物,其中所述管芯焊盘和半导体管芯一起具有没有定位在所述管芯焊盘底部上方的质心。
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EP11165403.4A EP2523211B1 (en) | 2011-05-10 | 2011-05-10 | Leadframe and method for packaging semiconductor die |
EP11165403.4 | 2011-05-10 |
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CN109037078A (zh) * | 2018-06-13 | 2018-12-18 | 南通通富微电子有限公司 | 一种半导体芯片封装方法 |
CN109037183A (zh) * | 2018-06-13 | 2018-12-18 | 南通通富微电子有限公司 | 一种半导体芯片封装阵列和半导体芯片封装器件 |
CN109065518A (zh) * | 2018-06-13 | 2018-12-21 | 南通通富微电子有限公司 | 一种半导体芯片封装阵列 |
CN109065519A (zh) * | 2018-06-13 | 2018-12-21 | 南通通富微电子有限公司 | 一种半导体芯片封装器件 |
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CN102779761B (zh) | 2015-04-01 |
EP2523211B1 (en) | 2019-10-23 |
US20120286399A1 (en) | 2012-11-15 |
EP2523211A1 (en) | 2012-11-14 |
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