CN102696104A - 用于制造电子构件的方法以及按照所述方法制造的电子构件 - Google Patents

用于制造电子构件的方法以及按照所述方法制造的电子构件 Download PDF

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CN102696104A
CN102696104A CN2010800592837A CN201080059283A CN102696104A CN 102696104 A CN102696104 A CN 102696104A CN 2010800592837 A CN2010800592837 A CN 2010800592837A CN 201080059283 A CN201080059283 A CN 201080059283A CN 102696104 A CN102696104 A CN 102696104A
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layer
substrate
diffusion barrier
conducting shell
back face
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CN102696104B (zh
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冈特·琼森
赫尔曼·斯蒂格劳尔
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United Monolithic Semiconductors GmbH
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United Monolithic Semiconductors GmbH
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Abstract

对于具有GaAs半导体衬底（HS）的电子构件，在该GaAs半导体衬底的正面上构造有半导体器件（BE），并且在该GaAs半导体衬底的背面设有多层的背面金属化部（RM），提出了背面金属化部的层序列的一种有利构造，尤其是背面金属化部具有Au层作为粘附层。

Description

用于制造电子构件的方法以及按照所述方法制造的电子构件
技术领域
本发明涉及一种用于制造电子构件的方法以及按照该方法制造的电子构件。
背景技术
具有在半导体衬底上的至少一个半导体器件的电子构件中，必须使半导体器件中在工作时出现的消耗热量得到散发。这尤其对于高频功率构件而言是重要的。至少一个器件或者按照典型方式包含多个器件的单片集成电路构造在衬底正面上，并且消耗热量通过衬底经由其背面散发至热沉，例如经由构件壳体的表面排出。衬底通常具有从衬底背面至正面贯穿的开口—所谓的通孔，所述通孔充当从平面背面金属化部至衬底正面上的导电面的导电镀通部。
按照典型方式，在衬底背面上包括通孔在内，沉积有由金（Au）制成的传导层，其中，为了将Au传导层与半导体衬底表面固定的结合，通常施加增附剂层，对于抛光衬底表面而言，增附剂层例如可以含有Ge，对于仅粗磨的衬底表面增附剂层可以含有Ti、Ta、W、Pd或Cr，并且在增附剂层上优选电镀沉积Au传导层。尤其在衬底背面表面仅粗磨的情况下，Ti充当与半导体材料具有良好机械锚定的增附剂。由于在产生通孔的情况下在抗断裂强度和光刻成像方面具有更好的特性，精磨背面表面是优选的，然而该精磨背面表面的机械锚定不好。因而对于GaAs衬底的优选精磨的背面表面来说，通常沉积有Ge作为增附剂层在衬底背面上并且在通孔中。在增附剂层上沉积Au，其中，通常溅射有薄的第一金层，并且在该层上电镀产生较厚的Au层，以作为导热能力和导电能力较高的传导层。背面金属化部的背向衬底的表面与热沉相钎接，其中，按照典型方式尤其是将呈薄的预成形膜形式的共晶AuSn4合金用作焊料。按照典型方式，热沉的指向衬底或预成形膜的表面同样具有Au表面。衬底与热沉之间的钎焊连接尤其在衬底侧面上对于妨碍热量传递的空腔的形成没抵抗能力。钎焊过程的参数具有在时间和温度方面较小的公差，以便将钎焊连接保持得很小。
在GaAs衬底上按照已知方法制造的构件总是显示尤其是高频工作的功率较高器件的功能不断退化和失灵。
在2001年12月1日的国际半导体会议中，由Varmazis等的会议文献“How to Process the Backside of GaAs Wafers（如何处理GaAs晶片的背面）”讨论了对具有镀通部的半导体衬底进行背面金属化的问题和方法。为了防止向敷镀通部导致机械应力地填充熔融AuSn焊料而提出：背面金属化部的Au层表面覆盖有由Ti、Ni或Cr制成的附加层，并且该附加层在背面金属化部的平坦面上在敷镀通部之外借助光掩模和蚀刻过程再次移除，以便再次露出Au层的Au表面。在光掩模移除之后，在通孔中，表面由附加层提供，该附加层被氧化并且很差地被AuSn焊料润湿。
发明内容
本发明基于如下任务，即：提供一种尤其在具有主要由Au层构成的背面金属化部的GaAs衬底上制造电子构件的方法，以及按照该方法制造的构件。
根据本发明的解决方案在独立权利要求中加以说明。从属权利要求包含本发明的有利构造方案和改进方案。
本发明基于这样的认知，即，在常见构件上出现的故障在很大程度上与粘附金属有关，这种粘附金属直接沉积到衬底背面的半导体材料上。虽然Ge作为粘附金属层由于可以很好地扩散进入衬底材料而尤其产生了在具有抛光或精磨表面的衬底材料上非常好的粘附，但另一方面Ge的强烈扩散也会导致干扰到与背面金属化部的下一层的界面，甚至在背面金属化部的背向衬底的表面上可能导致以用于与热沉连接的焊料很差的润湿。这种效应尤其会导致布置在衬底正面上的器件的消耗热量的散发变差。此外表明的是，Ge尤其在衬底正面中贯穿衬底材料的通孔的边缘上朝向有源器件迁移，并且会造成对器件特性发生衰减。
在说明和权利要求中明确提到的化学元素镓Ga、砷As、钛Ti、金Au、锗Ge、氮N、钽Ta、钨W、钯Pd、铬Cr等分别通过其化学常用缩写表达。
根据本发明将Au用作为直接沉积在衬底背面半导体金属上的粘附层的材料克服了前述缺点并可靠粘附在衬底上。衬底背面在沉积Au粘附层之前优选抛光至平均粗糙度小于4nm。Au从第一Au层扩散进入衬底材料，这对良好地粘附在平滑的衬底表面上是特别有利的。按照有利方式，所述第一Au层的厚度为至少25nm，尤其为至少35nm。然而该扩散性明显Ge的扩散性差，从而不会使器件出现衰减。同时来自半导体材料的Ga也扩散进入第一Au层。
为了限制Au进入半导体材料以及Ga进入第一Au层的相互扩散，按照有利方式，第一Au层的厚度限定为最大100nm，尤其是最大75nm。第一Au层的优选层厚度为大约50nm。背面金属化部同样以自身常见的方式沉积在贯穿衬底的通孔中，其中，至少第一Au层的层厚度在通孔壁上比在衬底背面上优选更小。
在特别有利的实施方案中，在第一Au层与Au传导层之间优选直接在第一Au层上沉积有扩散阻隔层，扩散阻隔层一方面通过限制第一Au层的层厚度来限制扩散进入衬底材料的Au供应，另一方面尤其阻止来自衬底材料通过第一Au层迁移的Ga继续扩散。因而扩散阻隔层的材料如此选择，即，Ga在扩散阻隔层材料中的扩散系数比在第一Au层中更小。扩散阻隔层优选含有Ti作为主要组分，Ti可以按照有利方式与N掺混，以进一步降低Ga扩散。
按照有利方式，扩散阻隔层也在贯穿衬底的镀通部的侧边壁上沉积，并且有利地在正面附近的区域作为阻隔部对抗背面金属化部和/或焊料的原子扩散进入有源半导体区域。
按照有利方式，在扩散阻隔层与Au传导层之间，尤其是在扩散阻隔层上直接沉积、尤其是溅射有第二Au层，以作为用于对Au传导层进行电镀沉积的起始金属层。溅射的Au层的特性例如在这些层上的其他金属的扩散系数方面与电镀沉积的Au层有区别。在优选实施方案中，扩散阻隔层朝向垂直于层表面的方向以交替的组合物构造，其中，按照有利方式在与第一Au层的界面区域中和/或在与第二Au层的界面区域中，扩散阻隔层由Ti构成，并且在中间的层区域中存在TiN，以作为针对Ga明显进一步减低扩散系数的材料。
在Au传导层的背向衬底的一侧，其他层可以作为背面金属化部的部分得到沉积。
附图说明
下面，本发明结合优选实施例加以进一步说明。在此：
图1是构件的剖面图；
图2是背面金属化部的层构造。
具体实施方式
图1示出半导体结构组件与壳体面通过钎焊连接的组装图示。半导体衬底HS在其图1中向上指向的正面上具有一个或者按照典型方式具有多个半导体器件BE以及金属导体带LB。半导体衬底HS的与正面反向而置的背面设有背面金属化部RM。通孔DK贯穿衬底地开设，通孔DK的壁同样以背面金属化部RM覆盖，并且可以形成至衬底正面上的导体带LB的镀通部。
在简要示出的典型示例中，设置有电子器件EB用以与热沉（例如壳体GE）导热性良好的连接，为此，在该壳体上设有金属层GM，并且电子器件的背面金属化部RM可以借助例如作为薄膜存在的焊料与金属层GM相钎焊。
在此，背面金属化部不仅满足沿着衬底背面穿过通孔DK至导体带LB的电导体功能，而且也满足将器件BE中在工作时出现的耗散功率导出至作为热沉的壳体GE的热传导功能。就导电的功能而言，较小的层电阻是重要的，针对热传导功能而言，除了良好的导热能力之外，尤其是衬底与壳体GE之间，尤其是在衬底与背面金属化部之间以及背面金属化部与焊料层之间，各种不同层的良好连接是重要的。
在将锗用作为与衬底背面的GaAs半导体材料直接接触的粘附层情况下，通常保证了衬底与背面金属化部之间良好热传导接触。然而事实证明，Ge可能是干扰背面金属化部与焊料层之间的热传导的原因，并且会导致衬底正面上的器件的特性发生衰减。
图2示出由多个层共同组成的背面金属化部的根据本发明的结构。按照有利方式，衬底背面被抛光至平均粗糙度小于4mm的较小粗糙度。第一Au层1作为粘附层溅射沉积到在半导体衬底HS的背面上。将扩散阻隔层2溅射沉积到第一Au层1上，并且将第二Au层3溅射沉积到扩散阻隔层2上。扩散阻隔层2在与第一Au层1的界面区域2a中以及在与第二Au层2的界面区域2c中优选由Ti制成。在扩散阻隔层的中间层区域2b中，扩散阻隔层优选由TiN制成。
在GaAs中Au的扩散系数比Ge的扩散系数更低，然而足够高，以保证第一Au良好地、面式大致连贯地锚定在衬底背面的溅射表面上。由此保证了热量特别好地从衬底导出至粘附层。不需要通过衬底背面与粘附层在几何形状上的相互嵌接来进行对于Ti粘附层的典型的机械粘附。通过扩散阻隔层2的多层结构，一方面保证了区域2a、2c中的Ti与所邻接的Au溅射层之间可靠的固定连接，另一方面TiN作为中间层区域形成了对于来自半导体衬底HS的Ga特别有效的扩散阻隔。第二Au层3充当Au传导层4的电镀沉积所用的起始金属层，第二Au层3的厚度是背面金属化部总厚度的至少50%。最后的层5可以布置在电镀沉积的较厚的Au传导层4上，层5构成背面金属化部的面朝焊料的表面，背面金属化部也可以形成多个部分层序列，尤其还可以包含溅射的Au层。
按照有利方式，扩散阻隔层2限制了Au的供应，该Au的供应在第一Au层被提供用于扩散进入半导体衬底HS以及从半导体衬底吸收Ga，从而第一Au层与半导体衬底之间的扩散过程可以局限于对于锚定所需的程度。Ti在GaAs中的扩散系数特别低，以致于来自区域2a的Ti通过第一Au层1进入半导体衬底HS的扩散是无关紧要的。扩散阻隔层、尤其是中间区域有效阻止了：Ga朝向Au传导层4的方向迁移，在那里Ga可能会导致层电阻增大；以及Ga扩散直至整个背面金属化部的背向衬底的表面，在那里当钎焊过程中会出现对以焊料润湿过程的干扰。
按照有利方式，在半导体衬底背面上的第一Au层1的厚度为至少25nm，尤其为至少35nm，最高为100nm，尤其最高为75nm。优选第一Au层1的厚度大约为50nm。
按照有利方式，扩散阻隔层的厚度大于第一Au层的厚度，并且按照有利方式在100nm至400nm之间，尤其是在150nm至300nm之间。在阻隔层的多层结构中，区域2a、2c的厚度按照有利方式在5nm至30nm之间。作为Au传导层4的电镀沉积所用的起始金属层的第二Au层3的层厚度按照有利方式在50nm至500nm范围内。Au传导层4的层厚度是前述层厚度的数倍，并且按照典型方式在2000nm至5000nm之间的范围内。最后一个层或者层序列5的层厚度按照有利方式在200nm至400nm之间。
背面金属化部1至5的层序列按照有利方式也作为通孔DK的侧壁的金属化部，在那里按照有利方式至少第一Au层1的层厚度与在衬底背面上相比更小，并且尤其是在通孔侧壁上，在衬底正面区域中，第一Au层1的层厚度不超过在衬底平坦背面上的第一Au层的层厚度的50%。由此，进一步减低了用于在器件BE的可能存在争议的附近扩散进入半导体材料的Au的供应，因而进一步降低由于金的扩散进入而导致器件衰减的危险。对半导体衬底中粘附层的锚定要求在该区域不如在半导体衬底的背面那样严格，这是因为处在衬底正面附近的该区域在传导消耗热量方面起次要作用。扩散阻隔层在通孔中尤其在衬底正面附近，使得来自背面金属化部的之后沉积的层的原子或者来自也许进入通孔的焊料的原子朝向有源器件方向的扩散得以最小化或被阻止。
就扩散阻隔层而言，Ti作为主要组分是优选的，然而一般而言也可以应用其他如下材料，这些材料具有与相邻Au层良好连接的特性，并且在扩散阻隔层中Ga较低的扩散系数以及扩散阻隔层材料进入GaAs较低的扩散系数。尤其是所有难熔金属都是适当的，对于难熔金属应当理解为在其他意义上也部分被称为难熔金属的、高熔点的、周期表第四、第五、第六副族的贱金属以及铼，也就是Ti、V、Cr、Zr、Nb、Mo、Hf、Ta、W、Re以及其与N的化合物。
在这里以及在权利要求中说明的以及可从插图中获悉的特征不仅可以单独地还能以各种不同组合方式按照有利方式实现。本发明并不局限于所述实施例，而是在专业人士技能范围内能够以各种方式改动。

Claims (24)

1.用于制造电子构件（EB）的方法，所述电子构件具有至少一个在GaAs衬底（HS）的正面上的半导体器件（BE），其中，所述衬底的背向所述器件的背面设有背面金属化部（RM），其中，将粘附层施加到衬底材料的表面上，并且之后沉积有Au传导层（4），所述Au传导层（4）的厚度为所述背面金属化部总厚度的至少50%，其特征在于，将第一Au层（1）作为粘附层来沉积。
2.根据权利要求1所述的方法，其特征在于，沉积有层厚度为至少25nm，尤其至少35nm以及最大100nm、尤其是最大75nm的所述第一Au层（1）。
3.根据权利要求1或2所述的方法，其特征在于，在沉积所述第一Au层（1）之前，所述衬底（HS）的所述背面被抛光至平均粗糙度小于4nm。
4.根据权利要求1至3之一所述的方法，其特征在于，在所述第一Au层（1）与所述Au传导层（4）之间沉积有扩散阻隔层（2）。
5.根据权利要求4所述的方法，其特征在于，在所述扩散阻隔层（2）与所述Au传导层（4）之间沉积有第Au层（3）。
6.根据权利要求4或5所述的方法，其特征在于，所述扩散阻隔层（2）至少在与所述第一Au层的界面区域（2a）中和/或在与所述第二Au层的界面区域（2c）中由至少一种难熔金属制成，尤其是由Ti制成。
7.根据权利要求4至6之一所述的方法，其特征在于，所述扩散阻隔层至少在中间层区域（2c）中包含N。
8.根据权利要求4至7之一所述的方法，其特征在于，所述扩散阻隔层（2）以大于所述第一Au层（1）的层厚度来沉积。
9.根据权利要求1至8之一所述的方法，其特征在于，溅射所述第一Au层（1）和/或所述扩散阻隔层（2）和/或所述第Au层（3）。
10.根据权利要求1至9之一所述的方法，其特征在于，电镀沉积所述Au传导层（4）。
11.根据权利要求1至10之一所述的方法，其特征在于，在沉积所述背面金属化部（RM）之前，产生至少一个贯穿所述衬底（HS）的通孔（DK），并且所述背面金属化部也沉积在所述通孔中。
12.根据权利要求11所述的方法，其特征在于，至少所述第一Au层（1）在所述通孔（DK）中被以与所述衬底背面上相比更小的层厚度来沉积。
13.具有GaAs半导体衬底（HS）的电子构件（EB），所述GaAs半导体衬底（HS）在所述GaAs半导体衬底（HS）的衬底正面具有至少一个半导体器件（BE），并且在所述衬底背面具有背面金属化部，其中，所述背面金属化部（RM）包含至少一个与所述衬底的半导体材料保持接触的粘附层（1）以及Au传导层，所述Au传导层的层厚度为所述背面金属化部层厚度的至少50%，其特征在于，所述粘附层是第一Au层（1）。
14.根据权利要求13所述的构件，其特征在于，所述第一Au层（1）的层厚度为至少25nm，尤其至少35nm和最大100nm，尤其是最大75nm。
15.根据权利要求13或14所述的构件，其特征在于，所述衬底背面在与所述第一Au层（1）的界面上具有小于4nm的平均粗糙度。
16.根据权利要求13至15之一所述的构件，其特征在于位于所述第一Au层（1）与所述Au传导层（4）之间的扩散阻隔层（2）。
17.根据权利要求16所述的构件，其特征在于位于所述扩散阻隔层（2）与所述Au传导层（4）之间的第Au层（3）。
18.根据权利要求16或17所述的构件，其特征在于，所述扩散阻隔层（2）至少在与所述第一Au层（1）的界面区域（2a）中或在与所述第Au层（3）的界面区域（2c）中由Ti制成。
19.根据权利要求16至18之一所述的构件，其特征在于，所述扩散阻隔层（2）至少在中间层区域（2b）中包含N并且优选由TiN制成。
20.根据权利要求16至19之一所述的构件，其特征在于，所述扩散阻隔层（2）的层厚度大于所述第一Au层（1）的层厚度。
21.根据权利要求13至20之一所述的构件，其特征在于，所述第一Au层（1）和/或所述扩散阻隔层（2）和/或所述第Au层（3）是溅射层。
22.根据权利要求13至21之一所述的构件，其特征在于，所述Au传导层（4）是电镀层。
23.根据权利要求13至22之一所述的构件，其特征在于，在所述衬底中，在所述衬底正面与背面之间存在至少一个通孔（DK），并且所述背面金属化部（RM）也存在于所述至少一个通孔的壁上。
24.根据权利要求23所述的构件，其特征在于，至少所述第一Au层（1）在所述通孔的壁上的层厚度比在所述衬底背面上的层厚度更小。
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