CN102683209A - 一种半导体器件及其制造方法 - Google Patents
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Abstract
本发明公开了一种半导体器件及其制造方法，所述方法包括：提供衬底，所述衬底上形成有石墨烯层或碳纳米管层；在所述石墨烯层或碳纳米管层上形成栅极结构后，暴露部分所述石墨烯层或碳纳米管层，所述栅极结构包括栅堆叠、侧墙和帽层，所述帽层位于所述栅堆叠上，所述侧墙环绕所述栅堆叠和所述帽层；在暴露的所述石墨烯层或碳纳米管层上外延生长半导体层；在所述半导体层上形成金属接触层。通过在石墨烯层或碳纳米管层上形成半导体层，继而在所述半导体层上形成金属接触层，以替代直接利用石墨烯层或碳纳米管层材料形成金属接触层，利于形成自对准的源漏接触塞。
Description
技术领域
本发明涉及半导体制造技术领域，特别涉及一种半导体器件及其制造方法。
背景技术
石墨烯自从被发现以来，已成为世界各国研究小组的研究热点，它是碳的一种新形态，由于其具有一系列独一无二的电学和物理学性质，成为构建纳米电子器件的理想材料。但由于石墨烯为单原子层的结构，难以对其进行离子注入掺杂而在其上形成器件的自对准的源漏接触塞。
发明内容
为了解决上述问题，本发明提供了一种半导体器件的制造方法，所述方法包括：提供衬底，所述衬底上形成有石墨烯层或碳纳米管层；在所述石墨烯层或碳纳米管层上形成栅极结构后，暴露部分所述石墨烯层或碳纳米管层，所述栅极结构包括栅堆叠、侧墙和帽层，所述帽层位于所述栅堆叠上，所述侧墙环绕所述栅堆叠和所述帽层；在暴露的所述石墨烯层或碳纳米管层上外延生长半导体层；在所述半导体层上形成金属接触层。
此外，本发明还提供了一种半导体器件，所述器件包括：衬底；石墨烯层或碳纳米管层，所述石墨烯层或碳纳米管层形成于所述衬底上；栅极结构，所述栅极结构形成于所述石墨烯层或碳纳米管层上，且暴露部分所述石墨烯层或碳纳米管层；金属接触层，所述金属接触层环绕所述栅极结构，且位于暴露的所述石墨烯层或碳纳米管层上。
采用本发明提供的半导体器件的制造方法，通过在石墨烯层或碳纳米管层上形成半导体层，继而在所述半导体层上形成金属接触层，以替代直接利用石墨烯层或碳纳米管层材料形成金属接触层，利于形成自对准的源漏接触塞。
附图说明
图1示出了根据本发明的半导体器件的制造方法实施例的流程图；
图2-图4示出了本发明提供的半导体器件的制造方法实施例中各中间结构的剖示图。
具体实施方式
下面通过参考附图描述的实施例是示例性的，仅用于解释本发明，而不能解释为对本发明的限制。下文的公开提供了许多不同的实施例或例子用来实现本发明的不同结构。为了简化本发明的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本发明。此外，本发明可以在不同例子中重复参考数字和/或字母。这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施例和/或设置之间的关系。此外，本发明提供的各种特定的工艺和材料的例子，本领域普通技术人员可以意识到其他工艺的可应用于性和/或其他材料的使用。另外，以下描述的第一特征在第二特征之“上”的结构可以包括第一和第二特征形成为直接接触的实施例，也可以包括另外的特征形成在第一和第二特征之间的实施例，这样第一和第二特征可能不是直接接触。
参考图1，在步骤S01，提供衬底。结合图2，在一个实施例中，衬底200包括硅衬底(例如晶片)，碳化硅、体硅、掺杂或未掺杂的硅玻璃中的一种或其组合。在其他实施例中，还可以包括其他基本半导体或化合物半导体，例如Ge、GeSi、GaAs、InP或金刚石等。根据现有技术公知的设计要求(例如p型衬底或者n型衬底)，衬底200可以包括各种掺杂配置。此外，衬底200可以可选地包括外延层，可以被应力改变以增强性能，以及可以包括绝缘体上硅(SOI)结构。
其中所述衬底200上形成有石墨烯层或碳纳米管层202，参考图2。可以利用CVD、热分解法、微机械剥离法，以及他们的键合转移法或其他合适的方法来形成包括单层或多层石墨烯材料的石墨烯层或碳纳米管层202。
在步骤S02，在所述石墨烯层或碳纳米管层上形成栅极结构。在本发明一个实施例中，参考图2，所述栅极结构包括栅堆叠204、侧墙206(可为绝缘材料，可以包括一层或多层结构，为多层结构时，相邻两层材料可不同)和帽层(可为绝缘材料，所述帽层材料可与侧墙206材料相同)，所述帽层位于栅堆叠204上，侧墙206环绕所述栅堆叠204和所述帽层。在一个实施例中，栅堆叠204可以以金属、掺杂或未掺杂的多晶硅、掺杂或未掺杂的非晶硅，以及掺杂或未掺杂的硅玻璃承载所述帽层。本文件中，所述栅堆叠204也可以为伪栅堆叠，可包括栅介质层(如氧化硅或高k介电材料)和栅极/伪栅(如金属、掺杂或未掺杂的多晶硅、掺杂或未掺杂的非晶硅，以及掺杂或未掺杂的硅玻璃)，也可只包括栅极/伪栅，本领域技术人员可根据工艺需要灵活选择，本文件中只着重教导所述栅堆叠204的材料选择对方案实施的影响。
在石墨烯层或碳纳米管层上形成栅极结构后，暴露部分的石墨烯层或碳纳米管层。
在步骤S03，在暴露的石墨烯层或碳纳米管层202上外延生长半导体层208(所述半导体层材料可为掺杂或未掺杂的多晶硅、掺杂或未掺杂的非晶硅，或者掺杂或未掺杂的单晶硅；在其他实施例中，也可以为掺杂或未掺杂的锗或掺杂或未掺杂的硅锗)。参考图3所示，采用外延生长工艺可在暴露的石墨烯层或碳纳米管层202上形成半导体层208，即，以自对准的方式形成所述半导体层208，进而，在利用所述半导体层208形成器件的源漏区时，即以自对准的方式形成所述源漏区。
在一个实施例中，半导体层材料为掺杂或未掺杂的多晶硅、掺杂或未掺杂的非晶硅，或者，掺杂或未掺杂的单晶硅。
在步骤S04，在所述半导体层上形成金属接触层210。可以通过传统的自对准工艺形成金属接触层210，具体来说，首先在半导体层上形成金属层，所述金属层材料例如Ti、Ni、Co或其他金属材料；而后，进行高温退火，使金属层与和其接触的半导体层208发生反应形成金属接触层210，所述金属层可以同全部半导体层208反应(其他实施例)，也可以仅同半导体层208表层反应(本实施例)；而后，去除未反应的金属层，从而自对准形成金属接触层210，参考图4。
此外，当栅堆叠204以掺杂或未掺杂的多晶硅或非晶硅承载帽层时，在半导体层208上形成金属接触层210的步骤包括：首先去除帽层，以暴露栅堆叠204。然后，在半导体层208和栅堆叠204上形成金属接触层210。此时，在外延生长所述半导体层208后，去除所述帽层，既利于保持栅堆叠204的形貌，也利于减少在栅堆叠204上形成金属接触层210时所需步骤的数目，利于简化工艺。
以本发明还提出了一种半导体器件，所述半导体器件包括：衬底；形成于所述衬底上的石墨烯层或碳纳米管层；形成于所述石墨烯层或碳纳米管层上且暴露部分所述石墨烯层或碳纳米管层的栅极结构，所述栅极结构包括栅堆叠和侧墙；形成于所述栅极结构两侧的石墨烯层或碳纳米管层202上的金属接触层。
在其他实施例中，所述半导体器件还可以包括：半导体层，所述半导体层夹于所述金属接触层和所述石墨烯层或碳纳米管层之间。
其中所述石墨烯层或碳纳米管层可包括单层或多层结构。其中，对半导体器件各实施例中各部分的结构组成、材料及形成方法等均可与前述半导体器件的制造方法实施例中描述的相同，不在赘述。
虽然关于示例实施例及其优点已经详细说明，应当理解在不脱离本发明的精神和所附权利要求限定的保护范围的情况下，可以对这些实施例进行各种变化、替换和修改。对于其他例子，本领域的普通技术人员应当容易理解在保持本发明保护范围内的同时，工艺步骤的次序可以变化。
此外，本发明的应用范围不局限于说明书中描述的特定实施例的工艺、机构、制造、物质组成、手段、方法及步骤。从本发明的公开内容，作为本领域的普通技术人员将容易地理解，对于目前已存在或者以后即将开发出的工艺、机构、制造、物质组成、手段、方法或步骤，其中它们执行与本发明描述的对应实施例大体相同的功能或者获得大体相同的结果，依照本发明可以对它们进行应用。因此，本发明所附权利要求旨在将这些工艺、机构、制造、物质组成、手段、方法或步骤包含在其保护范围内。
Claims (10)
1.一种半导体器件的制造方法，包括：
提供衬底，所述衬底上形成有石墨烯层或碳纳米管层；
在所述石墨烯层或碳纳米管层上形成栅极结构后，暴露部分所述石墨烯层或碳纳米管层，所述栅极结构包括栅堆叠、侧墙和帽层，所述帽层位于所述栅堆叠上，所述侧墙环绕所述栅堆叠和所述帽层；
在暴露的所述石墨烯层或碳纳米管层上外延生长半导体层；
在所述半导体层上形成金属接触层。
2.根据权利要求1所述的方法，其特征在于：所述衬底为碳化硅、体硅、掺杂或未掺杂的硅玻璃中的一种或其组合。
3.根据权利要求1所述的方法，其特征在于：所述栅堆叠以金属、掺杂或未掺杂的多晶硅、非晶硅或硅玻璃承载所述帽层。
4.根据权利要求1所述的方法，其特征在于，所述栅堆叠以掺杂或未掺杂的多晶硅或非晶硅承载所述帽层时，在所述半导体层上形成金属接触层的步骤包括：
去除所述帽层，以暴露所述栅堆叠；
在所述半导体层和所述栅堆叠上形成金属接触层。
5.根据权利要求1所述的方法，其特征在于，在所述半导体层上形成金属接触层的步骤包括：
在所述半导体层上形成金属层；
执行退火操作，使所述金属层和所述半导体层反应生成所述金属接触层；
去除未反应的所述金属层。
6.根据权利要求1所述的方法，其特征在于：所述半导体层材料为掺杂或未掺杂的多晶硅、非晶硅、单晶硅、锗或硅锗。
7.一种半导体器件，包括：
衬底；
石墨烯层或碳纳米管层，所述石墨烯层或碳纳米管层形成于所述衬底上；
栅极结构，所述栅极结构形成于所述石墨烯层或碳纳米管层上，且暴露部分所述石墨烯层或碳纳米管层；
金属接触层，所述金属接触层环绕所述栅极结构，且位于暴露的所述石墨烯层或碳纳米管层上。
8.根据权利要求7所述的半导体器件，其特征在于，还包括：半导体层，所述半导体层夹于所述金属接触层和所述石墨烯层或碳纳米管层之间。
9.根据权利要求8所述的半导体器件，其特征在于：所述半导体层材料为掺杂或未掺杂的多晶硅、非晶硅、单晶硅、锗或硅锗。
10.根据权利要求7所述的半导体器件，其特征在于：所述衬底为碳化硅、体硅、掺杂或未掺杂的硅玻璃中的一种或其组合。
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| PCT/CN2011/001292 WO2012126155A1 (zh) | 2011-03-18 | 2011-08-05 | 一种半导体器件及其制造方法 |
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| CN104282568A (zh) * | 2013-07-06 | 2015-01-14 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
| CN104425365A (zh) * | 2013-09-11 | 2015-03-18 | 中国科学院微电子研究所 | 一种自对准接触工艺 |
| CN110571333A (zh) * | 2019-08-13 | 2019-12-13 | 北京元芯碳基集成电路研究院 | 一种无掺杂晶体管器件制作方法 |
| CN112310019A (zh) * | 2019-08-02 | 2021-02-02 | 美光科技公司 | 包括用于热管理的石墨烯层的存储器模块和存储器封装 |
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| CN104393027B (zh) * | 2014-09-29 | 2017-06-27 | 国家纳米科学中心 | 一种全碳石墨烯器件及其制备方法 |
| US10217819B2 (en) * | 2015-05-20 | 2019-02-26 | Samsung Electronics Co., Ltd. | Semiconductor device including metal-2 dimensional material-semiconductor contact |
| US10559675B2 (en) | 2017-12-21 | 2020-02-11 | International Business Machines Corporation | Stacked silicon nanotubes |
| CN113097072B (zh) * | 2021-03-02 | 2022-07-22 | 中国电子科技集团公司第五十五研究所 | 一种采用介质牺牲层工艺制备石墨烯场效应晶体管的方法 |
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| CN102683209B (zh) | 2015-01-21 |
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