CN102655148A - Tft基板及其制备方法、液晶显示装置、及电子纸显示装置 - Google Patents

Tft基板及其制备方法、液晶显示装置、及电子纸显示装置 Download PDF

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CN102655148A
CN102655148A CN2012100740469A CN201210074046A CN102655148A CN 102655148 A CN102655148 A CN 102655148A CN 2012100740469 A CN2012100740469 A CN 2012100740469A CN 201210074046 A CN201210074046 A CN 201210074046A CN 102655148 A CN102655148 A CN 102655148A
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tft substrate
electrode
zone
pixel electrode
tft
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盖翠丽
张卓
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BOE Technology Group Co Ltd
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Priority to US13/994,080 priority patent/US8963160B2/en
Priority to PCT/CN2012/087232 priority patent/WO2013139158A1/zh
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13452Conductors connecting driver circuitry and terminals of panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0288Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods

Abstract

本发明公开了一种TFT基板及其制备方法、液晶显示装置、及电子纸显示装置,涉及TFT技术领域。该TFT基板,包括:有源像素区域以及布线区域,所述布线区域内形成有导电电极,所述导电电极接地。本发明的TFT基板及其制备方法、液晶显示装置、以及电子纸显示装置在不增加制造成本的情况下,可以释放模组段制作期间产生在TFT基板的高压静电,进而提高产品的可靠性。

Description

TFT基板及其制备方法、液晶显示装置、及电子纸显示装置
技术领域
本发明涉及薄膜晶体管(Thin Film Transistor Liquid CrystalDisplay,TFT)技术领域,尤其涉及一种TFT基板及其制备方法、液晶显示装置、及电子纸显示装置。
背景技术
无论何种有源显示器件(液晶显示器、电子纸显示器等等)均需要使用有源矩阵驱动技术。例如,TFT技术就是实现有源矩阵的一种。电子纸显示器通常由TFT基板以及电子纸基板对盒而成。TFT基板负责输入数据信号对图像显示进行控制,由有源像素区域以及有源像素区域外围的布线区域组成,有源像素区域(显示区)由矩阵形式排列的多个有源像素单元组成,每个像素单元为两条栅线和两条数据线交叉所形成的矩形区域,其内设置TFT以及一像素电极,每个TFT的栅极及源极均分别与栅线及数据线相连,数据线和扫描线引线至布线区域,分别与数据线驱动IC以及扫描线驱动IC相连,数据线驱动IC以及扫描线驱动IC再与外部柔性电路板(Flexible Printed Circuit,FPC)连接,以由FPC为TFT的栅极及源极提供驱动电压。如图1所示,传统的电子纸显示装置的TFT基板包括有源像素区域1以及布线区域2,在布线区域2分别包括:数据线及扫描线驱动IC绑定区202、数据线及扫描线外围布线区(fan-out)203、驱动IC与外部FPC之间的连线区204、以及FPC绑定区205,驱动IC绑定区202用于设置驱动IC。
在有源显示器件的制备过程中,TFT基板制作完成后至显示器制作完成前的模组阶段,TFT基板是一直裸露在空气中的。在这个阶段中通常会由于摩擦而产生电压高达数千伏的静电,传导至面板内部产生高强度的瞬间电流,会对面板产生不可修复的破环。
发明内容
(一)要解决的技术问题
本发明要解决的技术问题是:提供一种可以释放模组段制作期间产生在TFT基板的高压静电的TFT基板及其制备方法、液晶显示装置、以及电子纸显示装置。
(二)技术方案
为解决上述问题,本发明提供了一种TFT基板,包括:有源像素区域以及布线区域,所述布线区域内形成有导电电极,所述导电电极接地。
优选地,所述导电电极形成于部分或全部所述布线区域内没有像素电极图形的区域。
优选地,所述有源像素区域内形成有像素电极,所述导电电极与所述像素电极在同一层。
优选地,所述布线区域内包括柔性电路板绑定区,所述柔性电路板绑定区内设置有接地端子,所述导电电极与所述接地端子相连。
优选地,所述导电电极为氧化铟锡电极。
本发明还提供了一种TFT基板的制备方法,该方法在TFT基板的布线区域内形成有导电电极。
优选地,该方法包括步骤:在沉积像素电极层后,通过像素电极掩模板形成像素电极图形,所述像素电极图形形成像素电极,并覆盖部分或全部布线区域,形成导电电极。
优选地,该方法包括步骤:在沉积像素电极层后,通过像素电极掩模板形成像素电极图形,所述像素电极图形形成像素电极;在部分或全部布线区域内没有像素电极图形的区域沉积一层导电电极。
本发明还提供了一种液晶显示装置,该装置包括上述TFT基板。
本发明还提供了一种电子纸显示装置,该装置包括上述TFT基板。
(三)有益效果
本发明的TFT基板及其制备方法、液晶显示装置、以及电子纸显示装置在不增加制造成本的情况下,可以释放模组段制作期间产生在TFT基板的高压静电,进而提高产品的可靠性。
附图说明
图1为传统的电子纸显示装置TFT基板的结构示意图;
图2为依照本发明一种实施方式的TFT基板的制备方法制备的TFT阵列基板的剖面示意图;
图3为本发明实施例的电子纸显示装置TFT基板的结构示意图。
具体实施方式
本发明提出的TFT基板及其制备方法、液晶显示装置、及电子纸显示装置,结合附图及实施例详细说明如下。
依照本发明一种实施方式的TFT基板包括:有源像素区域以及布线区域,布线区域内形成有导电电极,且该导电电极接地,从而通过该导电电极释放在有源器件制作期间在TFT基板上产生的高压静电,提高产品的可靠性。该导电电极形成于部分或全部布线区域内没有像素电极图形的区域。
在本发明的TFT基板中,导电电极可与像素电极在同一层。导电电极可与像素电极由同样的材料(例如:氧化铟锡ITO)在同一或不同的制备过程中形成,以节省成本。导电电极也可为与像素电极不同的材料,形成像素电极之后,在部分或全部布线区域内没有像素电极图形的区域形成。
本发明还提供了一种上述TFT基板的制备方法,该方法在制备导电电极之前的过程与传统的4MASK、5MASK等TFT基板的制备工艺的过程一致。以5MASK工艺为例,制备的TFT基板如图2所示,其中每一层都经过溅射(Sputter)或等离子体增强化学气相沉积(PECVD)方法沉积、涂覆光刻胶、曝光、显影、刻蚀、以及剥离光刻胶工序,该方法包括步骤:
S1.在光玻璃基板101上利用Sputter沉积栅层金属(如Mo)层102,由掩模板形成栅极和存储电容图形;
S2.利用PECVD在步骤S1得到的基板上分别沉积第一绝缘层103、有源层及掺杂层104,利用掩模板形成有源层图形;
S3.利用Sputter沉积源漏金属(如Mo)层,利用掩模板形成源漏图形105;
S4.由掩模板形成过孔图形106;
S5.利用Sputter沉积ITO,利用像素电极掩模板形成像素电极图形,该像素电极图形形成像素电极107,并覆盖部分或全部布线区域形成导电电极108。或者:
步骤S5为:
利用Sputter沉积ITO,利用像素电极掩模板形成像素电极图形,形成像素电极107,再在部分或全部布线区域内没有像素电极图形的区域沉积一层导电电极108,该导电电极108的材料可与像素电极107相同为ITO,也可不同。
本发明还提供包括上述TFT基板的任意有源器件,例如液晶显示装置或电子纸显示装置等。
本实施例以电子纸显示装置为例,说明本发明。
电子纸显示装置由TFT基板与电子纸基板对扣成盒而成,该电子纸基板依次包括:封盖、公共电极层以及配置在该公共电极层与TFT基板之间的电子墨水材料层。除TFT基板之外的构成电子纸显示装置的必要的上述以及未提到的组成部件在此不做赘述,也不应作为对本发明的限制。
如图3所示,本实施例的电子纸显示装置的TFT基板在图1所示的TFT基板的基础上,在部分布线区域2没有ITO图形的区域形成有导电电极108,FPC绑定区205内接地端子,导电电极108连接至该接地端子。
以上实施方式仅用于说明本发明,而并非对本发明的限制,有关技术领域的普通技术人员,在不脱离本发明的精神和范围的情况下,还可以做出各种变化和变型,因此所有等同的技术方案也属于本发明的范畴,本发明的专利保护范围应由权利要求限定。

Claims (10)

1.一种TFT基板,包括:有源像素区域以及布线区域,其特征在于,所述布线区域内形成有导电电极,所述导电电极接地。
2.如权利要求1所述的TFT基板,其特征在于,所述导电电极形成于部分或全部所述布线区域内没有像素电极图形的区域。
3.如权利要求2所述的TFT基板,其特征在于,所述有源像素区域内形成有像素电极,所述导电电极与所述像素电极在同一层。
4.如权利要求1所述的TFT基板,其特征在于,所述布线区域内包括柔性电路板绑定区,所述柔性电路板绑定区内设置有接地端子,所述导电电极与所述接地端子相连。
5.如权利要求1-4任一项所述的TFT基板,其特征在于,所述导电电极为氧化铟锡电极。
6.一种TFT基板的制备方法,其特征在于,该方法在TFT基板的布线区域内形成有导电电极。
7.如权利要求6所述的TFT基板的制备方法,其特征在于,该方法包括步骤:
在沉积像素电极层后,通过像素电极掩模板形成像素电极图形,所述像素电极图形形成像素电极,并覆盖部分或全部布线区域,形成导电电极。
8.如权利要求6所述的TFT基板的制备方法,其特征在于,该方法包括步骤:
在沉积像素电极层后,通过像素电极掩模板形成像素电极图形,所述像素电极图形形成像素电极;
在部分或全部布线区域内没有像素电极图形的区域沉积一层导电电极。
9.一种液晶显示装置,其特征在于,该装置包括权利要求1-5任一项所述的TFT基板。
10.一种电子纸显示装置,其特征在于,该装置包括权利要求1-5任一项所述的TFT基板。
CN2012100740469A 2012-03-20 2012-03-20 Tft基板及其制备方法、液晶显示装置、及电子纸显示装置 Pending CN102655148A (zh)

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CN2012100740469A CN102655148A (zh) 2012-03-20 2012-03-20 Tft基板及其制备方法、液晶显示装置、及电子纸显示装置
US13/994,080 US8963160B2 (en) 2012-03-20 2012-12-23 Thin film transistor array substrate, manufacturing method thereof and display device
PCT/CN2012/087232 WO2013139158A1 (zh) 2012-03-20 2012-12-23 薄膜晶体管阵列基板及其制备方法和显示装置

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