CN102448244B - 用于高速信号设计的印刷电路板 - Google Patents

用于高速信号设计的印刷电路板 Download PDF

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CN102448244B
CN102448244B CN201110304333.XA CN201110304333A CN102448244B CN 102448244 B CN102448244 B CN 102448244B CN 201110304333 A CN201110304333 A CN 201110304333A CN 102448244 B CN102448244 B CN 102448244B
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CN102448244A (zh
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威尔林·程
罗杰·卡尔阿姆
塞吉奥·卡麦格
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Cisco Technology Inc
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    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H05K1/0222—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors for shielding around a single via or around a group of vias, e.g. coaxial vias or vias surrounded by a grounded via fence
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    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09309—Core having two or more power planes; Capacitive laminate of two power planes
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09809—Coaxial layout
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    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/061—Lamination of previously made multilayered subassemblies
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
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    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128—Assembling formed circuit to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49162—Manufacturing circuit on or in base by using wire as conductive path
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
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Abstract

本发明公开了一种用于高速信号设计的印刷电路板以及制造该印刷电路板的方法。所述方法包括：将多个层装配成叠层，以使所述叠层中的所述多个层具有顶信号层和底信号层；形成穿过所述多个层的中空通孔，以连接所述印刷电路板中的GND层；在所述中空通孔内形成或嵌入用非导电材料涂覆的导体；用图案化的介电信号层覆盖所述顶层和底层；用掩蔽剂覆盖所述顶层和底层；用连接通孔内的信号迹线的导电材料镀覆所述顶层和底层；从所述顶层和底层上去除所述掩蔽剂。

Description

用于高速信号设计的印刷电路板
相关申请的交叉引用
本申请要求2005年12月2日提交的美国专利申请No.11/292536的优先权，并通过引用将其全文结合在本文中。本申请是2008年5月23日进入中国国家阶段的中国发明专利申请200680043847.1(题目为“用于高速信号设计的印刷电路板中的同轴通孔”，对应于国际申请日为2006年12月4日的PCT申请PCT/US2006/061550)的分案申请。 
技术领域
本发明一般地涉及印刷电路板(PCB)组装，更具体地涉及构造穿过PCB叠层的同轴通孔。 
背景技术
PCB通常由两个或更多个层构成，这些层叠积在一起，各层之间被电介质材料隔开。这些层可以具有不同的厚度，并且在PCB中可以使用不同的电介质材料。可以对所有层应用布线或其它种类的铜结构。PCB的最外层(顶层和底层)可以具有安装在其外表面上的构件。多层PCB相对于单层结构的重要优点是：多层PCB在较小的引脚尺寸上具有更大的布线空间，这对当前对更小尺寸构件的设计要求尤为重要。 
通孔(via)将不同PCB层上的迹线互连并将各层与电源层和/或接地层相连。通孔的物理性质取决于电路板的几何形状和可用空间以及应用场合。例如，在高速信号应用中，特别是对PCB应用GHz量级的频率时，层与层之间要求阻抗匹配转换。 
在高速信号设计中，阻抗连续性对于所有的互连元件(包括迹线、连接器、缆线等)都是必要的。在所有这些互连元件中，通孔最难实现阻抗控制，这是因为传统的PCB工艺流程不能制造同轴通孔。高频应用特别需 要同轴通孔技术，因为这可以实现真正的信号阻抗连续性，提供优异的地线(GND)回路，并且有效地降低通孔之间的串扰以及通孔与迹线之间的串扰。 
一种现有的方法是用多个GND通孔包围一个信号通孔。采用这种方法，极大地改善了回路和阻抗控制。然而，额外的GND通孔占用了多层PCB引脚上的有效空间。为了节省空间，另一种现有的方法是将通孔一分为四，其中一对用作信号通孔，另一对用作GND通孔。然而遗憾的是，这种分割型通孔的性能令人难以接受。因此，确实存在对于改善在多层PCB中构造的通孔的阻抗控制和性能的需要。 
发明内容
本发明通过在多层PCB中形成同轴通孔解决了上述问题。在本发明中，通孔的镀覆壁面充当同轴通孔的接地回路，而且它还连接PCB中的所有接地层。在一个方面，本发明提供了一种制造具有同轴通孔的印刷电路板(PCB)的方法。首先装配具有顶部信号层和底部信号层的叠层。形成穿过该叠层的中空通孔以连接所有GND层，并将涂覆非导电材料的导体嵌入该通孔。先用图案化的介电信号层覆盖顶层和底层，然后再覆盖掩蔽剂。在一种实施方式中，所述掩蔽剂是光刻胶。然后用导电材料镀覆顶层和底层以连接通孔内的信号迹线，并将掩蔽剂从顶层和底层去除。在一种实施方式中，可以使用这种方法制造多个印刷电路板层，然后将其层压形成叠层构造，其中所述叠层构造中的每个印刷电路板层均具有通孔，该通孔的位置与叠层构造中的相邻印刷电路板上的通孔对齐。 
在另一个方面，本发明提供了一种制造具有通孔的印刷电路板的方法，所述方法包括：装配多个层以形成叠层，以使所述多个层具有顶层和底层。形成穿过所述多个层的中空通孔并填充电介质材料。形成穿过所述电介质材料的孔(hole)，以形成连接所述顶层与底层的小孔(aperture)。在所述小孔内嵌入或原位形成涂覆非导电材料的导体。用图案化的介电信号层覆盖顶部信号层23和底部信号层25，然后用掩蔽剂覆盖。然后用导电材料镀覆顶层和底层以连接通孔内的信号迹线，并将掩蔽 剂从顶层和底层去除。在一种实施方式中，可以使用这种方法制造多个印刷电路板层，然后将其层压形成叠层构造，其中所述叠层构造中的每个印刷电路板层均具有通孔，该通孔的位置与叠层构造中的相邻印刷电路板上的通孔对齐。 
通过以下详细描述并结合附图，可以清楚的了解本发明的其它特征和优点。 
附图说明
图1示出了其中形成有与同轴通孔相适应的小孔的多层PCB； 
图2示出了被图案化的介电信号层覆盖的图1的多层PCB； 
图3示出了增加了另外的电介质层22的多层PCB； 
图4示出了被掩蔽剂部分覆盖以限定电介质层从而暴露用于镀覆的信号区域的多层PCB； 
图5示出了已去除掩蔽剂的图4的多层PCB； 
图6示出了具有为了镀覆而涂覆于顶部和底部表面的掩蔽层的多层PCB； 
图7示出了具有涂覆于顶部和底部表面的镀覆层的多层PCB； 
图8示出了已去除掩蔽层的多层PCB； 
图9示出了具有填充了电介质材料的通孔的多层PCB； 
图10示出了具有形成在填充了电介质材料的通孔内的小孔的图9的多层PCB； 
图11示出了具有嵌入形成在电介质材料的小孔中的同轴通孔的图13的多层PCB； 
图12示出了装配成叠层前的多个多层PCB； 
图13示出了装配成叠层后的图12的多层PCB。 
具体实施方式
图1-13示出了根据本发明的实施方式的整个方法的各个阶段的多层PCB的剖面图。在某些情况下，为了清楚起见，图1-13所示的PCB的尺寸有所放大。现在参见图1，图1示出了PCB 10，PCB 10具有设置成叠 层的多个层12，且其上形成有小孔以提供通孔14。如图所示，PCB 10包括电介质层22和接地层24，但在其它实施方式中，至少某些接地层24可被电源层替换。在一种实施方式中，通孔14在其孔内表面上涂覆有导电涂层材料15。导电涂层材料15用作同轴通孔的接地回路。导电涂层材料15还连接PCB 10中的所有GND层24。同轴通孔16嵌套在通孔14内。 
图中所示的同轴通孔16内具有被绝缘层20包围的导电元件18。图2中增加了信号层23、25，然后图3中增加了另外的电介质层22。如图4所示，掩蔽材料(如光刻胶)被涂覆以形成掩蔽层26，从而限定下方的电介质层22，暴露用于镀覆的信号区域。然后去除掩蔽层26，如图5所示。在优选的实施方式中，通过已知的方法去除光刻胶。 
现在参见图6，将掩蔽层26再次涂覆于PCB 10的顶部和底部表面。在图7中，增加了镀覆层28、29。增加镀覆层28、29之后，去除掩蔽层26，PCB 10的镀覆层28、29通过同轴通孔16连接。 
在另一种实施方式中，本发明提供了形成在PCB中的用电介质材料填充的通孔。电介质材料内形成有小孔，并且同轴通孔嵌套在所述小孔中。参见图9，多层PCB 50由电介质层62和GND层64构成，多层PCB 50包括通孔52，通孔52的表面涂覆有导电涂层材料53。然后用电介质材料54填充通孔52。然后形成穿过电介质材料54的小孔56，如图10所示。用导电材料60镀覆小孔56，形成具有导电元件60、电介质层54和保护层53的同轴通孔58，如图11所示。然后如图2-5所述处理PCB 50。首先，将电介质层涂覆在PCB 50的顶部和底部表面上。涂覆电介质层之后，涂覆信号层。然后，通过将掩蔽材料加到PCB 50的顶部和底部表面上，使PCB 50准备用于镀覆。然后在顶部和底部表面上对PCB 50进行镀覆，并去除掩蔽材料。在优选的实施方式中，掩蔽材料是光刻胶，采用已知方法去除掩蔽材料。 
可以使用各种技术来涂覆光刻胶，包括将PCB 10、50浸渍在光刻胶溶液中，或将光刻胶溶液喷雾、刷涂或辊涂在所需表面上。涂覆光刻胶之后，可以采用已知技术将过量的溶剂从PCB 10、50中烘焙出来，例如使PCB 10、50受到热空气的环流或将红外线或其它辐射热源聚集在 PCB10、50上。 
在本发明的实施方式采用的镀覆过程中，金属被涂覆在通孔16上，从而在PCB 10、50的顶部表面与底部表面之间提供有效的连接，这是通过与所形成的通孔形成连接来实现的。所选金属应当具有高电导率，以便于承载高电流而不降低电压。而且，所选金属应当对于各层包围通孔16的表面具有良好的粘附性。 
现在参见图12和13，在本发明的实施方式中，通过依次层压PCB层80、82、84，将多个PCB 10、50装配成单一的多层PCB 100。以此方式，通孔86将至少一个内层88与多层PCB中的另一个层90连接，这对于半导通孔是有用的。虽然图12和13放大了PCB层80、82、84的尺寸，但应理解金属层的实际厚度并不影响将图12中的PCB层80、82、84层压成多层PCB 100。还应理解，尽管图12中示出了3个PCB层，但多层PCB 100的结构还可包括其它的PCB层。在PCB层80、82、84的层压中，可以使用现有的PCB板层压时所用的各种粘附剂。此外，虽然PCB层80、82、84均包含接地层和/或电源层，但在一种实施方式中，最终的组件中也可以包括一些不具有电源层或接地层但具有本发明的同轴通孔的层。 
PCB 10、50、100可以包含粘附在一层绝缘体上的经蚀刻的导体。具有导电性的经蚀刻的导体也被称为迹线或轨线。绝缘体被称为基板。根据本发明的各种实施方式，PCB 10、50可使用各种方法来进行构造。PCB 10、50、100的结构中可混入抗蚀油墨，从而保护本发明的多构件叠层的外表面或构件表面上铜箔。后续的蚀刻去除不期望的铜。或者，在涉及混合电路应用的实施方式中，油墨可具有导电性，印刷在空白(非导电性)板上。PCB 10、50、100的结构还可以包括光掩膜，并如上所述通过化学蚀刻将铜箔从基板上去除。还可以使用2轴或3轴机械研磨系统将铜箔从基板上研磨掉，来构造PCB 10、50、100。 
根据本发明的实施方式，PCB 10、50、100可包括由用酚醛树脂(如PertinaxTM)浸渍的纸张制成的基板。在其它实施方式中，基板由FR-4材料构成。在其它实施方式中，基板由具有低介电常数(电容率)和损耗因 数的塑料构成，例如 4000、 Duroid、 (GT和GX型)产品、聚亚胺、聚苯乙烯和交联聚苯乙烯。对于使用柔性PCB的应用，PCB 10、50、100可包括由 聚亚胺薄膜等构成的基板。 
PCB 10、50、100还可以包括在将构件焊接到PCB 10、50之后通过浸渍或喷雾而涂覆的保形涂层。该保形涂层可以是在真空室中溅射到PCB 10、50、100上的硅酮橡胶或环氧化物或塑料的稀溶液。 
尽管上文详细描述了本发明的优选实施方式，但应当认识到，在不脱离本发明的精神的前提下，可以对本发明的实施方式进行各种改进。 

Claims (11)

1.一种印刷电路板，包括：
构造成叠层的多个层，所述多个层具有顶层和底层以及至少一个导电层；
穿过所述多个层中至少一层的中空通孔；
在所述中空通孔中，在限定所述中空通孔的表面上设置了导电材料，以及用非导电材料涂覆的导体；
其中，在所述顶层和底层上分别设置电介质层，并且在所述顶层和底层上设置导电材料；
其中，设置所述中空通孔，使得所述中空通孔的所述导体连接所述多个层中的两层，所述两层中至少一层是内层，而所述两层中另一层是所述顶层和底层之一，并且所述中空通孔的所述导体不将所述顶层上的导电材料与所述底层上的导电材料连接。
2.如权利要求1的印刷电路板，其中所述至少一个导电层包括至少一个接地层。
3.如权利要求1的印刷电路板，其中所述至少一个导电层包括至少一个电源层。
4.一种印刷电路板，包括：
层压成叠层构造以形成单个印刷电路板的多个印刷电路板层，其中层压叠层构造中的每个印刷电路板层包括构造成叠层的多个层，所述多个印刷电路板层具有顶层和底层以及至少一个导电层；
穿过所述多个层形成的多个中空通孔，所述中空通孔具有限定表面，所述限定表面具有涂覆于其上的导电材料，所述导电材料与所述至少一个导电层连接；
在每个所述中空通孔内的用非导电材料涂覆的导体；
其中，在所述顶层和底层上分别设置电介质层，并且在所述顶层和底层上设置导电材料，所述顶层上的导电材料通过所述多个中空通孔中至少一个中空通孔内的导体与所述底层上的导电材料连接，使得在每一个印刷电路板中所述至少一个中空通孔与以叠层构造层压在一起的印刷电路板层中的相邻印刷电路板层中的所述至少一个中空通孔对齐；并且
其中，设置所述多个中空通孔中至少另一个，使得所述至少另一个中空通孔的所述导体连接所述多个层中的两层，所述两层中至少一层是内层，而所述两层中另一层是所述顶层和底层之一，并且所述至少另一个中空通孔的所述导体不将所述顶层上的导电材料与所述底层上的导电材料连接。
5.如权利要求4的印刷电路板，其中所述至少一个导电层包括至少一个接地层。
6.如权利要求4的印刷电路板，其中所述至少一个导电层包括至少一个电源层。
7.如权利要求4的印刷电路板，其中所述至少另一个中空通孔的导体将所述内层与所述叠层构造的顶层上的导电材料或所述叠层构造的底层上的导电材料之一相连接。
8.一种印刷电路板，包括：
构造成叠层的多个层，所述多个层具有顶层和底层以及至少一个导电层；
穿过所述多个层中至少一个层设置的第一通孔，其中所述第一通孔在其内表面上涂覆导电材料，所述导电材料与所述至少一个导电层连接，其中所述第一通孔用电介质材料填充，所述电介质材料具有小孔，在所述电介质材料小孔内设置导体；和
穿过所述多个层中至少一个层设置的第二通孔，其中所述第二通孔在其内表面上涂覆导电材料，所述导电材料与所述至少一个导电层连接，其中所述第二通孔用电介质材料填充，所述电介质材料具有小孔并在所述电介质材料小孔内设置导体；
其中，所述顶层和底层包括电介质层并且导电材料被设置在所述顶层和所述底层上；
其中位于所述第一通孔内的所述导体将所述多个层中的一内层与所述顶层或底层中一层上的导电材料相连接；
其中位于所述第二通孔内的所述导体将所述多个层中的另一内层与所述顶层或底层中所述一层上的导电材料相连接；并且
其中位于所述第一通孔内的所述导体和位于所述第二通孔内的所述导体都不将所述顶层的导电材料与所述底层上的导电材料相连接。
9.如权利要求8的印刷电路板，其中所述至少一个导电层包括至少一个接地层。
10.如权利要求8的印刷电路板，其中所述至少一个导电层包括至少一个电源层。
11.如权利要求8的印刷电路板，还包括：
穿过所述多个层设置的第三通孔，其中所述第三通孔在其内表面上涂覆导电材料，所述导电材料与所述至少一个导电层连接，其中所述第三通孔用电介质材料填充，所述电介质材料具有小孔并在所述电介质材料小孔内设置导体；
其中所述第三通孔的所述导体都将所述顶层的导电材料与所述底层上的导电材料相连接。
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Families Citing this family (132)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG135065A1 (en) * 2006-02-20 2007-09-28 Micron Technology Inc Conductive vias having two or more elements for providing communication between traces in different substrate planes, semiconductor device assemblies including such vias, and accompanying methods
US7851709B2 (en) * 2006-03-22 2010-12-14 Advanced Semiconductor Engineering, Inc. Multi-layer circuit board having ground shielding walls
TWI300264B (en) * 2006-03-27 2008-08-21 Advanced Semiconductor Eng Signal transmission structure, package structure and bonding method thereof
US7523545B2 (en) 2006-04-19 2009-04-28 Dynamic Details, Inc. Methods of manufacturing printed circuit boards with stacked micro vias
US7629541B2 (en) * 2006-06-19 2009-12-08 Endicott Interconnect Technologies, Inc. High speed interposer
KR100761706B1 (ko) * 2006-09-06 2007-09-28 삼성전기주식회사 인쇄회로기판 제조방법
US20080157335A1 (en) * 2006-12-28 2008-07-03 Jia Miao Tang Strip patterned transmission line
US8084695B2 (en) * 2007-01-10 2011-12-27 Hsu Hsiuan-Ju Via structure for improving signal integrity
US8153906B2 (en) * 2007-01-10 2012-04-10 Hsu Hsiuan-Ju Interconnection structure for improving signal integrity
JP4978269B2 (ja) * 2007-03-27 2012-07-18 日本電気株式会社 多層配線基板
WO2009008741A1 (en) * 2007-07-09 2009-01-15 Power Concepts Nz Limited Layered structure connection and assembly
US20090034156A1 (en) * 2007-07-30 2009-02-05 Takuya Yamamoto Composite sheet
US7654870B2 (en) * 2008-02-11 2010-02-02 Z-Plane, Inc. Interconnection assembly for printed circuit boards
US8089005B2 (en) * 2008-03-17 2012-01-03 Liquid Design Systems Inc. Wiring structure of a substrate
KR101480356B1 (ko) * 2008-06-09 2015-01-09 삼성디스플레이 주식회사 연성 인쇄 회로 기판 및 이를 포함하는 액정 표시 장치
US8273995B2 (en) * 2008-06-27 2012-09-25 Qualcomm Incorporated Concentric vias in electronic substrate
TWI393490B (zh) * 2008-12-31 2013-04-11 Ind Tech Res Inst 多組同軸導線於基材之單一通孔中之結構與其製作方法
US8227706B2 (en) * 2008-12-31 2012-07-24 Intel Corporation Coaxial plated through holes (PTH) for robust electrical performance
CN102265708B (zh) * 2009-03-25 2015-02-11 莫列斯公司 高数据率连接器系统
US8955215B2 (en) 2009-05-28 2015-02-17 Hsio Technologies, Llc High performance surface mount electrical interconnect
US9536815B2 (en) 2009-05-28 2017-01-03 Hsio Technologies, Llc Semiconductor socket with direct selective metalization
WO2011139619A1 (en) 2010-04-26 2011-11-10 Hsio Technologies, Llc Semiconductor device package adapter
US9276336B2 (en) 2009-05-28 2016-03-01 Hsio Technologies, Llc Metalized pad to electrical contact interface
US8618649B2 (en) 2009-06-02 2013-12-31 Hsio Technologies, Llc Compliant printed circuit semiconductor package
US9277654B2 (en) 2009-06-02 2016-03-01 Hsio Technologies, Llc Composite polymer-metal electrical contacts
US8970031B2 (en) 2009-06-16 2015-03-03 Hsio Technologies, Llc Semiconductor die terminal
WO2010141266A1 (en) 2009-06-02 2010-12-09 Hsio Technologies, Llc Compliant printed circuit peripheral lead semiconductor package
WO2010141316A1 (en) 2009-06-02 2010-12-09 Hsio Technologies, Llc Compliant printed circuit wafer probe diagnostic tool
WO2010141295A1 (en) 2009-06-02 2010-12-09 Hsio Technologies, Llc Compliant printed flexible circuit
US9613841B2 (en) 2009-06-02 2017-04-04 Hsio Technologies, Llc Area array semiconductor device package interconnect structure with optional package-to-package or flexible circuit to package connection
WO2010141297A1 (en) 2009-06-02 2010-12-09 Hsio Technologies, Llc Compliant printed circuit wafer level semiconductor package
US8610265B2 (en) 2009-06-02 2013-12-17 Hsio Technologies, Llc Compliant core peripheral lead semiconductor test socket
US9699906B2 (en) 2009-06-02 2017-07-04 Hsio Technologies, Llc Hybrid printed circuit assembly with low density main core and embedded high density circuit regions
WO2010141303A1 (en) 2009-06-02 2010-12-09 Hsio Technologies, Llc Resilient conductive electrical interconnect
US8988093B2 (en) 2009-06-02 2015-03-24 Hsio Technologies, Llc Bumped semiconductor wafer or die level electrical interconnect
US8928344B2 (en) 2009-06-02 2015-01-06 Hsio Technologies, Llc Compliant printed circuit socket diagnostic tool
US9093767B2 (en) 2009-06-02 2015-07-28 Hsio Technologies, Llc High performance surface mount electrical interconnect
WO2010141311A1 (en) 2009-06-02 2010-12-09 Hsio Technologies, Llc Compliant printed circuit area array semiconductor device package
WO2013036565A1 (en) 2011-09-08 2013-03-14 Hsio Technologies, Llc Direct metalization of electrical circuit structures
US9232654B2 (en) 2009-06-02 2016-01-05 Hsio Technologies, Llc High performance electrical circuit structure
US8987886B2 (en) 2009-06-02 2015-03-24 Hsio Technologies, Llc Copper pillar full metal via electrical circuit structure
US9320133B2 (en) 2009-06-02 2016-04-19 Hsio Technologies, Llc Electrical interconnect IC device socket
WO2010141318A1 (en) 2009-06-02 2010-12-09 Hsio Technologies, Llc Compliant printed circuit peripheral lead semiconductor test socket
US9196980B2 (en) 2009-06-02 2015-11-24 Hsio Technologies, Llc High performance surface mount electrical interconnect with external biased normal force loading
US9930775B2 (en) 2009-06-02 2018-03-27 Hsio Technologies, Llc Copper pillar full metal via electrical circuit structure
US9318862B2 (en) 2009-06-02 2016-04-19 Hsio Technologies, Llc Method of making an electronic interconnect
US9184527B2 (en) 2009-06-02 2015-11-10 Hsio Technologies, Llc Electrical connector insulator housing
US8525346B2 (en) 2009-06-02 2013-09-03 Hsio Technologies, Llc Compliant conductive nano-particle electrical interconnect
US9276339B2 (en) 2009-06-02 2016-03-01 Hsio Technologies, Llc Electrical interconnect IC device socket
US8803539B2 (en) 2009-06-03 2014-08-12 Hsio Technologies, Llc Compliant wafer level probe assembly
WO2010147782A1 (en) 2009-06-16 2010-12-23 Hsio Technologies, Llc Simulated wirebond semiconductor package
US9320144B2 (en) 2009-06-17 2016-04-19 Hsio Technologies, Llc Method of forming a semiconductor socket
US8984748B2 (en) 2009-06-29 2015-03-24 Hsio Technologies, Llc Singulated semiconductor device separable electrical interconnect
US8981809B2 (en) 2009-06-29 2015-03-17 Hsio Technologies, Llc Compliant printed circuit semiconductor tester interface
US8531042B2 (en) * 2009-06-30 2013-09-10 Oracle America, Inc. Technique for fabricating microsprings on non-planar surfaces
US8278568B2 (en) * 2009-07-23 2012-10-02 Lexmark International, Inc. Z-directed variable value components for printed circuit boards
US20110017504A1 (en) * 2009-07-23 2011-01-27 Keith Bryan Hardin Z-Directed Ferrite Bead Components for Printed Circuit Boards
US20110017502A1 (en) * 2009-07-23 2011-01-27 Keith Bryan Hardin Z-Directed Components for Printed Circuit Boards
US8735734B2 (en) * 2009-07-23 2014-05-27 Lexmark International, Inc. Z-directed delay line components for printed circuit boards
US8198548B2 (en) * 2009-07-23 2012-06-12 Lexmark International, Inc. Z-directed capacitor components for printed circuit boards
US20110017581A1 (en) * 2009-07-23 2011-01-27 Keith Bryan Hardin Z-Directed Switch Components for Printed Circuit Boards
US8198547B2 (en) * 2009-07-23 2012-06-12 Lexmark International, Inc. Z-directed pass-through components for printed circuit boards
US8237061B2 (en) * 2009-07-23 2012-08-07 Lexmark International, Inc. Z-directed filter components for printed circuit boards
US8273996B2 (en) * 2009-07-23 2012-09-25 Lexmark International, Inc. Z-directed connector components for printed circuit boards
US8354601B2 (en) * 2010-02-25 2013-01-15 Russell James V Method and structure for coaxial via routing in printed circuit boards for improved signal integrity
US9350093B2 (en) 2010-06-03 2016-05-24 Hsio Technologies, Llc Selective metalization of electrical connector or socket housing
US10159154B2 (en) 2010-06-03 2018-12-18 Hsio Technologies, Llc Fusion bonded liquid crystal polymer circuit structure
US9689897B2 (en) 2010-06-03 2017-06-27 Hsio Technologies, Llc Performance enhanced semiconductor socket
US8758067B2 (en) 2010-06-03 2014-06-24 Hsio Technologies, Llc Selective metalization of electrical connector or socket housing
EP2666342A4 (en) * 2011-01-21 2017-05-03 Lexmark International, Inc. Z-directed filter components for printed circuit boards
EP2487329B1 (de) 2011-02-08 2013-11-27 MTU Aero Engines GmbH Schaufelkanal mit Seitenwandkonturierung und zugehörige Strömungsmaschine
JP2012174874A (ja) * 2011-02-21 2012-09-10 Fujitsu Ltd プリント配線板の製造方法及びプリント配線板
TWI410198B (zh) * 2011-03-24 2013-09-21 Hon Hai Prec Ind Co Ltd 印刷電路板
CN102695358B (zh) * 2011-03-25 2015-04-08 中山市云创知识产权服务有限公司 印刷电路板
US20130021739A1 (en) * 2011-07-20 2013-01-24 International Business Machines Corporation Multi-layer Printed Circuit Board With Power Plane Islands To Isolate Noise Coupling
US8827746B2 (en) 2011-08-01 2014-09-09 Z-Plane, Inc. Crosstalk reduction
US9009954B2 (en) 2011-08-31 2015-04-21 Lexmark International, Inc. Process for manufacturing a Z-directed component for a printed circuit board using a sacrificial constraining material
US8790520B2 (en) 2011-08-31 2014-07-29 Lexmark International, Inc. Die press process for manufacturing a Z-directed component for a printed circuit board
US9078374B2 (en) 2011-08-31 2015-07-07 Lexmark International, Inc. Screening process for manufacturing a Z-directed component for a printed circuit board
US8943684B2 (en) * 2011-08-31 2015-02-03 Lexmark International, Inc. Continuous extrusion process for manufacturing a Z-directed component for a printed circuit board
US8658245B2 (en) 2011-08-31 2014-02-25 Lexmark International, Inc. Spin coat process for manufacturing a Z-directed component for a printed circuit board
US8752280B2 (en) 2011-09-30 2014-06-17 Lexmark International, Inc. Extrusion process for manufacturing a Z-directed component for a printed circuit board
JP2013118354A (ja) * 2011-11-02 2013-06-13 Japan Electronic Materials Corp 多層絶縁基板および多層絶縁基板の製造方法
US8822838B2 (en) 2012-03-29 2014-09-02 Lexmark International, Inc. Z-directed printed circuit board components having conductive channels for reducing radiated emissions
US8912452B2 (en) 2012-03-29 2014-12-16 Lexmark International, Inc. Z-directed printed circuit board components having different dielectric regions
US8822840B2 (en) 2012-03-29 2014-09-02 Lexmark International, Inc. Z-directed printed circuit board components having conductive channels for controlling transmission line impedance
US8830692B2 (en) 2012-03-29 2014-09-09 Lexmark International, Inc. Ball grid array systems for surface mounting an integrated circuit using a Z-directed printed circuit board component
US8884717B2 (en) * 2012-04-13 2014-11-11 Cyntec Co., Ltd. Diplexer
US9257221B2 (en) * 2012-04-13 2016-02-09 Cyntec Co., Ltd. Through-hole via inductor in a high-frequency device
US9185793B2 (en) 2012-05-30 2015-11-10 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. Multilayer electronic structure with through thickness coaxial structures
US9761520B2 (en) 2012-07-10 2017-09-12 Hsio Technologies, Llc Method of making an electrical connector having electrodeposited terminals
CN104604345A (zh) * 2012-08-31 2015-05-06 索尼公司 布线板及布线板的制造方法
US10506722B2 (en) 2013-07-11 2019-12-10 Hsio Technologies, Llc Fusion bonded liquid crystal polymer electrical circuit structure
US10667410B2 (en) 2013-07-11 2020-05-26 Hsio Technologies, Llc Method of making a fusion bonded circuit structure
US9635761B2 (en) 2013-07-15 2017-04-25 Massachusetts Institute Of Technology Sleeved coaxial printed circuit board vias
TWI484876B (zh) 2013-12-20 2015-05-11 Ind Tech Res Inst 具傳輸孔之電路板及其製造方法
WO2015116093A1 (en) * 2014-01-30 2015-08-06 Hewlett-Packard Development Company, L.P. Printed circuit board with co-axial vias
US9275975B2 (en) 2014-03-28 2016-03-01 Intel Corporation Electronic package and method of connecting a first die to a second die to form an electronic package
US10321557B2 (en) 2014-04-17 2019-06-11 Massachusetts Institute Of Technology Printed circuit board assembly with air dielectric
US10249943B2 (en) 2014-06-18 2019-04-02 Massachusetts Institute Of Technology Printed circuit board assembly with foam dielectric material
CN104202955B (zh) * 2014-08-15 2019-05-28 潍柴动力股份有限公司 一种提高电路电磁兼容性的装置
EP3195703B1 (en) * 2014-09-02 2021-07-28 Telefonaktiebolaget LM Ericsson (publ) A signal transition component
US9414496B2 (en) * 2014-12-18 2016-08-09 Oracle International Corporation Method for a printed circuit board with an array of high density AC coupling/DC blocking capacitors
US9755335B2 (en) 2015-03-18 2017-09-05 Hsio Technologies, Llc Low profile electrical interconnect with fusion bonded contact retention and solder wick reduction
TWI576026B (zh) 2015-07-17 2017-03-21 財團法人工業技術研究院 電路結構
CN106876852B (zh) * 2015-12-14 2020-01-10 中国航空工业集团公司雷华电子技术研究所 一种多层功分器上下层微带电路连接结构
KR102444553B1 (ko) 2016-02-26 2022-09-20 주식회사 기가레인 노트북 컴퓨터
US9872379B2 (en) 2016-03-16 2018-01-16 Microsoft Technology Licensing Llc Flexible printed circuit with radio frequency choke
US9839117B2 (en) 2016-04-11 2017-12-05 Microsoft Technology Licensing, Llc Flexible printed circuit with enhanced ground plane connectivity
US10292259B2 (en) * 2016-04-29 2019-05-14 Stmicroelectronics (Grenoble 2) Sas Electrical shielding using bar vias and associated methods
WO2018022308A2 (en) 2016-07-14 2018-02-01 Massachusetts Institute Of Technology Foam radiator
US10070525B2 (en) * 2016-12-28 2018-09-04 Intel Corporation Internal to internal coaxial via transition structures in package substrates
IL250253B (en) 2017-01-24 2021-10-31 Arbe Robotics Ltd A method for separating targets and echoes from noise, in radar signals
US10194524B1 (en) 2017-07-26 2019-01-29 Cisco Technology, Inc. Anti-pad for signal and power vias in printed circuit board
US10290678B2 (en) 2017-09-26 2019-05-14 Globalfoundries Singapore Pte. Ltd. Magnetic shielding package structure for MRAM device and method for producing the same
JP6845118B2 (ja) * 2017-10-25 2021-03-17 株式会社Ｓｏｋｅｎ 高周波伝送線路
US11160163B2 (en) * 2017-11-17 2021-10-26 Texas Instruments Incorporated Electronic substrate having differential coaxial vias
IL255982A (en) 2017-11-29 2018-01-31 Arbe Robotics Ltd Detection, mitigation and prevention of mutual interference between fixed water radars in vehicles
IL259146A (en) * 2018-05-03 2018-06-28 Arbe Robotics Ltd Printed circuit board based high frequency rf coaxial transmission line using buried vias and method of fabrication thereof
IL259190A (en) 2018-05-07 2018-06-28 Arbe Robotics Ltd System and method for frequency hopping MIMO FMCW imaging radar
IL260696A (en) 2018-07-19 2019-01-31 Arbe Robotics Ltd Method and device for structured self-testing of radio frequencies in a radar system
IL260694A (en) 2018-07-19 2019-01-31 Arbe Robotics Ltd Method and device for two-stage signal processing in a radar system
IL260695A (en) 2018-07-19 2019-01-31 Arbe Robotics Ltd Method and device for eliminating waiting times in a radar system
IL261636A (en) 2018-09-05 2018-10-31 Arbe Robotics Ltd Deflected MIMO antenna array for vehicle imaging radars
KR102636487B1 (ko) 2018-10-26 2024-02-14 삼성전자주식회사 신호 전송기 및 이를 구비하는 반도체 소자 검사 장치
EP3957140A4 (en) 2019-05-16 2022-06-15 Samsung Electronics Co., Ltd. CIRCUIT BOARD WITH A COAXIAL PLATED THRU HOLE AND EQUIPPED ELECTRONIC DEVICE IN A WIRELESS COMMUNICATION SYSTEM
KR102639871B1 (ko) 2019-05-21 2024-02-23 삼성전자 주식회사 전기적 연결 장치 및 그것을 포함하는 전자 장치
US10631407B1 (en) 2019-06-26 2020-04-21 Cisco Technology, Inc. Circuit board with non-plated hole interposed between plated holes to prevent formation of conductive anodic filament
IL271269A (en) 2019-12-09 2021-06-30 Arbe Robotics Ltd Radom for a planar antenna for car radar
US11785707B2 (en) * 2021-01-21 2023-10-10 Unimicron Technology Corp. Circuit board and manufacturing method thereof and electronic device
US11792918B2 (en) 2021-01-28 2023-10-17 Unimicron Technology Corp. Co-axial via structure
US20220240375A1 (en) * 2021-01-28 2022-07-28 Unimicron Technology Corp. Co-axial via structure and manufacturing method of the same

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3739469A (en) * 1971-12-27 1973-06-19 Ibm Multilayer printed circuit board and method of manufacture
US5487218A (en) * 1994-11-21 1996-01-30 International Business Machines Corporation Method for making printed circuit boards with selectivity filled plated through holes
US5876842A (en) * 1995-06-07 1999-03-02 International Business Machines Corporation Modular circuit package having vertically aligned power and signal cores
US5898991A (en) * 1997-01-16 1999-05-04 International Business Machines Corporation Methods of fabrication of coaxial vias and magnetic devices
US5949030A (en) * 1997-11-14 1999-09-07 International Business Machines Corporation Vias and method for making the same in organic board and chip carriers
US6479764B1 (en) * 2000-05-10 2002-11-12 International Business Machines Corporation Via structure with dual current path
US6937120B2 (en) * 2003-04-02 2005-08-30 Harris Corporation Conductor-within-a-via microwave launch
CN101142860A (zh) * 2005-03-23 2008-03-12 富士通株式会社 印刷线路板

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3698082A (en) * 1966-04-25 1972-10-17 Texas Instruments Inc Complex circuit array method
US4170819A (en) * 1978-04-10 1979-10-16 International Business Machines Corporation Method of making conductive via holes in printed circuit boards
DE3426278A1 (de) * 1984-07-17 1986-01-30 Schroff Gmbh, 7541 Straubenhardt Leiterplatte
US5587119A (en) * 1994-09-14 1996-12-24 E-Systems, Inc. Method for manufacturing a coaxial interconnect
US5689091A (en) * 1996-09-19 1997-11-18 Vlsi Technology, Inc. Multi-layer substrate structure
TW525417B (en) * 2000-08-11 2003-03-21 Ind Tech Res Inst Composite through hole structure
US6784377B2 (en) * 2001-05-10 2004-08-31 International Business Machines Corporation Method and structure for repairing or modifying surface connections on circuit boards
JP3826007B2 (ja) 2001-10-11 2006-09-27 シャープ株式会社 配線接続構造およびこれを用いた送信機
JP3495727B2 (ja) * 2001-11-07 2004-02-09 新光電気工業株式会社 半導体パッケージおよびその製造方法
US7091424B2 (en) 2002-10-10 2006-08-15 International Business Machines Corporation Coaxial via structure for optimizing signal transmission in multiple layer electronic device carriers
JP4072505B2 (ja) * 2003-02-28 2008-04-09 エルピーダメモリ株式会社 積層型半導体パッケージ
JP2004327690A (ja) 2003-04-24 2004-11-18 Fuji Xerox Co Ltd プリント配線基板
US7230318B2 (en) 2003-12-24 2007-06-12 Agency For Science, Technology And Research RF and MMIC stackable micro-modules
US20060044083A1 (en) * 2004-08-27 2006-03-02 Maksim Kuzmenka Circuit board and method for producing a circuit board

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3739469A (en) * 1971-12-27 1973-06-19 Ibm Multilayer printed circuit board and method of manufacture
US5487218A (en) * 1994-11-21 1996-01-30 International Business Machines Corporation Method for making printed circuit boards with selectivity filled plated through holes
US5876842A (en) * 1995-06-07 1999-03-02 International Business Machines Corporation Modular circuit package having vertically aligned power and signal cores
US5898991A (en) * 1997-01-16 1999-05-04 International Business Machines Corporation Methods of fabrication of coaxial vias and magnetic devices
US5949030A (en) * 1997-11-14 1999-09-07 International Business Machines Corporation Vias and method for making the same in organic board and chip carriers
US6479764B1 (en) * 2000-05-10 2002-11-12 International Business Machines Corporation Via structure with dual current path
US6937120B2 (en) * 2003-04-02 2005-08-30 Harris Corporation Conductor-within-a-via microwave launch
CN101142860A (zh) * 2005-03-23 2008-03-12 富士通株式会社 印刷线路板

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