CN102201449B - 一种功率mos器件低热阻封装结构 - Google Patents

一种功率mos器件低热阻封装结构 Download PDF

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CN102201449B
CN102201449B CN 201110139824 CN201110139824A CN102201449B CN 102201449 B CN102201449 B CN 102201449B CN 201110139824 CN201110139824 CN 201110139824 CN 201110139824 A CN201110139824 A CN 201110139824A CN 102201449 B CN102201449 B CN 102201449B
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陈勇
赵建明
夏建新
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Guangdong Litai Technology Co Ltd
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University of Electronic Science and Technology of China
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Abstract

一种功率MOS器件低热阻封装结构,属于功率半导体器件技术领域。本发明结合硅芯片倒装桥夹技术和常规TO封装技术,采用倒装散热结构,使得功率MOS器件产生的热量直接流向金属热沉,解决了功率MOS器件常规TO封装所带来的热阻过大的问题;同时桥夹技术的大面积接触除了进一步降低热阻,还可以增大电流容量,减小寄生电感。本发明提供的功率MOS器件低热阻封装结构,具有常规TO封装的外形,可以利用现有的TO封装生产线,无需添加封装设备、仅适当增加桥夹与倒装工艺相关设备的情况下封装出性能优异的功率MOS器件。经实际检测证明,本发明提供的功率MOS器件低热阻封装结构,比常规TO封装结构可使热阻下降约80%、电流容量增加约两倍,而寄身电感大大减小。

Description

一种功率MOS器件低热阻封装结构
技术领域
本发明属于功率半导体器件技术领域,涉及功率MOS器件的封装结构。
背景技术
功率半导体器件的封装,通常是指给硅片上的半导体器件安装外壳,它不仅起着保护芯片和增强导热性能的作用,而且还是沟通芯片内部世界与外部电路的桥梁和规格通用功能的作用。封装的主要作用是为芯片提供物理保护和实现电气连接,同时实现半导体器件或集成电路外形标准化、规格化。
因为芯片必须与外界隔离,以防止空气中的杂质对芯片电路的腐蚀而造成电气性能下降,保护芯片表面以及连接引线等,使相当柔嫩的芯片在电气或热物理等方面免受外力损害及外部环境的影响;同时通过封装使芯片的热膨胀系数与框架或基板的热膨胀系数相匹配,这样就能缓解由于热等外部环境的变化而产生的应力以及由于芯片发热而产生的应力,从而可防止芯片损坏失效。
过去的10年间,功率MOSFET电流要求一直在增加,与此同时,电流切换速率要求也有相当大的提高。这给电路设计带来了许多热性能和电气性能方而的挑战。功率MOSFET必须有尽可能低的导通电阻(Rds(on))、尽可能小的电感以及尽可能少的栅极电荷(Qg)。当工作频率增加到1MHz或者更高时,这些电气参数尤其重要。当然,功率MOSFET必须具有很好的热性能。随着MOSFET硅片技术的进步,封装技术逐渐成为性能提升的主要障碍。具体讲,人们发现传统的引线键合封装(如DPAK和SO-8)使用的细线会使部件的寄生电阻显著增加。在极端情况下,封装增加的寄生电阻大小会与硅片本身的相当。
图1是常见的TO封装形式的功率MOS器件的实物外形与封装结构示意图。这种封装结构主要包括三方面:1)通过很细的金属引线将MOS器件表面的压焊块连接到外部引脚;2)MOS器件衬底背面采用环氧树脂粘贴在散热片上;3)整体器件采用塑料外格封装。因为功率MOS器件工作时热量主要产生于器件表面(半导体衬底通常厚度为几百微米,而器件层则位于衬底表面不超过十微米的厚度内),这使得热量只能通过较厚的硅层(衬底)进入金属热沉(散热片),使得其热阻较大;而很细的键合丝又增加了寄生电感并限制了电流容量,使得封装的器件性能受到极大限制。
图2所示为国际整流器(IR)公司推出一种MOS器件的全新封装结构-DirectFET封装结构。在DirectFET封装结构中,芯片采用倒装桥夹技术,芯片被包裹在一个铜质外壳中,以方便热量从作为散热器的器件顶部散发掉。这一设计消除了引线架和引线焊接,把DFPR降至只有0.1mW,占用面积与SO-8封装的相当,而标准的SO-8封装的DFPR为1.5mW。结至外壳(顶部)的热阻降到仅为3℃/W。从外观上来看,采用DirectFET封装技术的MOSFET完全颠覆传统MOSFET的封装形式。DirectFET结构并没有采用其它封装形式常用的塑封壳,而是采用铜金属外壳覆盖;其次,DirectFET封装给人最直观的感觉就是小,从对比图上可以看到,其占用面积比塑封结构的TO252小多了,与表面贴装结构的SO-8 MOSFET相当,而厚度只有0.646毫米,仅与0805电阻相当。同时我们可以注意到,与其它MOSFET相比,采用DirectFET封装的MOSFET没有引脚,DirectFET封装采用直接芯片粘贴,没有线压焊或者引线框,大大降低了封装感抗和封装阻抗。与SO-8相比,封装阻抗减少了90%以上,而封装电感也从SO-8时候的2nH减到了0.5nH,寄生效应明显减弱,这都为减少损耗提供了重要保证。再来看看它的内部,从MOSFET的内部架构图上来看,由于传统的MOSFET用一个塑封壳将漏极、硅片和源极接触的地方包装起来,因此厂商只能通过在焊线到硅芯片之间增加铜片来加大接触面积导热,或在漏极与PCB之间增加金属垫将热量传导到PCB上散发出去。而DirectFET封装和传统封装完全不同,漏极裸露的铜片通过两边的焊盘和PCB连接在一起,和PCB有很大的接触面积,利于传导电流。同时由于DirectFET外壳全部采用铜片,没有传统的塑料外壳,底部依然可以透过PCB散热,而顶部由于表层良好的空气流通性可以快速散热,实现双面冷却效果。
虽然采用类似于DirectFET的桥夹技术,可以使MOS器件的热阻及寄身电感大大降低,接触面的增大也使电流容量大为增加,但其无引线的封装技术与现有的引脚封装形式存在极大差异,不能与现有技术相兼容,需要大量封装设备投资。
发明内容
本发明基于硅芯片倒装桥夹技术,并结合常规TO封装技术,提供一种功率MOS器件低热阻封装结构。采用该封装结构的功率MOS器件具有与DirectFET封装结构的功率MOS器件相近的性能,可比常规TO封装结构的功率MOS器件的热阻降低约80%,大面积的电极接触使电流容量增大,寄生电感下降;同时,该封装结构无需大量封装设备投资,可应用于现有的TO封装生产线上。
本发明技术方案如下:
一种功率MOS器件低热阻封装结构,如图3所示,包括功率MOS器件、金属散热片、封装外壳,以及栅极、源极和漏极外部引脚。所述金属散热片表面具有薄层绝缘氧化物;薄层绝缘氧化物表面具有与功率MOS器件栅极、源极和漏极分别对应的栅极、源极和漏极金属焊盘;功率MOS器件倒装于金属散热片的薄层绝缘氧化物表面;功率MOS器件的栅极、源极和漏极分别与薄层绝缘氧化物表面的栅极、源极和漏极金属焊盘相焊接;薄层绝缘氧化物表面的栅极、源极和漏极金属焊盘分别与栅极、源极和漏极的外部引脚相连;封装外壳安装于功率MOS器件外部,实现功率MOS器件与外部环境除电气连接之外的密封隔离。
本发明提供的功率MOS器件低热阻封装结构,对于横向或纵向的功率MOS器件均能提供很好的封装。若所述功率MOS器件为横向功率MOS器件,则所述横向功率MOS器件的栅极、源极和漏极直接焊接于薄层绝缘氧化物表面相应的栅极、源极和漏极金属焊盘上;若所述功率MOS器件为纵向功率MOS器件,则所述纵向功率MOS器件的栅极和源极直接焊接于薄层绝缘氧化物表面相应的栅极和源极金属焊盘上,且所述纵向功率MOS器件的漏极通过金属连线或金属箔与薄层绝缘氧化物表面的漏极金属焊盘相焊接。
上述技术方案中:所述封装外壳可以采用塑料封装外壳、陶瓷封装外壳或金属封装外壳;所述金属散热片宜采用金属铝或铜散热片;所述金属铝散热片表面的薄层绝缘氧化物宜采用三氧化二铝,其厚度不超过10微米;所述薄层绝缘氧化物表面的栅极、源极和漏极金属焊盘宜采用金属铜或锡焊盘。
本发明的有益效果是:
本发明提供的功率MOS器件低热阻封装结构,结合了硅芯片倒装桥夹技术和常规TO封装技术。一方面采用倒装散热结构,使得功率MOS器件产生的热量无需经过硅衬底传递,而是直接流向金属热沉(散热片),解决了功率MOS器件常规TO封装所带来的热阻过大的问题;另一方面桥夹技术的大面积接触除了进一步降低热阻,还可以增大电流容量,减小寄生电感。本发明提供的功率MOS器件低热阻封装结构,具有常规TO封装的外形,可以利用现有的TO封装生产线,无需添加封装设备、仅适当增加桥夹与倒装工艺相关设备的情况下封装出性能优异的功率MOS器件。经实际检测证明,本发明提供的功率MOS器件低热阻封装结构,比常规TO封装结构可使热阻下降约80%、电流容量增加约两倍,而寄身电感大大减小。
附图说明
图1是常规TO封装的功率MOS器件外形及内部结构示意图。其中(a)是器件外形,(b)是内部结构。
图2是国际整流器公司推出的DirectFET封装结构的示意图。
图3是本发明提供的功率MOS器件低热阻封装结构示意图。
图4是本发明提供的功率MOS器件低热阻封装结构的分解示意图。其中(a)、(b)分别为金属散热片及引脚的侧视及俯视图,(c)是功率MOS器件及封装外壳结构示意图。
具体实施方式
一种功率MOS器件低热阻封装结构,如图3所示,包括功率MOS器件、金属散热片、封装外壳,以及栅极、源极和漏极外部引脚。所述金属散热片表面具有薄层绝缘氧化物;薄层绝缘氧化物表面具有与功率MOS器件栅极、源极和漏极分别对应的栅极、源极和漏极金属焊盘;功率MOS器件倒装于金属散热片的薄层绝缘氧化物表面;功率MOS器件的栅极、源极和漏极分别与薄层绝缘氧化物表面的栅极、源极和漏极金属焊盘相焊接;薄层绝缘氧化物表面的栅极、源极和漏极金属焊盘分别与栅极、源极和漏极的外部引脚相连;封装外壳安装于功率MOS器件外部,实现功率MOS器件与外部环境除电气连接之外的密封隔离。
若所述功率MOS器件为横向功率MOS器件,则所述横向功率MOS器件的栅极、源极和漏极直接焊接于薄层绝缘氧化物表面相应的栅极、源极和漏极金属焊盘上;若所述功率MOS器件为纵向功率MOS器件,则所述纵向功率MOS器件的栅极和源极直接焊接于薄层绝缘氧化物表面相应的栅极和源极金属焊盘上,且所述纵向功率MOS器件的漏极通过金属连线或金属箔与薄层绝缘氧化物表面的漏极金属焊盘相焊接。
所述封装外壳若采用塑料封装外壳,则具体封装时,封装外壳与金属散热片之间可采用环氧树脂粘接密封;若封装外壳采用陶瓷封装外壳或金属封装外壳,则具体封装时,封装外壳与金属散热片之间可采用熔融玻璃键合密封。
所述金属散热片可采用铜或铝散热片;所述金属铝散热片表面的薄层绝缘氧化物宜采用三氧化二铝,其厚度不超过10微米;所述薄层绝缘氧化物表面的栅极、源极和漏极金属焊盘宜采用金属铜或锡焊盘。
本发明提供的功率MOS器件低热阻封装结构,由于采用倒装散热结构,使得功率MOS器件产生的热量无需经过硅衬底传递,而是直接流向金属热沉(散热片),解决了功率MOS器件常规TO封装所带来的热阻过大的问题;同时桥夹技术的大面积接触除了进一步降低热阻,还可以增大电流容量,减小寄生电感。经实际检测证明,本发明提供的功率MOS器件低热阻封装结构,比常规TO封装结构可使热阻下降约80%、电流容量增加约两倍,而寄身电感大大减小。本发明提供的功率MOS器件低热阻封装结构,具有常规TO封装的外形,可以利用现有的TO封装生产线,无需添加封装设备、仅适当增加桥夹与倒装工艺相关设备的情况下封装出性能优异的功率MOS器件。

Claims (9)

1.一种功率MOS器件低热阻封装结构,包括功率MOS器件、金属散热片、封装外壳,以及栅极、源极和漏极外部引脚;其特征在于:所述金属散热片表面具有薄层绝缘氧化物;薄层绝缘氧化物表面具有与功率MOS器件栅极、源极和漏极分别对应的栅极、源极和漏极金属焊盘;功率MOS器件倒装于金属散热片的薄层绝缘氧化物表面;功率MOS器件的栅极、源极和漏极分别与薄层绝缘氧化物表面的栅极、源极和漏极金属焊盘相焊接;薄层绝缘氧化物表面的栅极、源极和漏极金属焊盘分别与栅极、源极和漏极的外部引脚相连;封装外壳安装于功率MOS器件外部,实现功率MOS器件与外部环境除电气连接之外的密封隔离。
2.根据权利要求1所述的功率MOS器件低热阻封装结构,其特征在于,所述功率MOS器件为横向功率MOS器件,所述横向功率MOS器件的栅极、源极和漏极直接焊接于薄层绝缘氧化物表面相应的栅极、源极和漏极金属焊盘上。
3.根据权利要求1所述的功率MOS器件低热阻封装结构,其特征在于,所述功率MOS器件为纵向功率MOS器件,所述纵向功率MOS器件的栅极和源极直接焊接于薄层绝缘氧化物表面相应的栅极和源极金属焊盘上,所述纵向功率MOS器件的漏极通过金属连线或金属箔与薄层绝缘氧化物表面的漏极金属焊盘相焊接。
4.根据权利要求1、2或3所述的功率MOS器件低热阻封装结构,其特征在于,所述封装外壳为塑料封装外壳。
5.根据权利要求1、2或3所述的功率MOS器件低热阻封装结构,其特征在于,所述封装外壳为陶瓷封装外壳。
6.根据权利要求1、2或3所述的功率MOS器件低热阻封装结构,其特征在于,所述封装外壳为金属封装外壳。
7.根据权利要求6所述的功率MOS器件低热阻封装结构,其特征在于,所述金属封装外壳与薄层绝缘氧化物表面的漏极金属焊盘相焊接,使金属封装外壳同时兼具连接纵向功率MOS器件的漏极和薄层绝缘氧化物表面漏极金属焊盘的功能。
8.根据权利要求1、2或3所述的功率MOS器件低热阻封装结构,其特征在于,所述金属散热片为金属铝或铜散热片,所述金属铝散热片表面的薄层绝缘氧化物为三氧化二铝。
9.根据权利要求1、2或3所述的功率MOS器件低热阻封装结构,其特征在于,所述薄层绝缘氧化物表面的栅极、源极和漏极金属焊盘为金属铜或锡焊盘。
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