CN102116982A - 液晶显示面板及其制造方法 - Google Patents

液晶显示面板及其制造方法 Download PDF

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Publication number
CN102116982A
CN102116982A CN2010105644223A CN201010564422A CN102116982A CN 102116982 A CN102116982 A CN 102116982A CN 2010105644223 A CN2010105644223 A CN 2010105644223A CN 201010564422 A CN201010564422 A CN 201010564422A CN 102116982 A CN102116982 A CN 102116982A
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China
Prior art keywords
layer
electrode
data line
active layers
ohmic contact
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CN2010105644223A
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CN102116982B (zh
Inventor
陈政鸿
贺成明
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Changsha HKC Optoelectronics Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to CN2010105644223A priority Critical patent/CN102116982B/zh
Priority to DE112010006031T priority patent/DE112010006031T5/de
Priority to US13/000,924 priority patent/US8860917B2/en
Priority to PCT/CN2010/079558 priority patent/WO2012068749A1/zh
Publication of CN102116982A publication Critical patent/CN102116982A/zh
Application granted granted Critical
Publication of CN102116982B publication Critical patent/CN102116982B/zh
Priority to US14/463,986 priority patent/US9170461B2/en
Priority to US14/853,305 priority patent/US9348186B2/en
Priority to US15/134,127 priority patent/US9500920B2/en
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors

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Abstract

本发明公开了一种液晶显示面板以及其制造方法。所述液晶显示面板包括以矩阵方式排列的多个薄膜晶体管,其中薄膜晶体管的源极与漏极分别由透明导电层构成,栅极由金属层构成;在数据线上设有接触窗口,源极与接触窗口电性连接,漏极与源极通过主动层电性连接。本发明中,无论数据线的数目如何变化,任一个像素仅会对应到一个与其相关的接触窗口而不会增加接触窗口的数目,所以不会造成开口率的损失,非常适合在高频操作下需要增加数据线数目的场合。在液晶显示装置中使用该矩阵电路,可以实现较高的画面刷新频率。

Description

液晶显示面板及其制造方法
技术领域
本发明涉及一种液晶显示面板以及其相关制造方法,尤指一种将透明导电层直接电性连接数据线和薄膜晶体管的液晶显示面板以及其相关制造方法。
背景技术
功能先进的显示器渐成为现今消费电子产品的重要特色,其中液晶显示器已经逐渐成为各种电子设备如行动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记型计算机屏幕所广泛应用具有高分辨率彩色屏幕的显示器。
图1是显示现有技术中液晶显示器(Liquid crystal display,LCD)常用的像素单元(pixel unit)布局示意图。液晶显示器包括扫描线(gate line)1、数据线(data line)3、存储电容的下电极(Com line)2、主动层(active layer)6、像素电极(pixel electrode)9以及存储电容10。其中用以实现像素电极(如:透明导电层ITO)与数据线3电性连接的接触窗口(VIA)5设置在像素电极9对应的位置上。
一般而言,一个像素仅会对应到一条扫描线与一条数据线。图2为图1中的A、B、C点所对应的横截面示意图。扫描线1与公共电压线2由第一金 属层形成,而数据线3与漏极(drain)4、源极(source)5都由第二金属层构成,所以当扫描线1的电压高于开启电压(threshold voltage)时,数据线9所携带的数据电压便会由第二金属层M2经过主动层6中再回到第二金属层,之后通过一个透明导电层(ITO)7的接触窗口8让像素电极9充电至数据线3的电位。图2所示的截面图中包含:第一金属层构成与闸极电性连接的扫描线1与公共电压线2、隔离层(isolator layer)12、欧姆接触层13、主动层6、薄膜晶体管(Thin film transistor,TFT的)源极5与漏极4构成的第二金属层、透明导电层7以及钝化层11。
当前,液晶显示技术正在朝大画面和高画质的方向发展。为了获得更高的显示画质,有必要进一步提高液晶面板的画面刷新频率(frame rate)。现有的由薄膜晶体管形成的有源矩阵(active matrix)电路的结构相对固定,将不利于画面刷新频率的提高。请参阅图3,图3是显示现有技术中有源矩阵电路的结构示意图。举例而言,若一个分辨率为:1920×1080的液晶面板在120赫兹(Hz)的画面刷新频率下正常工作时,其最大的有效充电时间tcharging_120Hz为(计算时暂不考虑预留空白的时间):
t ch arg ing _ 120 Hz = 1000000 120 × 1080 ≈ 7.7 ( μ sec )
采用同样的计算方式,在画面刷新频率为240Hz的操作下,其最大的有效充电时间约为3.86μsec。这样的充电时间在考虑信号延迟(RC delay)与TFT有效的充电能力是不太够的。为解决上述问题,通常是将数据线的数目加倍,如图4所示,是显示现有技术中可实现较高画面刷新频率的有源矩阵电路的结构示意图。上下相邻的两像素原本需要两个栅极开启时间才可以分别将各自对应像素电极充电至设定电位,转变为在一个栅极开启时间内就可 以通过两条不同的数据线来寻址上下两相邻的像素,即使在240Hz的操作下,其最大的有效充电时间仍能维持在7.7μsec。
请参阅图5,图5是显示相邻三个像素电极共享一栅极开启时间的应用要求下的电路结构示意图。若类似于上述设计原理,将相邻的三个像素电极9a-9c共享一栅极开启时间,则对应相邻的三条的数据线3a-3c就必须增加一对接触窗口(如虚线框所示)与透明导电层来将中间数据线的信号传递至相对应的TFT的漏极,这将会增加对开口率(aperture ratio)以及亮度的不良影响。
综上所述,最多只能实现相邻的两个像素电极共享一栅极开启时间,换言之,以目前的信号延迟的程度与TFT的充电能力,如保证较理想的开口率与亮度指标,则画面刷新频率最多仅能达到240Hz左右。
故,有必要提供一种经过改进设计、可用于提高画面刷新频率的液晶显示面板,以解决现有技术所存在的问题。
发明内容
根据本发明的实施例,本发明揭露一种液晶显示面板的制造方法,包括:提供一玻璃基板;蚀刻形成于所述玻璃基板上的第一金属层,以形成一数据线;依序沉积一第一钝化层和一第二金属层于所述玻璃基板以及所述第一金属层上;蚀刻所述第二金属层,以形成一薄膜晶体管的栅极和一存储电容的下电极;依序沉积一隔离层以及一主动层于所述第一钝化层以及所述第二金属层上;同时蚀刻所述主动层以保留所述栅极上方的所述主动层,其中所述主动层作为所述薄膜晶体管的传输通道;蚀刻所述数据线上方的所述第一钝 化层以及所述隔离层,以于所述数据线上方形成一接触窗;沉积一透明导电层于所述隔离层、所述数据线以及所述主动层上;以及蚀刻所述透明导电层以将所述透明导电层分为第一电极和第二电极,其中所述数据线经过所述接触窗上的所述第一电极电性连接所述主动层,且所述主动层电性连接所述第二电极。
根据本发明的实施例,本发明揭露一种液晶显示面板,包含一玻璃基板以及多个像素单元,每一像素单元设置于所述玻璃基板上,并对应电性连接一扫描线与一数据线,每一像素单元包含:一第一金属层,位于所述玻璃基板上,用来作为所述数据线;一第一钝化层,位于所述玻璃基板以及所述第一金属层上;一第二金属层,位于所述第一钝化层之上,作为一薄膜晶体管的栅极以及一存储电容的下电极;一隔离层,位于所述第一钝化层以及所述第二金属层上;一主动层,位于所述隔离层上,用来作为所述薄膜晶体管的传输通道;一接触窗,形成于所述数据线的上方;以及一透明导电层,位于所述隔离层以及所述接触窗上,所述透明导电层包含一第一电极和一第二电极,所述第一电极用来电性连接所述数据线,所述第二电极用来作为像素电极,其中当栅极接收一扫描电压时,会将所述数据线传来的数据电压经过所述第一电极、所述主动层传输到所述第二电极。
根据本发明的实施例,本发明揭露一种液晶显示面板的制造方法,包含:提供一玻璃基板;蚀刻形成于所述玻璃基板上的第一金属层,以形成一薄膜晶体管的栅极以及一存储电容的下电极;依序沉积一第一钝化层和一第二金属层于所述玻璃基板以及所述第一金属层上;蚀刻所述第二金属层以形成一数据线;依序沉积一隔离层以及一主动层于所述第一钝化层以及所述 第二金属层上;同时蚀刻所述主动层以保留所述栅极上方的所述主动层,其中所述主动层作为所述薄膜晶体管的传输通道;蚀刻所述数据线上方的所述第一钝化层以及所述隔离层,以于所述数据线上方形成一接触窗;沉积一透明导电层于所述隔离层、所述数据线以及所述主动层上;以及蚀刻所述透明导电层以将所述透明导电层分为第一电极和第二电极,其中所述数据线经过所述接触窗上的所述第一电极电性连接所述主动层,且所述主动层电性连接所述第二电极。
根据本发明的实施例,本发明揭露一种液晶显示面板,包含:一玻璃基板;一第一金属层,位于所述玻璃基板上,用来作为一薄膜晶体管的栅极以及一存储电容的下电极;一第一钝化层,位于所述玻璃基板以及所述第一金属层上;一第二金属层,位于所述第一钝化层之上,作为一数据线;一隔离层,位于所述第一钝化层以及所述第二金属层上;一主动层,位于所述隔离层上,用来作为所述薄膜晶体管的传输通道;一接触窗,形成于所述数据线的上方;以及一透明导电层,位于所述隔离层以及所述接触窗上,所述透明导电层包含一第一电极和一第二电极,所述第一电极用来电性连接所述数据线,所述第二电极用来作为像素电极,其中当栅极接收一扫描电压时,会将所述数据线传来的数据电压经过所述第一电极、所述主动层传输到所述第二电极。
相较于现有技术,本发明的液晶显示面板以及其相关制造方法仍是利用五道掩膜制程,即可产生一种新的薄膜晶体管架构的液晶显示面板。该液晶显示面板将透明导电层直接形成薄膜晶体管的第一电极与第二电极,同时该透明导电层亦作为薄膜晶体管与数据线之间以及薄膜晶体管与液晶电容之间 的连接线。因此,薄膜晶体管上方无须另外形成一接触窗来提供接触点,便可透过透明导电层连接到数据线,如此一来,像素区域可更加扩大,进而提升液晶面板的开口率,使光源所发出的光能够更有效率的投射出来。
为让本发明的上述内容能更明显易懂,下文特举较佳实施例,并配合所附图式,作详细说明如下:
附图说明
图1是显示现有技术中液晶显示器常用的像素单元布局示意图。
图2是图1所示的A-B-C线段的剖面图。
图3是显示现有技术中有源矩阵电路的结构示意图。
图4是显示现有技术中可实现较高画面刷新频率的有源矩阵电路的结构示意图。
图5是显示相邻三个像素电极共享一栅极开启时间的应用要求下的电路结构示意图。
图6至图14为本发明第一实施例的液晶显示面板的制程示意图。
图15是显示图14的像素单元的俯视图。
图16至图24为本发明第二实施例的液晶显示面板的制程示意图。
图25是显示图24的像素单元的俯视图。
图26是显示本发明第一实施例的像素单元结构的示意图。
图27是显示本发明第二实施例的像素单元结构的示意图。
图28是显示本发明第三实施例的像素单元结构的示意图。
图29是显示本发明第四实施例的像素单元结构的示意图。
具体实施方法
以下各实施例的说明是参考附加的图式,用以例示本发明可用以实施之特定实施例。本发明所提到的方向用语,例如「上」、「下」、「前」、「后」、「左」、「右」、「顶」、「底」、「水平」、「垂直」等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。
请参阅图6~图14,图6至图14为本发明第一实施例的液晶显示面板的制程示意图。请先参阅图6,在此道制程之中,会先在玻璃基板201上沉积第一金属层(未图示)并利用第一道掩膜进行显影制程。显影制程是在第一金属层上涂布光阻(未图示)后,利用具有特定图案的第一道掩膜对光阻进行曝光再用显影剂(developer)将已曝光的光阻洗除。之后对第一金属层进行蚀刻制程。蚀刻制程是将没有光阻覆盖的第一金属层以强酸移除,而有光阻覆盖的第一金属层(大致呈该特定图案)会产生数据线22,接着再洗除剩余的光阻。
请继续参阅图7,在此道制程之中,首先,在玻璃基板201以及第一金属层上,先沉积第一钝化层(passivation layer)24,接着再于第一钝化层24上,沉积第二金属层(未图示)。之后再利用第二道掩膜进行显影制程,并且对第二金属层进行蚀刻,以产生栅极261和公共电压线27。
请继续参阅图8,在此道制程之中,首先,在栅极261、公共电压线27以及第一钝化层24上,沉积一隔离层(isolation layer)28,接着在于隔离层28上依序沉积主动层(active layer)30与欧姆接触层(n+layer)32。之后再利用第三道掩膜进行显影制程,并且对主动层30与欧姆接触层32进行蚀刻制程,以保留对应于栅极261上方的主动层30与欧姆接触层32。
请继续参阅图9,在此道制程之中,利用第四道掩膜进行显影制程,以对隔离层28与第一钝化层24进行蚀刻制程直至数据线22,以产生一接触窗(via)34。
请参阅图10,在此道制程之中,先沉积透明导电层36,之后在透明导电层36上方涂布一层光阻(photoresist)38。
接着请参阅图11,在此道制程中,利用第五道掩膜40对光阻38进行曝光,没有掩膜40遮蔽的光阻38在光线照射后,对显影剂的溶解性会改变。所以可用显影剂将已曝光的光阻38洗除。
接着请参阅图12,在此道制程之中,利用未曝光显影后的光阻38,对透明导电层36以及欧姆接触层32进行蚀刻制程以形成一通孔42,其中通孔42是形成在栅极261的上方,而通孔42两侧欧姆接触层32则分别形成第一欧姆接触层321与第二欧姆接触层322。
接着请参阅图13,在此道制程之中,在尚未去除光阻38之前,沉积一层第二钝化层44在光阻38之上和通孔42之内。
接着请参阅图14,在此道制程之中,再将光阻38以及光阻38之上的第二钝化层44利用剥离(lift-off)方法一并去除。由于通孔42内的第二钝化层44并未附着于光阻38之上而不会被剥离,如此一来,通孔42内以及通孔42对应之处的主动层30上会附着第二钝化层44。
请一并参阅图14和图15,图15是显示图14的像素单元50的俯视图。图15沿A-B-C切线的剖面即图14所示。通孔42将透明导电层36分为第一电极361和第二电极362。除了栅极261,第一电极361和第二电极362可作为薄膜晶体管52的源极(或漏极)和漏极(或源极),而主动层30则是作为薄膜 晶体管52的漏极和源极之间的传输通道。第一电极361作为第一电极可用来输出或输入电信号,第二电极362作为第二电极也可用来输出或输入电信号。附着于通孔42的第二纯化层44的目的是用来隔离作为传输通道的主动层30和欧姆接触层32,以避免与液晶分子直接接触而影响液晶分子的转动。第二电极362不仅作为薄膜晶体管52的漏极(或源极),实质上,也是作为像素电极(如图15所示)。当薄膜晶体管52接收到扫描线23传送的一扫描电压时,会将数据线22传来的数据电压经过第一电极361和薄膜晶体管52传输到第二电极362(也是像素电极)。位于第二电极362上方的液晶分子会依据第二电极362的数据电压来控制其转动方向,据以决定光线的穿透程度。另外,公共电压线27可用来施加一公共电压Vcom,而第二电极362与公共电压线27重叠之处实质上也构成一存储电容56,用来保持传来的数据电压。也就是说,当薄膜晶体管52没有接收到扫描电压时,第二电极362上方的液晶分子仍然可以依据存储电容56保持的数据电压转动。
请参阅图16~图24,图16至图24为本发明第二实施例的液晶显示面板的制程示意图。请先参阅图16,在此道制程之中,会先在玻璃基板201上沉积第一金属层(未图示),之后以第一掩膜进行显影制程,并且对第一金属层进行蚀刻制程,以产生薄膜晶体管的栅极261和公共电压线27。
请继续参阅图17,在此道制程之中,首先,在玻璃基板201以及第一金属层上先沉积第一钝化层(passivation layer)64,接着再于第一钝化层24上,沉积第二金属层(未图示)。之后再利用第二道掩膜进行显影制程,并且对第二金属层进行蚀刻制程,以产生数据线22。
请继续参阅图18,在此道制程之中,首先,在数据线22以及第一钝化层 24上,沉积一隔离层(isolation layer)28,接着在于隔离层28上依序沉积主动层(active layer)30与欧姆接触层(n+layer)32。之后再利用第三道掩膜进行显影制程,并且对主动层30与欧姆接触层32进行蚀刻制程,以保留对应于栅极261上方的主动层30与欧姆接触层32。
请继续参阅图19,在此道制程之中,利用第四道掩膜进行显影制程,以对第一钝化层24进行蚀刻制程直至数据线22,以产生一接触窗(via)34。
请参阅图20,在此道制程之中,先沉积透明导电层36,之后在透明导电层36上方涂布一层光阻(photoresist)38。
接着请参阅图21,在此道制程之中,利用第五道掩膜40对光阻38进行曝光,没有掩膜40遮蔽的光阻38在光线照射后,对显影剂(developer)的溶解性会改变。所以可用显影剂将已曝光的光阻38洗除。
接着请参阅图22,在此道制程之中,利用未曝光显影后的光阻38,对透明导电层36以及欧姆接触层32进行蚀刻制程以形成一通孔42,其中通孔42是形成在栅极261的上方,而通孔42两侧欧姆接触层32则分别形成第一欧姆接触层321与第二欧姆接触层322。
接着请参阅图23,在此道制程之中,在尚未去除光阻38之前,沉积一层第二钝化层44于光阻38之上和通孔42之内。
接着请参阅图24,在此道制程之中,再将光阻38以及光阻38之上的第二钝化层44利用剥离(lift-off)方法一并去除。由于通孔42内的第二钝化层44并未附着于光阻38之上而不会被剥离,如此一来,通孔42内以及通孔42对应之处的主动层30上会附着第二钝化层44,可有效隔离主动层30。
请一并参阅图24和图25,图25是显示图24的像素单元50的俯视图。 图25沿A-B-C切线的剖面即图24所示。通孔42将透明导电层36分为第一电极361和第二电极362。除了栅极261,第一电极361和第二电极362可作为薄膜晶体管52的源极(或漏极)和漏极(或源极),而主动层30则是作为薄膜晶体管52的漏极和源极之间的传输通道。第一电极361作为第一电极可用来输出或输入电信号,第二电极362作为第二电极也可用来输出或输入电信号。附着于通孔42的第二纯化层44的目的是用来隔离作为传输通道的主动层30和欧姆接触层32,以避免与液晶分子直接接触而影响液晶分子的转动。第二电极362不仅作为薄膜晶体管52的第二电极,实质上,也是作为像素电极(如图15所示)。当薄膜晶体管52接收到扫描线23传送的一扫描电压时,会将数据线22传来的数据电压经过第一电极361和薄膜晶体管52传输到第二电极362(也是像素电极)。位于第二电极362上方的液晶分子会依据第二电极362的数据电压来控制其转动方向,据以决定光线的穿透程度。另外,公共电压线27可用来施加一公共电压Vcom,而第二电极362与公共电压线27重叠之处实质上也构成一存储电容56,用来保持传来的数据电压。也就是说,当薄膜晶体管52没有接收到扫描电压时,第二电极362上方的液晶分子仍然可以依据存储电容56保持的数据电压转动。
在图14或是图24中,本发明的较佳实施例的欧姆接触层32所包含的第一欧姆接触层321与第二欧姆接触层322是用来降低薄膜晶体管52的电阻值。在另一实施例的制造过程中,欧姆接触层32是可以不需要设置,因此薄膜晶体管52也可以不需要第一欧姆接触层321与第二欧姆接触层322。
请注意,图15和图25形成的薄膜晶体管52的差异是在于公共电压线27和闸极261与数据线22的形成顺序。图15的实施例时先形成数据线22,再形成公共电压线27和闸极261。图25的实施例的差异在先形成公共电压 线27和闸极261,再形成数据线22。
请参阅图26,图26是显示本发明所提供的第一实施例的像素单元结构的示意图。两个薄膜晶体管52a、52b分别设置在上下两个区域中,数据线22a与数据线22b是以相互平行的方式垂直布置于两区域中的各个扫描线23a,23b上。并且数据线22a与数据线22b是分别邻近设置在像素电极362a,362b的两侧。位于上方的第二电极(像素电极)362a通过主动层30a与第一电极361a电性连接,再透过接触窗口34a连接位于左侧的数据线22a,而位于下方的第二电极(像素电极)362b通过主动层30a与第一电极361a电性连接,再通过另一个接触窗口34b连接位于右侧的数据线22b。由于薄膜晶体管52a、52b是以数据线22a、22b上形成的一接触窗口34a、34b,进而是以第二电极362a、362b导通数据线22a、22b。而薄膜晶体管52a、52b的漏极(未图标)则电性连接扫描线23a、23b。因为接触窗口34a、34b均是设置于由数据线22a、22b构成的金属层上,因此接触窗口34a、34b不会对像素单元的开口率和显示亮度指标产生不良影响,同时也能达到提升画面刷新频率的应用要求。
请参阅图27,图27是显示本发明所提供的第二实施例的像素单元结构的示意图。图27所示的实施例中,两个薄膜晶体管52a、52b分别设置在上下两区域中间的共享扫描线23上,并且接触窗口34a、34b是分别设置于数据线22a与数据线22b之上。薄膜晶体管52a则通过一个接触窗口34a连接位于左侧的数据线22a,而薄膜晶体管52b则通过另一个接触窗口34b连接位于右侧的数据线22b。换言之,数据线22a与数据线22b是分别设置在像素电极362a、362b的两侧。在本实施例中,由于薄膜晶体管52a、52b是以数据线22a、22b上形成的一接触窗口34a、34b,进而是以第二电极362a、362b 导通数据线22a、22b。而薄膜晶体管52a、52b的漏极(未图标)则电性连接同一条扫描线23a。
请参阅图28,是显示本发明第三实施例的像素单元结构的示意图。相比于图26,本实施例中数据线22a与数据线22b均是设置在第二电极362a、362b的同一侧,并且数据线22a与数据线22b是以相互平行的方式垂直布置于扫描线23a、23b上。两个接触窗口34a、34b是分别形成于第二电极362a、362b同侧的由数据线构成的金属层上。
请一并参阅图29,图29是显示本发明第四实施例的像素单元结构的示意图。相比于图28,图29中所示每一第二电极362a、362b、362c分别对应连接三条数据线22a、22b、22c。在本实施例中,数据线22a、22b、22c均是设置在第二电极362a、362b、362c的同侧。当薄膜晶体管52a、52b、52c导通时,第二电极362a、362b、362c是分别通过对应的接触窗口34a、34b、34c以及第一电极361a、361b、361c实现电性导通。与第二电极362a、362b、362c对应的三接触窗口34a、34b、34c均是设置于由数据线22a、22b、22c构成的金属层上,与各个作为像素电极的第二电极362a、362b、362c相对应的空间的开口率与显示亮度指标不会受到各个接触窗口的影响,并且提升了显示装置的画面刷新频率。
在本发明揭示的实施例中,不管数据线的数目增加为几倍,都以此连接方式来实现。任一像素仅会对应到一个与其相关的接触窗口,并不会增加接触窗口的数目,所以不会造成开口率(aperture ratio)的损失,非常适合在高频操作下需要增加数据线数目的场合。也因此本发明所提供的液晶显示器矩阵电路可以应用在非晶硅或低温多晶硅的液晶显示器或有机发光二极管显示 器上,特别是在保证开口率与显示亮度指标前提下,增加数据线密度以提升画面刷新频率的应用场合。
综上所述,虽然本发明已以较佳实施例揭露如上,但该较佳实施例并非用以限制本发明,该领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (14)

1.一种液晶显示面板,包含:
一玻璃基板以及多个像素单元,每一像素单元设置于所述玻璃基板上,并对应电性连接一扫描线与一数据线,每一像素单元包含:
一第一金属层,位于所述玻璃基板上,用来作为所述数据线;
一第一钝化层,位于所述玻璃基板以及所述第一金属层上;
一第二金属层,位于所述第一钝化层之上,作为一薄膜晶体管的栅极以及一存储电容的下电极;
一隔离层,位于所述第一钝化层以及所述第二金属层上;
一主动层,位于所述隔离层上,用来作为所述薄膜晶体管的传输通道;
一接触窗,形成于所述数据线的上方;以及
一透明导电层,位于所述隔离层以及所述接触窗上,所述透明导电层包含一第一电极和一第二电极,所述第一电极用来电性连接所述数据线,
所述第二电极用来作为像素电极,
其中当栅极接收一扫描电压时,会将所述数据线传来的数据电压经过所述第一电极、所述主动层传输到所述第二电极。
2.根据权利要求1所述的液晶显示面板,其特征在于:还包含一欧姆接触层,位于所述主动层和所述透明导电层之间。
3.根据权利要求2所述的液晶显示面板,其特征在于:还包含一通孔,贯穿所述欧姆接触层和所述透明导电层直至所述主动层。
4.根据权利要求1所述的液晶显示面板,其特征在于:所述第二电极和所述存储电容的下电极重叠之处形成所述存储电容。
5.根据权利要求1所述的液晶显示面板,其特征在于:所述多个像素单元包含上下相邻的第一像素单元和第二像素单元,所述第一和第二像素单元共享一扫描线。
6.一种液晶显示面板的制造方法,包含:
提供一玻璃基板;
蚀刻形成于所述玻璃基板上的第一金属层,以形成一数据线;
依序沉积一第一钝化层和一第二金属层于所述玻璃基板以及所述第一金属层上;
蚀刻所述第二金属层,以形成一薄膜晶体管的栅极和一存储电容的下电极;
依序沉积一隔离层以及一主动层于所述第一钝化层以及所述第二金属层上;
同时蚀刻所述主动层以保留所述栅极上方的所述主动层,其中所述主动层作为所述薄膜晶体管的传输通道;
蚀刻所述数据线上方的所述第一钝化层以及所述隔离层,以于所述数据线上方形成一接触窗;
沉积一透明导电层于所述隔离层、所述数据线以及所述主动层上;以及
蚀刻所述透明导电层以将所述透明导电层分为第一电极和第二电极,其中
所述数据线经过所述接触窗上的所述第一电极电性连接所述主动层,
且所述主动层电性连接所述第二电极。
7.根据权利要求6所述的液晶显示面板的制造方法,其特征在于:
依序沉积所述隔离层、所述主动层以及一欧姆接触层于所述第一钝化层以及所述第二金属层上;
同时蚀刻所述主动层以及所述欧姆接触层以保留所述栅极上方的所述主动层以及所述欧姆接触层,其中所述主动层作为所述薄膜晶体管的传输通道;
蚀刻所述数据线上方的所述第一钝化层以及所述隔离层,以于所述数据线上方形成一接触窗;
沉积所述透明导电层于所述隔离层、所述数据线以及所述欧姆接触层上;以及
蚀刻所述透明导电层以及所述欧姆接触层,以将所述透明导电层分为第一电极和第二电极将所述欧姆接触层分为第一欧姆接触层和第二欧姆接触层,其中所述数据线经过所述接触窗上的所述第一电极,所述第一欧姆接触层位于所述第一电极和所述主动层之间,且第二欧姆接触层位于所述第二电极和所述主动层之间。
8.一种液晶显示面板,包含:
一玻璃基板以及多个像素单元,每一像素单元设置于所述玻璃基板上,并对应电性连接一扫描线与一数据线,每一像素单元包含;
一第一金属层,位于所述玻璃基板上,用来作为一薄膜晶体管的栅极以及一存储电容的下电极;
一第一钝化层,位于所述玻璃基板以及所述第一金属层上;
一第二金属层,位于所述第一钝化层之上,作为一数据线;
一隔离层,位于所述第一钝化层以及所述第二金属层上;
一主动层,位于所述隔离层上,用来作为所述薄膜晶体管的传输通道;
一接触窗,形成于所述数据线的上方;以及
一透明导电层,位于所述隔离层以及所述接触窗上,所述透明导电层包含一第一电极和一第二电极,所述第一电极用来电性连接所述数据线,所述第二电极用来作为像素电极,
其中当所述栅极接收来自所述扫描线的一扫描电压时,会将所述数据线传来的数据电压经过所述第一电极、所述主动层传输到所述第二电极。
9.根据权利要求8所述的液晶显示面板,其特征在于:还包含一欧姆接触层,位于所述主动层和所述透明导电层之间。
10.根据权利要求9所述的液晶显示面板,其特征在于:所述液晶显示面板还包含一通孔,贯穿所述欧姆接触层和所述透明导电层直至所述主动层。
11.根据权利要求8所述的液晶显示面板,其特征在于:所述多个像素单元包含上下相邻的第一像素单元和第二像素单元,所述第一和第二像素单元共享一扫描线。
12.根据权利要求8所述的液晶显示面板,其特征在于:所述第二电极和所述存储电容的下电极重叠之处形成所述存储电容。
13.一种液晶显示面板的制造方法,包含:
提供一玻璃基板;
蚀刻形成于所述玻璃基板上的第一金属层,以形成一薄膜晶体管的栅极以及一存储电容的下电极;
依序沉积一第一钝化层和一第二金属层于所述玻璃基板以及所述第一金属层上;
蚀刻所述第二金属层以形成一数据线;
依序沉积一隔离层以及一主动层于所述第一钝化层以及所述第二金属层上;
同时蚀刻所述主动层以保留所述栅极上方的所述主动层,其中所述主动层作为所述薄膜晶体管的传输通道;
蚀刻所述数据线上方的所述第一钝化层以及所述隔离层,以于所述数据线上方形成一接触窗;
沉积一透明导电层于所述隔离层、所述数据线以及所述主动层上;以及
蚀刻所述透明导电层以将所述透明导电层分为第一电极和第二电极,其中所述数据线经过所述接触窗上的所述第一电极电性连接所述主动层,且所述主动层电性连接所述第二电极。
14.根据权利要求13所述的液晶显示面板的制造方法,其特征在于:
依序沉积所述隔离层、所述主动层以及一欧姆接触层于所述第一钝化层以及所述第二金属层上;
同时蚀刻所述主动层以及所述欧姆接触层以保留所述栅极上方的所述主动层以及所述欧姆接触层,其中所述主动层作为所述薄膜晶体管的传输通道;
蚀刻所述数据线上方的所述第一钝化层以及所述隔离层,以于所述数据线上方形成一接触窗;
沉积所述透明导电层于所述隔离层、所述数据线以及所述欧姆接触层上;以及
蚀刻所述透明导电层以及所述欧姆接触层,以将所述透明导电层分为第一电极和第二电极将所述欧姆接触层分为第一欧姆接触层和第二欧姆接触层,其中所述数据线经过所述接触窗上的所述第一电极,所述第一欧姆接触层位于所述第一电极和所述主动层之间,且第二欧姆接触层位于所述第二电极和所述主动层之间。
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