CN102608815A - 液晶显示面板以及其制造方法 - Google Patents

液晶显示面板以及其制造方法 Download PDF

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CN102608815A
CN102608815A CN2012100789846A CN201210078984A CN102608815A CN 102608815 A CN102608815 A CN 102608815A CN 2012100789846 A CN2012100789846 A CN 2012100789846A CN 201210078984 A CN201210078984 A CN 201210078984A CN 102608815 A CN102608815 A CN 102608815A
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pixel electrode
perforate
thin film
film transistor
tft
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姜佳丽
杜鹏
林师勤
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US13/502,742 priority patent/US20150009441A1/en
Priority to PCT/CN2012/072962 priority patent/WO2013139040A1/zh
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134345Subdivided pixels, e.g. for grey scale or redundancy
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    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/13606Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit having means for reducing parasitic capacitance

Abstract

本发明公开一种液晶显示面板和其制造方法,在第一子像素电极及第二子像素电极之间设置有扫描线和控制电压线。本发明将用于连接第一子像素电极和薄膜晶体管的漏极的第一开孔,以及用于连接第二子像素电极和该薄膜晶体管的漏极的第二开孔,都设置在该扫描线和该控制电压线之间。如此一来,跨越该扫描线和该控制电压线的导线就是做为第一子像素电极和第二子像素电极的透明导电层,而非做为数据线的第二金属层。因为本发明的透明导电层与做为扫描线的第一金属层之间隔着绝缘层和保护层,而传统的透明导电层与做为数据线的第二金属层之间只隔着绝缘层,所以本发明的导线与扫描线和控制电压线所形成的寄生电容较小,可降低RC延迟。

Description

液晶显示面板以及其制造方法
技术领域
本发明涉及一种液晶显示面板以及其制造方法,特别是涉及一种可以降低寄生电容值的液晶显示面板以及其制造方法。
背景技术
功能先进的显示器渐成为现今消费电子产品的重要特色,其中液晶显示器已经逐渐成为各种电子设备如电视、行动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记型计算机屏幕所广泛应用具有高分辨率彩色屏幕的显示器。
薄膜晶体管液晶显示器由于具有高画质、空间利用效率佳、低消耗功率、无辐射等优越特性,因而已逐渐成为市场之主流。目前,市场对于液晶显示器的性能要求是朝向高对比度(High Contrast Ratio)、快速反应与大视角等特性。
但是当使用者在大视角下观看液晶面板时,画面显示的色彩会偏离其原本应该呈现出来的色彩,而使观看到的画面失真。为了解决降低色偏的影响,目前有许多种类的像素结构被开发出来。请参阅图1,图1是一种可以降低色偏的CS07像素的设计图。CS07像素10采用了两子像素电极11、12的设计。但是传统的CS07像素10的晶体管14与两子像素电极11、12连接的导线会在扫描线15和控制电压线16之间形成寄生电容Cgs_main、Cgs_sub、Cgs_cx。因此如果设计一种减少寄生电容的像素设计,那么信号驱动的RC延迟也可以减少。
发明内容
因此,本发明的目的是提供一种液晶显示面板和其制造方法,在第一子像素电极及第二子像素电极之间设置有扫描线和控制电压线,因为本发明的透明导电层与做为扫描线的第一金属层之间隔着绝缘层和保护层,而传统的透明导电层与做为数据线的第二金属层之间只隔着绝缘层,所以本发明的导线与扫描线和控制电压线所形成的寄生电容较小,可降低RC延迟。以解决现有技术的问题。
根据本发明的实施例,本发明揭露一种液晶显示面板,所述液晶显示面板包括一玻璃基板以及一薄膜晶体管,所述薄膜晶体管包含一栅极、一源极以及一漏极;所述液晶显示面板另包含:一第一子像素电极以及一第二子像素电极,电性连接所述薄膜晶体管,且皆由一透明导电层构成;一扫描线,由一第一金属层构成且位于所述玻璃基板上,所述扫描线耦接至所述薄膜晶体管的所述栅极并用于传输一扫描信号;一控制电压线,由所述第一金属层构成且位于所述玻璃基板上,用来传输一控制信号;一绝缘层,位于所述扫描线和所述控制电压线之上;一数据线,由一第二金属层构成且位于所述绝缘层之上,耦接于所述薄膜晶体管的所述源极;一保护层,位于所述第二金属层之上;以及一第一开孔和一第二开孔,皆开设于所述保护层中,且位在所述扫描线和所述控制电压线之间,使得所述第一子像素电极通过所述第一开孔与所述薄膜晶体管的漏极电性连接,以及所述第二子像素电极通过所述第二开孔与所述薄膜晶体管的漏极电性连接。
根据本发明的实施例,所述薄膜晶体管另包含一第一导线、一第二导线及一第三导线,所述源极通过所述第一导线直接连接所述数据线,所述漏极通过所述第二导线和所述第一开孔直接连接所述第一子像素电极,所述漏极通过所述第三导线和所述第二开孔直接连接所述第二子像素电极。
根据本发明的实施例,所述第一开孔和所述第二开孔投射于所述玻璃基板上的位置,位于所述扫描线和所述控制电压线投射于所述玻璃基板的位置之间。
根据本发明的实施例,所述透明导电层的材料是氧化铟锡。
根据本发明的实施例,所述薄膜晶体管、所述扫描线和所述控制电压线位于所述第一子像素电极以及所述第二子像素电极之间。
本发明又揭露一种平面显示面板,一种液晶显示面板的制造方法,所述制造方法包含:提供一玻璃基板;形成一第一金属层于所述玻璃基板上;蚀刻所述第一金属层,以形成一薄膜晶体管的栅极、一控制电压线以及一扫描线;在所述第一薄膜晶体管的栅极、所述控制电压线以及所述扫描线上形成一绝缘层;形成一第二金属层,并蚀刻所述第二金属层,以形成所述薄膜晶体管的源极和漏极以及一数据线;形成一保护层于所述第二金属层之上;蚀刻所述保护层以形成一第一开孔和一第二开孔,其中所述第一开孔和所述第二开孔皆位在所述扫描线和所述控制电压线之间;形成一透明导电层,并蚀刻所述透明导电层以形成一第一子像素电极以及一第二子像素电极,其中所述第一子像素电极通过所述第一开孔与所述薄膜晶体管的漏极电性连接,以及所述第二子像素电极通过所述第二开孔与所述薄膜晶体管的漏极电性连接。
根据本发明的实施例,在蚀刻所述第二金属层的步骤时,同时形成一第一导线、一第二导线及一第三导线,使得在蚀刻所述透明导电层以形成所述第一子像素电极以及所述第二子像素电极时,所述源极通过所述第一导线直接连接所述数据线,所述漏极通过所述第二导线和所述第一开孔直接连接所述第一子像素电极,所述漏极通过所述第三导线和所述第二开孔直接连接所述第二子像素电极。
根据本发明的实施例,所述第一开孔和所述第二开孔投射于所述玻璃基板上的位置,位于所述扫描线和所述控制电压线投射于所述玻璃基板的位置之间。
根据本发明的实施例,所述透明导电层的材料是氧化铟锡。
根据本发明的实施例,所述薄膜晶体管、所述扫描线和所述控制电压线位于所述第一子像素电极以及所述第二子像素电极之间。
相较于现有技术,本发明的液晶显示面板以及其制造方法将用于连接第一子像素电极和薄膜晶体管的漏极的第一开孔,以及用于连接第二子像素电极和所述薄膜晶体管的漏极的第二开孔,都设置在扫描线和控制电压线之间。另外,跨越所述扫描线和所述控制电压线的导线就是做为第一子像素电极和第二子像素电极的透明导电层。相较之下,现有技术跨越该扫描线和该控制电压线的导线是做为数据线的第二金属层。因为导线和其所跨越的扫描线和控制电压线之间会形成寄生电容效应,所以导线和其所跨越的扫描线和控制电压线的距离越远,则寄生电容越小。因为本发明的透明导电层与做为扫描线的第一金属层之间隔着绝缘层和保护层,而传统的透明导电层与做为数据线的第二金属层之间只隔着绝缘层,所以本发明的导线与扫描线和控制电压线所形成的寄生电容较小,可降低RC延迟。
为让本发明的上述内容能更明显易懂,下文特举优选实施例,并配合所附图式,作详细说明如下:
附图说明
图1是一种可以降低色偏的CS07像素的设计图。
图2是本发明液晶显示面板的简易示意图。
图3至图6为形成本发明平面显示面板的方法示意图。
具体实施方式
以下各实施例的说明是参考附加的图式,用以例示本发明可用以实施之特定实施例。本发明所提到的方向用语,例如“上”、“下”、“前”、“后”、“左”、“右”、“顶”、“底”、“水平”、“垂直”等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。
请参阅图2,图2是本发明液晶显示面板300的简易示意图。液晶显示面板300包含数条数据线、数条扫描线、数条控制电压线、数个薄膜晶体管和数个像素单元。每一薄膜晶体管电性连接一扫描线和一数据线,每一像素单元包含一第一子像素电极331以及一第二子像素电极332。为简化图式,在以下实施例中,仅绘示数据线302、扫描线301、控制电压线307及薄膜晶体管303。薄膜晶体管303的栅极耦接到扫描线301,薄膜晶体管303的源极则耦接至数据线302。此外,薄膜晶体管303的漏极耦接至第一子像素电极331以及第二子像素电极332。控制电压线307用来提供一控制信号。
液晶显示面板300的驱动方式如下所述:栅极驱动器(图未示)输出的扫描信号通过扫描线301输入,使得连接扫描线301的薄膜晶体管303依序开启,同时源极驱动器(未图示)则输出对应的数据信号,通过数据线302输入至薄膜晶体管303,而薄膜晶体管303则将数据信号传递至第一子像素电极331以及第二子像素电极332,使其充电到所需的电压。第一子像素电极331以及第二子像素电极332上方的液晶就是依据该数据信号的电压差扭转(twist),进而显示出不同的灰阶。栅极驱动器会通过数条扫描线一行接一行地输出扫描信号以将每一行的薄膜晶体管303打开,再由源极驱动器对每一行的第一子像素电极331以及第二子像素电极332进行充放电。如此依序下去,便可完成液晶显示面板300的完整显示。
在以下的揭露之中,将解说本发明液晶显示面板300的制程方式。在此请参阅图3至图6,图3至图6为形成本发明液晶显示面板300的方法示意图。
在此请先参阅图3,首先提供一个玻璃基板350当作下基板,接着进行一金属薄膜沉积制程,以于玻璃基板350表面形成一第一金属层(未显示),并利用一第一掩膜来进行第一微影蚀刻,以蚀刻得到薄膜晶体管303的栅极371、控制电压线307以及扫描线301。本领域的技术人员可以了解栅极371实质上是扫描线301的一部分。
接着请参阅图2和图4,接着沉积以氮化硅(SiNx)为材质的绝缘层351而覆盖栅极371、控制电压线307以及扫描线301。于绝缘层351上连续沉积非晶硅(a-Si,Amorphous Si)层以及一高电子掺杂浓度的N+非晶硅层。再于非晶硅层以及一高电子掺杂浓度的N+非晶硅层上覆盖第二金属层(未绘示于图中)。接着利用第二掩膜以蚀刻非晶硅层以及N+非晶硅层以构成半导体层372,同时蚀刻该第二金属层以形成薄膜晶体管303的源极373、漏极374、第一导线381(绘示于图2)、第二导线382、第三导线383以及数据线302(绘示于图2)。半导体层372包含作为薄膜晶体管303通道的非晶硅层372a以及用来降低阻抗的欧姆接触层(Ohmic contact layer)372b。数据线302是通过第一导线381连接到源极373,第二导线382和第三导线383则连接到薄膜晶体管303的漏极374。虽然图4并未标示出数据线302,但本领域的技术人员可以了解源极373实质上是数据线302的一部分。
除此之外,在本实施例中,图4的结构是用第二掩膜同时蚀刻非晶硅层、N+非晶硅层和第二金属层。另一实施例中,可以先形成非晶硅层、N+非晶硅层于绝缘层351之上,先以第二掩膜蚀刻非晶硅层、N+非晶硅层以形成半导体层372;之后,形成第二金属层于半导体层372和绝缘层351之上,以另一掩膜蚀刻该第二金属层以形成薄膜晶体管303的源极373、漏极374以及数据线302。
请参阅图5,接着沉积以氮化硅为材质的保护层(passivation layer)375,并覆盖源极373、及漏极374和数据线302,再利用第三掩膜来进行第三微影蚀刻用以去除漏极374上方的部份保护层375,直至漏极374表面,以于漏极374上方形成第一开孔(Via)531和第二开孔532。第一开孔531和第二开孔532投射于玻璃基板350上的位置,位于扫描线301/控制电压线307投射于玻璃基板350的位置之间(请参见图2)。
请参阅图6,图6也是图2所示的液晶显示面板300沿线段A-A’的剖面图。在保护层375上形成以氧化铟锡物(Indium tin oxide,ITO)为材质的透明导电层,接着利用一第四掩膜蚀刻该透明导电层以形成第一子像素电极331和第二子像素电极332。第一子像素电极331通过预先形成的第一开孔531与第二导线382和薄膜晶体管303的漏极374电性连接。第二子像素电极332通过预先形成的第二开孔532与第三导线383和薄膜晶体管303的漏极374电性连接。
如图2所示,本实施例的液晶显示面板300的第一开孔531和第二开孔532投射于玻璃基板350上的位置,是位于扫描线301和控制电压线307投射于玻璃基板350的位置之间。而且第二导线382和第三导线383与扫描线301/控制电压线307之间的寄生电容Cgs_main、Cgs_sub、Cgs_cx也会比较小。根据测试,寄生电容Cgs_sub减少约3.9%、寄生电容Cgs_main减少约32.7%、寄生电容Cgs_cx减少约3.9%。这是因为第二导线382和第三导线383是由氧化铟锡物为材质的透明导电层构成,且第二导线382和第三导线383与扫描线301/控制电压线307(亦即第一金属层)之间隔有绝缘层351和保护层375。由于电容值与两导电体的距离成反比,因此第二导线382和第三导线383与扫描线301/控制电压线307形成的寄生电容会比图1所示的现有技术的寄生电容小。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (10)

1.一种液晶显示面板,所述液晶显示面板包括一玻璃基板以及一薄膜晶体管,所述薄膜晶体管包含一栅极、一源极以及一漏极;其特征在于:所述液晶显示面板另包含:
一第一子像素电极以及一第二子像素电极,电性连接所述薄膜晶体管,且皆由一透明导电层构成;
一扫描线,由一第一金属层构成且位于所述玻璃基板上,所述扫描线耦接至所述薄膜晶体管的所述栅极并用于传输一扫描信号;
一控制电压线,由所述第一金属层构成且位于所述玻璃基板上,用来传输一控制信号;
一绝缘层,位于所述扫描线和所述控制电压线之上;
一数据线,由一第二金属层构成且位于所述绝缘层之上,耦接于所述薄膜晶体管的所述源极;
一保护层,位于所述第二金属层之上;以及
一第一开孔和一第二开孔,皆开设于所述保护层中,且位在所述扫描线和所述控制电压线之间,使得所述第一子像素电极通过所述第一开孔与所述薄膜晶体管的漏极电性连接,以及所述第二子像素电极通过所述第二开孔与所述薄膜晶体管的漏极电性连接。
2.根据权利要求1所述的液晶显示面板,其特征在于:所述薄膜晶体管另包含一第一导线、一第二导线及一第三导线,所述源极通过所述第一导线直接连接所述数据线,所述漏极通过所述第二导线和所述第一开孔直接连接所述第一子像素电极,所述漏极通过所述第三导线和所述第二开孔直接连接所述第二子像素电极。
3.根据权利要求2所述的液晶显示面板,其特征在于:所述第一开孔和所述第二开孔投射于所述玻璃基板上的位置,位于所述扫描线和所述控制电压线投射于所述玻璃基板的位置之间。
4.根据权利要求1所述的液晶显示面板,其特征在于:所述透明导电层的材料是氧化铟锡。
5.根据权利要求1所述的液晶显示面板,其特征在于:所述薄膜晶体管、所述扫描线和所述控制电压线位于所述第一子像素电极以及所述第二子像素电极之间。
6.一种液晶显示面板的制造方法,其特征在于,所述制造方法包含:
提供一玻璃基板;
形成一第一金属层于所述玻璃基板上;
蚀刻所述第一金属层,以形成一薄膜晶体管的栅极、一控制电压线以及一扫描线;
在所述第一薄膜晶体管的栅极、所述控制电压线以及所述扫描线上形成一绝缘层;
形成一第二金属层,并蚀刻所述第二金属层,以形成所述薄膜晶体管的源极和漏极以及一数据线;
形成一保护层于所述第二金属层之上;
蚀刻所述保护层以形成一第一开孔和一第二开孔,所述第一开孔和所述第二开孔皆位在所述扫描线和所述控制电压线之间;
形成一透明导电层,并蚀刻所述透明导电层以形成一第一子像素电极以及一第二子像素电极,其中所述第一子像素电极通过所述第一开孔与所述薄膜晶体管的漏极电性连接,以及所述第二子像素电极通过所述第二开孔与所述薄膜晶体管的漏极电性连接。
7.根据权利要求6所述的制造方法,其特征在于:在蚀刻所述第二金属层的步骤时,同时形成一第一导线、一第二导线及一第三导线,使得在蚀刻所述透明导电层以形成所述第一子像素电极以及所述第二子像素电极时,所述源极通过所述第一导线直接连接所述数据线,所述漏极通过所述第二导线和所述第一开孔直接连接所述第一子像素电极,所述漏极通过所述第三导线和所述第二开孔直接连接所述第二子像素电极。
8.根据权利要求6所述的制造方法,其特征在于:所述第一开孔和所述第二开孔投射于所述玻璃基板上的位置,位于所述扫描线和所述控制电压线投射于所述玻璃基板的位置之间。
9.根据权利要求6所述的制造方法,其特征在于:所述透明导电层的材料是氧化铟锡。
10.根据权利要求6所述的制造方法,其特征在于:所述薄膜晶体管、所述扫描线和所述控制电压线位于所述第一子像素电极以及所述第二子像素电极之间。
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