CN102047398B - 接合结构体 - Google Patents
接合结构体 Download PDFInfo
- Publication number
- CN102047398B CN102047398B CN201080001751.5A CN201080001751A CN102047398B CN 102047398 B CN102047398 B CN 102047398B CN 201080001751 A CN201080001751 A CN 201080001751A CN 102047398 B CN102047398 B CN 102047398B
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- layer
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- grafting material
- semiconductor element
- bonded structure
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
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- B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
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- B23K35/0233—Sheets, foils
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Abstract
在半导体元件(102)的表面(102b)配置晶格与以Bi为主要成分的接合材料(106)不同的金属的层(105),并且在晶格与接合材料(106)不同的金属的所述层(105)和半导体元件(102)的表面(102b)之间配置与接合材料(106)的化合物生成热为正值的元素的层(104),藉此防止晶格与接合材料(106)不同的金属的所述层(105)的成分向半导体元件(102)扩散。
Description
技术领域
本发明涉及包含不含铅的接合材料的接合结构体,更详细地说,涉及将Si、GaN、SiC等的半导体元件和电极接合而成的半导体器件的接合结构体。
背景技术
使用焊锡材料将半导体器件安装于基板。例如,作为将IGBT(Insulated Gate Bipolar Transistor,绝缘栅双极型晶体管)之类的半导体器件和基板接合的焊锡材料,一般采用熔点为220℃的Sn-3重量%Ag-0.5重量%Cu。
图5是将半导体器件安装于基板的示意图。
将半导体器件1安装于基板2时,采用焊锡浸渍方式的浸焊装置,例如用熔点为220℃的作为焊锡材料3的Sn-3重量%Ag-0.5重量%Cu将半导体器件1的外部电极4与基板电极5焊接。此时,因为焊锡材料3被浸焊装置加热至250~260℃,所以半导体器件1的内部温度可达250~260℃。在半导体器件1的内部,半导体元件6和电极7通过接合材料8接合,但如果接合材料8在半导体器件1的内部熔融,则发生短路、断路或电学特性的变化,最终产品可能会发生不良。因此,对于在半导体器件1的内部使用的接合材料8,要求具有比用浸焊装置进行焊接时达到的半导体器件1内部的最高温度更高的熔融温度。
于是,作为熔融温度超过260℃且不含铅的接合材料,认为包含90重量%以上的Bi的接合材料(以下称作“以Bi为主要成分的接合材料”;例如Bi-2.5Ag熔点262℃,Bi-0.5Cu熔点270℃)是合适的。作为其它接合材料,也对Zn进行了研究,但考虑到浸润性和接合的难易程度等,现在优选上述以Bi为主要成分的接合材料。于是,提出了使用以Bi为主要成分的接合材料的功率半导体模块(参照专利文献1)。图6是专利文献1所记载的现有的接合结构体的剖视图。
图6中,功率半导体模块9在功率半导体元件10和导电层11之间具有接合部12。该接合部12使用以Bi为主要成分的接合材料,为使以Bi为主要成分的接合材料和构成功率半导体元件10的Si接合,通过蒸镀法在作为被接合面的功率半导体元件10的接合部12侧的表面形成厚度为0.1μm~10μm的Cu层13。
专利文献1:日本专利特开2007-281412号公报
发明的概要
但是,功率半导体元件10由Si构成,配置在功率半导体元件10表面的Cu层13的Cu容易扩散于Si,因此存在下述问题:Cu向功率半导体元件10的内部扩散,引发功率半导体元件10无法正常工作的不良,产品的成品率下降,品质不稳定。
本发明是解决上述现有的问题的发明,其目的是提供一种在通过以Bi为主要成分的接合材料将半导体元件和电极接合的情况下品质也稳定的接合结构体和接合结构体的接合方法。
本发明的接合结构体是通过以Bi为主要成分的接合材料将半导体元件和电极接合而成的接合结构体,其特征在于,在所述半导体元件的与所述电极相对的表面侧配置晶格与所述接合材料不同的金属的层,并且在晶格与所述接合材料不同的金属的所述层和所述半导体元件的与所述电极相对的表面之间配置与所述接合材料的化合物生成热为正值的元素的层。
此外,本发明的接合结构体是通过以Bi为主要成分的接合材料将半导体元件和电极接合而成的接合结构体,其特征在于,在所述半导体元件的与所述电极相对的表面侧配置晶格与所述接合材料不同的金属的层,并且在晶格与所述接合材料不同的金属的所述层和所述半导体元件的与所述电极相对的表面之间配置与所述接合材料的化合物生成热为正值的元素的层,在晶格与所述接合材料不同的金属的所述层和所述接合材料之间配置与所述接合材料的接触角比晶格与所述接合材料不同的金属的所述层更小的金属的层。
本发明的接合结构体的接合方法的特征在于,通过以Bi为主要成分的接合材料将半导体元件和电极接合时,在所述半导体元件的与所述电极相对的表面侧介以与所述接合材料的化合物生成热为正值的元素的层而形成晶格与所述接合材料不同的金属的层,将晶格与所述接合材料不同的金属的所述层在与所述接合材料接触的状态下加热,介以所述接合材料、晶格与所述接合材料不同的金属的层以及与所述接合材料的化合物生成热为正值的元素的层将所述半导体元件与所述电极接合。
此外,本发明的接合结构体的接合方法的特征在于,通过以Bi为主要成分的接合材料将半导体元件和电极接合时,在所述半导体元件的与所述电极相对的表面侧介以与所述接合材料的化合物生成热为正值的元素的层而形成晶格与所述接合材料不同的金属的层,在晶格与所述接合材料不同的金属的所述层的靠所述电极侧的面形成与所述接合材料的接触角比晶格与所述接合材料不同的金属的所述层更小的金属的层,将与所述接合材料的接触角比晶格与所述接合材料不同的金属的所述层更小的金属的所述层在与所述接合材料接触的状态下加热,介以所述接合材料、与所述接合材料的接触角比晶格与所述接合材料不同的金属的所述层更小的金属的所述层、晶格与所述接合材料不同的金属的所述层以及与所述接合材料的化合物生成热为正值的元素的所述层将所述半导体元件与所述电极接合。
利用该结构,可通过以Bi为主要成分的接合材料以良好的品质将半导体元件和电极接合。
附图的简单说明
图1是本发明的实施方式1中的接合结构体的剖视图。
图2是实施方式1的防扩散层的厚度和半导体元件不良发生率的关系图。
图3是本发明的实施方式2中的接合结构体的剖视图。
图4是表示Bi对实施方式2的各表面材料的浸润扩散率的图。
图5是将半导体元件安装于基板的示意图。
图6是现有的接合结构体的剖视图。
实施发明的最佳方式
下面,基于具体的各实施方式对本发明的接合结构体的接合方法进行说明。
(实施方式1)
图1和图2表示本发明的实施方式1。
图1(a)表示将半导体器件100安装于基板101而成的接合结构体。图1(b)表示图1(a)中由虚线围成的区域A的放大图。
在半导体器件100的内部,半导体元件102通过以Bi为主要成分的接合材料106与电极103接合。这里,接合材料106是Bi-2.5重量%Ag(熔点262℃)。
在半导体元件102的与电极103相对的表面102b侧配置有Cu层105,该Cu层105作为晶格与接合材料106不同的金属的层。这里,Cu层105的厚度为0.5μm。
在Cu层105和半导体元件102的表面102b之间配置有防扩散层104,该防扩散层104作为与接合材料106的化合物生成热为正值的元素的层。这里,防扩散层104使用的是熔融温度超过260℃且可减少Cu层105的Cu向半导体元件102的固相扩散的金属Ta。防扩散层104的厚度为0.5μm。
更具体地进行说明。
从由Si构成的直径为6英寸且厚度为0.3mm的晶片上以4.5mm×3.55mm的尺寸切下半导体元件102。该半导体元件102不限于Si,也可以由Ge构成,还可以由作为化合物半导体的GaN、GaAs、InP、ZnS、ZnSe、SiC、SiGe等构成。
此外,根据半导体元件的功能的不同,半导体元件102的尺寸可以大至6mm×5mm,或者也可以使用3mm×2.5mm、2mm×1.6mm等较小的半导体元件。半导体元件102的厚度有时也根据半导体元件的尺寸而不同,不限于0.3mm,也可使用0.4mm、0.2mm、0.15mm等厚度的半导体元件。
在半导体元件102的与电极103相对的面102b的相反侧的面102a上还形成有电路图案(未图示)。作为形成于半导体元件102的面102b的防扩散层104,通过蒸镀法形成了厚度为0.5μm的Ta层。该防扩散层104防止Cu层105 的Cu向半导体元件102的内部扩散而使半导体元件102的功能劣化。
防扩散层104只要是熔融温度超过260℃且Cu不固相扩散的金属即可,不限于Ta,可选择Ti、Cr、TaN、TaC、TiN、TiC。此外,可以重叠选自这些材料的多个层而形成。重叠多个层而形成的情况下,可采用Ta层+TaN层、Ta层+TaC层、Ti层+TiN层、Cr层+Ta层+TaC层等任意组合。
但是,因为防扩散层104形成在半导体元件102的与电极103相对的面上,所以必须具有用于实现稳定的导通的电导率,TaN和TiN的电导率低于Ta、Ti、Cr、TaC、TiC,因此不宜采用TaN和TiN的组合。
下面,对防扩散层104的厚度进行说明。
图2是表示防扩散层的厚度和半导体元件不良发生率的关系的图。
这里,将Cu层105和接合材料106各自的厚度固定,仅使防扩散层104的厚度变化。
图2中,横轴是防扩散层的厚度,防扩散层是通过蒸镀法形成的Ta。纵轴是半导体元件的不良发生率,对于由通过本实施方式1接合而成的接合结构体组装而成的IGBT,通过于150℃实施了500小时的高温试验后的动作试验,以样本数各为10的条件算出不良发生率。
防扩散层104的厚度如果变薄,则无法防止Cu侵入半导体元件102,因此半导体元件102遭到破坏,不理想。此外,防扩散层104的厚度如果变厚,则无法使半导体元件102工作时产生的热量向电极103散发,半导体元件102的温度超过耐热温度而无法工作,因此不理想。使半导体元件102所产生的热量向电极散发的散热性可通过下式获得。
(散热性)=(导热系数)÷(防扩散层的厚度)式1
由该图2的结果可知,使用Ta的防扩散层104的厚度如果为0.3~0.9μm,则不良发生率为0%,充分地获得了防扩散效果。
此外,防扩散层104的厚度为0.1~0.2μm的情况下,有10%发生不良,但与0.05μm时的80%的不良率相比,可认为获得了比较好的效果。
另一方面,防扩散层104的厚度如果达到1.5μm厚,则不良发生率达60%,不理想。这是因为如式1所示,如果厚度增加,则散热性降低。此外,防扩散层104的厚度为1.2μm的情况下,有10%发生不良,但与1.5μm时的60 %的不良率相比,可认为获得了比较好的效果。
此外,也可使用Ti作为防扩散层104,但Ti的导热系数为21.9W/m·K,小于Ta的导热系数57.5W/m·K,约为Ta的38%,因此为了获得与Ta相同程度的散热性,根据式1,必须使厚度小至Ta的38%左右。Ta防扩散层104的厚度为1.2μm时,不良发生率为10%,而使用Ti作为防扩散层104的情况下,如果使厚度为1.2μm的38%、即0.46μm,则可获得与Ta相同程度的散热性,因此此时的不良发生率为10%左右。
此外,也可使用Cr作为防扩散层104,但Cr的导热系数为93.9W/m·K,大于Ta的导热系数,约为Ta的160%,因此使用Cr作为防扩散层104的情况下,将厚度设为Ta的160%左右来使用即可。
此外,也可使用TaC、TiC作为防扩散层104,但C的导热系数为129W/m·K,大于Ta或Ti的导热系数,因此TaC的导热系数大于Ta,TiC的导热系数大于Ti。Ta-50%C的导热系数约为90W/m·K,大于Ta的导热系数57.5W/m·K,约为Ta的150%,因此使用TaC作为防扩散层104的情况下,将厚度设为Ta的150%左右来使用即可。对于TiC,也同样地将防扩散层104做得较厚来使用即可。
此外,也可使用TaN、TiN作为防扩散层104,但N的导热系数为0.03W/m·K,小于Ta或Ti的导热系数,因此TaN的导热系数小于Ta,TiN的导热系数小于Ti。Ta-50%N的导热系数约为28W/m·K,小于Ta的导热系数57.5W/m·K,约为Ta的48%,因此使用TaN作为防扩散层104的情况下,将厚度设为Ta的48%左右来使用即可。对于TiN,也同样地将防扩散层104做得较薄来使用即可。
此外,图2中,防扩散层104变薄时不良率升高的原因是,未起到防止Cu从与防扩散层104相接配置的Cu层105向半导体元件102的内部扩散而使半导体元件102的功能劣化的作为防扩散层104的作用,Cu侵入了半导体元件102的内部。
因为这些原因,由Ta构成的防扩散层104的厚度在0.1μm至1.2μm的范围内即可。理想的是不良发生率为0%的防扩散层104的厚度,即0.3μm~0.9μm的范围。
另外,像Ta层+TaN层那样形成多个层作为防扩散层104的情况下,从散热性的角度来看,较好是将多个层的厚度的总和作为防扩散层的厚度。
此外,防扩散层104的厚度如果变厚,则无法使半导体元件102工作时产生的热量向电极103散发,半导体元件102的温度超过耐热温度而无法工作,因此不理想,所以Cr、TaC、TiC的厚度的上限值最好采用与Ta的上限值相当的值。
下面,对Cu层105进行说明。
通过蒸镀法在防扩散层104上形成的厚度为0.5μm的Cu层105的形成目的是使与以Bi为主要成分的接合材料106的接合更可靠。Cu层105的形成方法不限于蒸镀法,也可以采用溅射法、电镀法、化学镀法、析出法。
因为Cu层105与以Bi为主要成分的接合材料106相接,所以Cu层105熔入以Bi为主要成分的接合材料106。因此,如果其熔入的量大,则Cu层105消失,防扩散层104露出。此时,防扩散层104和Bi的反应剧烈进行,防扩散层104消失,半导体元件102的Si露出。因为Si不与Bi接合,所以如果防扩散层104露出,则产生剥离缺陷。因此,Cu层105必须达到即使在与以Bi为主要成分的接合材料106相接的状态下加热至320℃也不会消失的厚度。
下述表1是表示接合前和接合后的Cu层105的厚度的关系的表,示出了Cu层向Bi的熔入量。
[表1]
接合前的Cu层的厚度 | 接合后的Cu层的厚度 | Cu层的减少量 |
0.1μm | 0μm | 0.1μm |
0.2μm | 0.08μm | 0.12μm |
0.3μm | 0.26μm | 0.04μm |
0.5μm | 0.42μm | 0.08μm |
0.7μm | 0.65μm | 0.05μm |
1.0μm | 0.92μm | 0.08μm |
1.5μm | 1.42μm | 0.08μm |
[0060] 表1中,在长宽各为5mm且厚度为0.3mm的Si片上通过蒸镀法形成Cu层,将其厚度作为接合前的Cu层的厚度。这里,测定10处的厚度,取其平均值作为厚度。在Cu层上通过蒸镀法形成厚度为0.03mm的Bi层后将其作为试样,在氢气气氛中加热至320℃,保持60秒钟后冷却至室温,测定接合后的Cu层的厚度。从接合前的Cu层的厚度减去接合后的Cu层的厚度而得的数值表示因熔入Bi而导致的Cu层的减少量。
接合前的Cu层105的厚度为0.2μm的情况下,接合后Cu层剩下0.08μm,而接合前的Cu层的厚度为0.1μm的情况下,接合后Cu层消失。因此,接合后的Cu层105不消失的接合前的Cu层的厚度必须超过0.1μm,至少为0.2μm。但是,接合前的Cu层的厚度为0.2μm的情况下,接合后的Cu层的厚度减少至0.1μm以下,若考虑到厚度的精度偏差(约0.1μm),则理想的是接合前的Cu层105的厚度在0.3μm以上。
此外,接合前的Cu层105的厚度如果超过2μm,则从晶片上切下时的切割会导致发生芯片缺损和Cu蒸镀膜的剥离,因此理想的是接合前的Cu层105的厚度在2μm以下。因此,Cu层105的厚度在0.2μm至2μm的范围内即可,理想的是在0.3μm至2μm的范围内。
另外,需要形成常用的Ni层作为Cu的防扩散层的情况下,为了防止Ni和Bi反应而生成化合物,较好是将Ni层配置在Cu层的半导体元件102侧。
下面,对接合材料106进行说明。
接合材料106包含2.5重量%的Ag,除不可避免的杂质外,其余部分由Bi形成,但接合材料106的组成不限定于此。这里,用于将半导体元件102与电极103接合的普通的芯片焊接(die bond)装置的加热温度的上限为350~400℃,要求接合材料106在350℃以下熔融。
Bi的熔融温度为271℃,如果在Bi中添加Ag,则液相温度降低,达到2.5重量%时变为共晶温度262℃。如果进一步添加Ag,则达到9重量%时变为350℃,到达加热温度的上限。此外,如果在Bi中添加Cu,则达到0.5重量%时熔融温度变为共晶温度270℃,如果进一步添加Cu,则达到1重量%时变为350℃,到达加热温度的上限。相对于Bi,Ag和Cu的下限值理想的是0.1重量%。表2是表示本实施方式的其它接合材料的组成的图。
[表2]
Cu | Ag | Bi | 熔融温度 | |
组成1 | 1.0重量% | 0重量% | 其余部分 | 350℃ |
组成2 | 0.8重量% | 0重量% | 其余部分 | 300℃ |
组成3 | 0重量% | 5.0重量% | 其余部分 | 295℃ |
组成4 | 0重量% | 1.0重量% | 其余部分 | 268℃ |
组成5 | 0.5重量% | 2.0重量% | 其余部分 | 265℃ |
组成6 | 0.2重量% | 0.4重量% | 其余部分 | 270℃ |
组成7 | 0重量% | 0.1重量% | 其余部分 | 269℃ |
组成8 | 0重量% | 2.5重量% | 其余部分 | 262℃ |
组成9 | 0.5重量% | 1重量% | 其余部分 | 264℃ |
组成10 | 0.8重量% | 0重量% | 其余部分 | 277℃ |
组成11 | 0重量% | 5重量% | 其余部分 | 301℃ |
组成12 | 0.1重量% | 2重量% | 其余部分 | 282℃ |
组成13 | 0重量% | 9重量% | 其余部分 | 320℃ |
由表2可知,组成1~组成13是熔融温度在350℃以下、包含选自0.1~1重量%的Cu和0.1~9重量%的Ag的1种以上的元素且其余部分由Bi形成的接合材料。此外,接合材料106可采用熔融温度在350℃以下的范围内的任意组成。
利用该构成,可利用防扩散层104来防止Cu向半导体元件102的内部扩散,因此通过以Bi为主要成分的接合材料106,能以良好的品质将半导体元件102和电极103接合。
(实施方式2)
图3和图4表示本发明的实施方式2。
另外,对于与实施方式1中的接合结构体同样的构成,标以相同的符号进行说明。
图3(a)表示将半导体器件200安装于基板101而成的接合结构体。图3(b)表示图3(a)中由虚线围成的区域B的放大图。
该实施方式2中的接合结构体在如下方面不同:在实施方式1中的接合结构体的基础上进一步在与电极相对的Cu层105和接合材料106之间加入Ag层107,该Ag层107作为与接合材料106的接触角比作为与接合材料106不同的金属的层的Cu层105更小的金属的层。
图3(b)中,在半导体元件102的与电极103相对的一侧依次配置有厚0.5μm的防扩散层104、厚0.5μm的Cu层105、厚0.7μm的Ag层107。
依次配置有防扩散层104、Cu层105、Ag层107的半导体元件102通过由Bi-2.5重量%Ag(熔点262℃)形成的接合材料106与电极103接合。
本发明的实施方式2中的接合结构体的防扩散层104和Cu层105的构成与实施方式1中的接合结构体的防扩散层104和Cu层105相同。
下面,对Ag层107进行说明。
为了保持与以Bi为主要成分的接合材料的接合性,在Cu层105的与电极103相对的一侧的面上通过蒸镀法形成了厚度为0.7μm的Ag层107。Ag层107的形成方法不限于蒸镀法,也可以采用溅射法、电镀法、化学镀法、析出法。
对配置Ag层107的原因进行说明。
因为Cu和Bi的浸润性不佳,所以为了使其接合,需要加压或摩擦移动等物理性的辅助。因此,理想的是在Cu的与以Bi为主要成分的接合材料接合的一侧配置与Bi的浸润性好的表面材料。藉此,可在不施加物理性的辅助的情况下使Cu与Bi接合。作为可通过蒸镀法形成的表面材料,可考虑Ag、Au、Pd、Sn。
图4是表示Bi对各表面材料的浸润扩散率的图。
将直径0.9mm的Bi球的一部分削去0.1mm而制成平面。接着,准备10mm×10mm、厚0.5mm的各表面材料,以所述Bi球的平面与表面材料相接的方式将所述Bi球承载于其上。将该试样在氢气气氛中加热至320℃,保持60秒钟后冷却至室温,测定Bi的厚度。
浸润扩散率通过((Bi球的高度)-(Bi的厚度))÷(Bi球的高度)计算。Cu是为了进行比较而记载的,浸润扩散率优于该Cu的材料是Sn、Au、Ag。但是,因为Sn会和Bi生成熔点138℃的Sn-58%Bi,所以如果用于在基板安装 时加热至250℃的半导体器件内部,则会熔融,因此不合适。此外,将每克Ag的单价设为1时,Au的单价高达74,不适合商业上的使用。因此,优选使用浸润扩散率高于Cu、价格低于Au的Ag。
表3是表示接合前和接合后的Ag层107的厚度的关系的表。
[表3]
接合前的Ag层的厚度 | 接合后的Ag层的厚度 | Ag层的减少量 |
0.1μm | 0μm | 0.1μm |
0.2μm | 0μm | 0.2μm |
0.5μm | 0.42μm | 0.08μm |
0.7μm | 0.51μm | 0.19μm |
1.0μm | 0.93μm | 0.07μm |
1.5μm | 1.38μm | 0.12μm |
该表3中,在长宽各为5mm且厚度为0.3mm的Si片上通过蒸镀法形成Ag层107,将其厚度作为接合前的Ag层的厚度。在Ag层上通过蒸镀法形成厚度为0.03mm的Bi层后将其作为试样,在氢气气氛中加热至320℃,保持60秒钟后冷却至室温,测定接合后的Ag层107的厚度。
接合前的Ag层107的厚度大于0.5μm的情况下,接合后有Ag层107残留,而接合前的Ag层107的厚度在0.2μm以下的情况下,接合后Ag层107消失。因为接合后的Ag层107不消失的接合前的Ag层107的厚度在超过0.2μm但在0.5μm以下的范围内,所以接合前的Ag层107的厚度理想的是在0.5μm以上。
这里,配置Ag层的目的是确保与Bi的浸润性,即使接合前的Ag层的厚度在0.2μm以下的情况下,与Bi的浸润性也得以确保,因此接合前的Ag层的厚度也可以是0.2μm。但是,接合前的Ag层的厚度为0.1μm的情况下,在Ag层的面内可确认到每10μm2 3个的气孔,因此Cu层可能会露出,不理想。
如果Ag层107的厚度较厚,则认为存在半导体元件102产生翘曲等问题,因此下面改变Ag层107的厚度来考察其与晶片的翘曲和切割毛刺的关系。表 4是表示改变Ag层107的厚度时的晶片的翘曲和切割毛刺的表。
[表4]
接合前的Ag层的厚度 | 晶片翘曲 | 切割毛刺 |
0.1μm | ○无 | ○无 |
0.2μm | ○无 | ○无 |
0.5μm | ○无 | ○无 |
0.7μm | ○无 | ○无 |
1.0μm | ○无 | ○无 |
1.5μm | ○无 | ○无 |
3.0μm | ○无 | ×产生 |
4.5μm | ○无 | ×产生 |
6.0μm | ×产生 | ×产生 |
晶片是直径6英寸、厚度为0.3mm的Si。晶片的一个面上通过蒸镀法形成有Ag层107。蒸镀法是在高温环境下用线膨胀系数不同的材料在晶片的一面形成膜,因此回复到室温时会产生晶片的翘曲。如果产生晶片的翘曲,则无法用后续工序的切割装置进行加工,因此成为问题。此外,如果蒸镀膜较厚,则用切割装置切割晶片时在切割面上产生蒸镀膜的毛刺。该毛刺在与电极接合后仍残留,成为应力集中部,因此产品可靠性可能会下降。
接合前的Ag层的厚度为6μm的情况下,产生晶片翘曲,无法通过后续工序进行加工,因此接合前的Ag层的厚度在4.5μm以下。此外,接合前的Ag层的厚度为3μm的情况下,产生切割毛刺,可靠性下降,因此接合前的Ag层的厚度理想的是在1.5μm以下。
因此,Ag层107的厚度可以在0.2μm至4.5μm的范围内,理想的是在0.5μm至1.5μm的范围内。另外,接合前的Ag层107的厚度在0.2μm以上但小于0.5μm的情况下,在接合后存在Ag层107消失的部分,因此接合结构体产生呈半导体元件/防扩散层/Cu层/接合材料的部分。此外,Ag层107熔入了以Bi为主 要成分的接合材料,因此如果进行能量色散X射线光谱法(EDX:energy dispersive X-ray spectrometry)、电子探针显微分析法(EPMA:electron probe microanalyzer)、X射线光电子能谱法(X-ray photoelectron spectroscopy)等元素分析,则有时能从接合材料中检出Ag。
表5是表示本发明的实施例和比较例的构成和产品成品率的表。
[表5]
关于产品成品率,对于将通过各构成接合而成的接合结构体组装而成的样本数20的IGBT,通过于150℃实施了500小时的高温试验后的动作试验来算出不良发生率。由该表5可知,实施例1~7是具有下述特征的接合结构 体:包括半导体元件、与半导体元件相对配置的电极、将半导体元件和电极连接的以Bi为主要成分的接合材料,在半导体元件的与电极相对的表面依次配置有防扩散层、Cu层、Ag层;产品成品率也高,品质稳定。
利用该构成,可通过防扩散层104来防止因Cu层105向半导体元件102的扩散而导致的半导体元件102的破坏,而且通过Ag层107,可确保与接合材料106的浸润性,即使在因芯片焊接工序的320℃的热量而导致Ag层107向接合材料106熔出而消失的情况下,也可通过Cu层105与接合材料106接合。
工业上的实用性
本发明的接合结构体有助于提高功率半导体、小功率晶体管等半导体封装的可靠性。
Claims (2)
1.一种接合结构体,其特征在于,
它是在电极(103)的表面依次配置接合材料(106)、Cu层(105)和层(104),在所述层(104)的表面载置了半导体元件(102)的接合结构体;
所述的接合材料(106)包含选自0.1~1重量%的Cu和0.1~9重量%的Ag的1种以上的元素,除不可避免的杂质外,其余部分由Bi形成;
所述层(104)由选自Ta、Cr、TaN、TaC、TiN、TiC的1种以上形成。
2.如权利要求1所述的接合结构体,其特征在于,所述层(104)的厚度为:
Ta的情况下,为0.3-0.9μm;
Cr的情况下,为0.48-0.9μm;
TaC的情况下,为0.45-0.9μm;
TaN的情况下,为0.144-0.432μm。
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