CN101814479A - 电极接触结构及其制造方法 - Google Patents

电极接触结构及其制造方法 Download PDF

Info

Publication number
CN101814479A
CN101814479A CN201010134380A CN201010134380A CN101814479A CN 101814479 A CN101814479 A CN 101814479A CN 201010134380 A CN201010134380 A CN 201010134380A CN 201010134380 A CN201010134380 A CN 201010134380A CN 101814479 A CN101814479 A CN 101814479A
Authority
CN
China
Prior art keywords
electrode
gold
film
gold electrode
mentioned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201010134380A
Other languages
English (en)
Other versions
CN101814479B (zh
Inventor
大野诚治
木下卓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Publication of CN101814479A publication Critical patent/CN101814479A/zh
Application granted granted Critical
Publication of CN101814479B publication Critical patent/CN101814479B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05005Structure
    • H01L2224/05009Bonding area integrally formed with a via connection of the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/48699Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • H01L2224/487Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48717Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
    • H01L2224/48724Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01021Scandium [Sc]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01022Titanium [Ti]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01023Vanadium [V]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01024Chromium [Cr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01028Nickel [Ni]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01045Rhodium [Rh]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01073Tantalum [Ta]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/10329Gallium arsenide [GaAs]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Led Devices (AREA)

Abstract

提供可靠性高的电极接触结构。在由在GaAs衬底上形成的金电极、在该金电极的绝缘膜上开设的接触孔、以及通过该接触孔与金电极进行欧姆接触的铝布线构成的电极接触结构中,金电极上的铝布线的厚度最大的部分与厚度最小的部分的差,与绝缘膜的厚度大致相等或比绝缘膜的厚度小。且,金电极的膜厚为0.1μm~0.2μm。或者,将金电极的周边部分与上述绝缘膜的重合宽度控制在1μm以下。或者接触孔的大小至少在16μm2以上。

Description

电极接触结构及其制造方法
本申请是申请号为200510068479.3、申请日为2005年4月28日、发明名称为“电极接触结构及其制造方法”的发明专利申请的分案申请。
技术领域
本发明涉及电极接触结构,特别是金电极和铝布线的接触结构,此外还涉及其制造方法。
背景技术
用于作为发光元件或受光元件的光元件的化合物半导体用的欧姆电极的材料,p型用多用AuGe、AuIn、AuSi、AuSn;n型用多用AuZn、AuMo、AuIn、AuBe等,以Au为主体的合金。而布线材料,多用电阻率低,容易进行引线键合的Al。
但是,在以Au为主体的合金和Al的组合中,在SiO2绝缘膜上开设的两金属进行欧姆接触的接触孔中,由Au原子和Al原子的互相扩散成生金铝金属间化合物。已知金铝金属间化合物分准稳定组成的合金Au4Al、Au5Al2、Au2Al、AuAl、AuAl2这五种类型。其中,Au5Al2与单独的Au、Al的体积相比,拥有3~4倍的体积比。也就是说,因为Au5Al2会通过化合物化而膨胀3~4倍,在接触孔处积蓄应力,导致铝布线及绝缘膜的剥落,产生断路,对电极接触结构的可靠性造成不良影响。这样的金属间化合物Au5Al2容易在接触孔的周边部分,即与SiO2绝缘膜相接的部分生成。
一旦生成金属间化合物Au5Al2,特别是排列了光元件的阵列结构的情况下,接触孔的数量多,尤其在集成了使用PNPN结构的3端发光晶闸管的自扫描型发光元件阵列等驱动电路的阵列(例如,参照专利第2683781号公报)中,因为需要发光元件数量的3~10倍数量的接触孔,在可靠性方面就成了大问题。
发明内容
本发明的目的是,解决这样的问题,提供可靠性高的电极接触结构。
本发明另外的目的是,提供这样的电极接触结构的制造方法。
本发明的除此以外的目的是,提供拥有这样的电极接触结构的自扫描型发光元件阵列。
本发明的第1形态是,由金电极、和在该金电极的绝缘膜上开设的接触孔、以及通过该接触孔与金电极进行欧姆接触的铝布线所构成的电极接触结构。本发明的特征是上述金电极上的上述铝布线的厚度最大的部分和厚度最小的部分的差,与上述绝缘膜的厚度大致相等,或比上述绝缘膜的厚度小。此外,依照本发明,上述金电极的膜厚度为0.1~0.2μm,或者上述金电极的周边部分和上述绝缘膜的重合宽度小于等于1μm,或者上述接触孔的大小至少大于等于16μm2
另外,本发明的电极接触结构可以由Au4Al合金制电极、在上述电极上的绝缘膜上开设的接触孔、以及通过上述接触孔与上述电极进行欧姆接触的铝布线构成。
此外,依照本发明,上述金电极可以由金系合金膜、在该金系合金膜上形成的阻挡金属膜、以及在该阻挡金属膜上形成的金膜这样的层结构构成。
本发明的第2形态是,由金电极、在该金电极的绝缘膜上开设的接触孔、以及通过该接触孔与金电极进行欧姆接触的铝布线所构成的电极接触结构的制造方法。该方法包括,在衬底上形成金电极的工序、设置绝缘膜并在上述金电极上开设接触孔的工序、在上述金电极上溅射成膜铝时,利用溅射的能量将上述金电极全部Au4Al化的工序。
另外,本发明的电极接触结构的制造方法包括,在衬底上形成由Au4Al合金构成的电极的工序、设置绝缘膜并在上述金电极上开设接触孔的工序、在上述电极上溅射成膜铝的工序。
本发明的第3形态是,使用了PNPN结构的3端发光晶闸管的自扫描型发光元件阵列。该自扫描型发光元件阵列的3端发光晶闸管的电极接触结构,是本发明的电极接触结构。
依照本发明,因为抑制了Au5Al2的生成,能够得到可靠性高的电极接触结构。这样的电极接触结构适用于使用了PNPN结构的3端发光晶闸管的自扫描型发光元件阵列。
附图说明
图1A,图1B,图1C是用于实验的三种电极接触结构的剖面图。
图2A及图2B是改变重合宽度的情况下的实验结果示意图。
图3A及图3B是改变金电极厚度的情况下的实验结果示意图。
图4A及图4B是改变接触孔面积的情况下的实验结果示意图。
图5A及图5B是改变重合宽度的情况下的实验结果示意图。
图6A及图6B是改变金电极厚度的情况下的实验结果示意图。
图7A及图7B是改变接触孔面积的情况下的实验结果示意图。
图8A及图8B是改变重合宽度的情况下接触电阻的变化示意图。
图9A及图9B是改变金电极厚度的情况下接触电阻的变化示意图。
图10A,图10B,图10C是将金电极做成层结构的例子的示意图。
图11是自扫描型发光元件阵列的等效电路图。
具体实施方式
在金铝金属间化合物中,Au4Al的体积比约为1,化合物化几乎不发生体积变化。因此,在本发明中,优选生成体积变化小的金铝金属间化合物Au4Al,同时抑制体积变化(体积膨胀)大的金铝金属间化合物Au5Al2的生成。
生成Au4Al,就是在金电极上,在溅射生成铝膜的时候,利用溅射的能量,将界面Au4Al化。在此,只要适当选择金电极的膜厚,就能够将已经形成铝膜的下面的金电极全部Au4Al化。一旦生成Au4Al后,从Au4Al到铝膜的金原子移动就几乎不发生,也就不生成Au5Al2。因此,在接触孔内不会发生体积膨胀,能够确保电极接触结构的可靠性。但是,如果金电极的膜厚很大,就会残留金属状态的金。
另外,在以往的电极接触结构中,因为金电极的边缘在接触孔外侧,由此在接触孔外侧的电极周边部分,不生成Au4Al,会残留金属状态的金。因此,可以认为这部分的金原子,通过铝图案形成后的处理(例如形成保护膜等)的热过程,扩散到铝这一侧,生成Au5Al2等伴有体积膨胀的金属间化合物。
因此,有必要设计尽量不残留金属状态的金的电极接触结构。为此,考虑以下情况:
(1)将金电极的膜厚变薄;
(2)缩小绝缘膜所覆盖的金电极周边部分的面积;
(3)扩大接触孔的面积;
(4)电极本身用Au4Al制作。
(1)的方法中,金电极的膜厚薄,所以可以通过铝的溅射将金电极全部Au4Al化。或者,即使残留了金属状态的金,扩散到铝布线一侧的金原子数目很少,所以很难生成Au5Al2
(2)的方法中,可以减少在电极周边部分残留的金属状态的金的量,所以很难生成Au5Al2
(3)的方法中,通过扩大接触孔的面积,提高接触孔内相对于金原子的铝的体积比例,结果,就能够减少体积变化。
(4)的方法中,从最初就用Au4Al制作金电极本身,所以很难生成Au5Al2
为了确认本发明的思路,进行了以下实验。
制作样本如下,在GaAs半导体衬底上形成金电极、SiO2绝缘膜以后,在电极上开设接触孔,形成铝布线。金电极形成膜厚为150nm,面积分别为4μm×4μm、6μm×6μm、8μm×8μm的三种规格。
SiO2绝缘膜的厚度为150nm,铝布线厚度为1.2μm。铝溅射时的输入功率约为400kW/m2。接触孔的大小为4μm×4μm。
将以上制作的三种接触孔通过收敛性离子束蚀刻(FIB)进行切割,用电子显微镜(SEM)观察其剖面。
三种接触孔的剖面图的模式图,分别用图1A,图1B,图1C表示。图中,10表示GaAs衬底,12表示金电极,14表示SiO2绝缘膜,16表示接触孔,18表示铝布线,20表示生成的金铝金属间化合物Au5Al2。在SEM照片上,虽然无法区分金和金铝金属间化合物的分界线,但是金铝金属间化合物和铝的分界可以明显区分。
首先,看图1A的接触孔16的面积(4μm×4μm)与金电极12的面积(4μm×4μm)相同的情况下的电极接触结构的剖面时,金电极12的厚度几乎与铝溅射前一样,为150μm。但是,经组成分析确认不是纯净的金,而是与铝的金属间化合物,由组成比例确认为Au4Al。
由此可知,若金电极的膜厚薄到150nm,则在铝膜溅射时,利用溅射的能量,能够几乎将金电极全部Au4Al化。
测量SiO2绝缘膜14的厚度A,金电极上的铝布线18的厚度最大的部分和厚度最小的部分的差B,结果分别为150nm,160nm。由于测量误差为10%,所以高度A,B几乎为相等的值。再者,铝布线的厚度最大的部分、厚度最小的部分的值,是分别在不同的2点以上测定得出的平均值。
其次,看图1B的接触孔16的面积(4μm×4μm)小于金电极12的面积(6μm×6μm)的情况下的电极接触结构的剖面时,SiO2绝缘膜14下的金电极12的端部形成了空洞22,从接触孔16的周边部分开始,形成了Au5Al2的金属间化合物20。在此,空洞22可以认为是柯肯多尔扩散空穴,因为铝中的金原子的扩散比金中的铝原子的扩散快,所以形成空洞。
测量SiO2绝缘膜14的厚度A,金电极上12的铝布线18的厚度最大的部分和厚度最小的部分的差B,结果分别为150nm,140nm。
另外,在接触孔16中,存在着以铝为主要成分的部分(图1B的β部分)以及含有金铝金属间化合物和铝的部分(图1B的α部分)。
其次,看图1C的接触孔16的面积(4μm×4μm)相比金电极12的面积(8μm×8μm)更大时的电极接触结构的剖面时,得知Au5Al2金属间化合物20的体积进一步增加了。
测量SiO2绝缘膜的厚度A,金电极12上的铝布线18的厚度最大的部分和厚度最小的部分的差B,结果分别为150nm,-400nm(比铝布线的厚度最大的部分增加了400nm的高度)。
由以上的结果得知,SiO2绝缘膜所覆盖的金电极的周边部分面积越小,Au5Al2的生成越少。另外,得知金电极的面积与接触孔的面积相同的情况下,将金电极的膜厚变小就不会生成Au5Al2
在不发生体积膨胀的情况下,如图1A、图1B所示,高度A、B的值几乎相等。这种A、B的值几乎相等的情况下,就变成了可靠性高的电极。并且,即使生成Au5Al2,只要B为正值,就很难发生不良。
进而改变电极接触结构的构成要素的尺寸,进行了实验。以下,对实验结果进行说明。
图2A的图表表示在金电极膜厚=150nm的情况下各种电极接触结构的剖面中的金电极以及金铝金属间化合物的剖面积与金电极面积之间的关系。图2B表示电极接触结构的剖面。金电极的面积为g×g,接触孔的面积为h×h(h=4μm)。在图2A的图表中,横轴表示金电极的宽度g(金电极的面积),纵轴表示金电极以及金铝金属间化合物的剖面积。○表示金电极剖面积(设计值),●表示金铝金属间化合物Au5Al2的剖面积(包括空穴面积)。
根据图表,如果认为“通过接触孔与溅射铝相接的金电极的剖面积不变,超出接触孔的金电极周边部分的金原子扩散到铝中,生成原来金的剖面积的3~4倍的金铝金属间化合物”,则形成图表中的直线30,就能够很好地说明实验结果。
另外,图3A表示金电极面积=接触孔面积=4μm×4μm,改变金电极的膜厚d的情况下,金电极以及金铝金属间化合物的剖面积。图3B表示电极接触结构的剖面。电极的厚度用d表示。在图3A的图表中,横轴表示金电极的厚度d,纵轴表示金电极以及金铝金属间化合物的剖面积。○表示金电极剖面积(设计值),●表示金铝金属间化合物的剖面积。
根据图表,如果认为“原金电极膜厚中,将与铝的分界面一侧大约0.2μm的部分变成Au4Al,剩余部分以金的形式残留,在其后的热处理中扩散到铝这一侧,形成Au5Al2,体积膨胀到3~4倍”,则形成图中的直线32,能够很好地说明实验结果。
然后,图4A表示金电极的周边部分与绝缘膜的重合宽度为1μm时的金电极的面积与金电极以及金铝金属间化合物的剖面积之间的关系。金电极的厚度为150nm。图4B表示电极接触结构的剖面形状。在图4A的图表中,横轴表示金电极的宽度g(金电极的面积),纵轴表示金电极以及金铝金属间化合物的剖面积。○表示金电极剖面积(设计值),●表示金铝金属间化合物Au5Al2的剖面积(包括空穴面积)。
根据该图表可知,随着金电极的面积增大,金铝金属间化合物的剖面积也在增大,但是因为接触孔的面积也增加,所以金电极越大(即接触孔越大)膨胀率越小。因此,电极接触结构的可靠性也提高了。
对各种设计的电极接触结构,通过PCT(压力锅试验),进行加速劣化试验,检查故障率。每种设计的取样数为2560个,试验条件为136℃,90%RH,100小时。试验结果在图5A、图5B~图7A、图7B中表示。
图5A、图5B和图2A、图2B一样,表示当接触孔的面积为4μm×4μm的情况下,改变金电极的面积时的故障率。
图6A、图6B和图3A、图3B一样,表示当接触孔和金电极的面积相同时,改变金电极的厚度d时的故障率。
图7A、图7B和图4A、图4B一样,表示金电极周边部分和绝缘膜的重合宽度为1μm时,改变金电极的面积时的故障率。
由图5A、图5B表示的实验结果得知,金电极周边部分和绝缘膜的重合宽度为0.5μm时,与宽度为0时的故障率相同。即使在宽度为1μm时故障率也很低。另一方面,图8A、图8B表示金电极和GaAs衬底之间的接触电阻。当重合宽度变得比0小时,接触电阻不连续地急速增长。因此,重合宽度优选被设计为比0大。
由图6A、图6B表示的实验结果得知,金电极厚度d小于等于0.2μm(200nm)时故障率很低。另一方面,随着金电极厚度变薄,金电极和GaAs衬底之间的接触电阻有变高的倾向。由表示金电极和GaAs衬底间的接触电阻的图9A、图9B得知,金电极厚度小于等于0.1μm时,接触电阻变为0.2μm时的约2倍,变得比此更薄时,电阻值急剧增长的同时,偏差也在增加。
由图7A、图7B表示的实验结果得知,金电极周边部分和绝缘膜的重合宽度一定(1μm)时,若接触孔的面积为4μm×4μm=16μm2,则故障率极低,若为5×5=25μm2时,故障率为0。然而,当接触孔的面积小于等于3×3=9μm2时,故障率急剧增长。
由以上的结果得知,图2A、图2B~图4A、图4B的金铝金属间化合物剖面积越是变大的样本,故障率越高。
由以上的实验,得到了以下结果。
(1)金电极周边部分与绝缘膜的重合宽度优选小于等于1μm,更优选小于等于0.5μm。而且,重合宽度优选大于0。
(2)金电极的膜厚优选在0.1μm~0.2μm的范围内。
(3)接触孔的面积优选大于等于16μm2,更优选大于等于25μm2
而且,为了减少绝缘膜所覆盖的金电极周边部分的影响,金电极以及接触孔没必要做成矩形,做成圆形,椭圆形,长圆形都可以。矩形的情况下,因为从接触孔的角看到的金电极和绝缘膜的重合部分的堆积,与角以外的相比更大,所以容易从角开始破损;若选用圆形的话,接触孔整个一周的重合部分都很平均,所以可以提高电极接触结构的可靠性。
为了消除重合部分的影响,可以开始就用Au4Al的组成形成金电极。要得到Au4Al膜,可以利用Au4Al的合金的靶通过溅射成膜,也可以通过最初将200nm以下的金电极制成膜的基础上,溅射50nm以上的铝,以此得到Au4Al。
本发明,优选对硅芯上的所有电极接触结构实行,即使电极接触结构的一部分不满足本发明的条件,因为电极接触结构的故障是偶发故障,此处的可靠性也不会成为瓶颈障碍,能够得到与本发明条件相符的与电极接触结构的比例对应的可靠性。综合看来,对于芯片内的所有电极接触结构,半数以上的电极接触结构有必要满足本发明的条件。
在以上的实施例中,说明了铝布线不是铝合金的例子,但也可以由在铝中含有少量的Si、Cu、Ni、Cr、Ti、Ta、Sc等的合金形成。
另外,为了避免生成金铝金属间化合物引起的体积膨胀,只要减少与铝接触的金的量就可以了。这能够通过将金电极变成金系合金膜、阻挡金属膜、以及金膜的层结构来实现。
在图10A、图10B、图10C中,显示了这个实施例。如图10A所示,在GaAs衬底10上,通过真空蒸镀形成与该衬底进行欧姆接触的金系合金膜30。然后,连续蒸镀上阻挡金属膜32。在此,作为阻挡金属,可以选择不会生成和金以及铝发生反应而引起体积膨胀、发生电阻变大等不良现象的金属间化合物的金属。通常,选择Cr、Ni、Pt、Ti等高熔点金属。此处使用膜厚10nm的Cr。然后,将金制成20nm的膜,形成金膜34。
金膜的厚度大于等于5nm、小于等于0.1μm时,令人满意的是不会发生成为不良的起因的体积膨胀。其后,通过剥离将金系结合膜、阻挡金属膜图案形成为电极的形状。
进而,如图10B所示,用等离子CVD形成SiO2绝缘膜14,用反应离子蚀刻(RIE)形成接触孔16。用溅射制成厚度为1.2μm的铝膜,用湿法蚀刻形成图案,如图10C所示,形成铝布线18。
观察用上述工序得到的电极接触结构的接触孔的剖面形状,看不到金铝合金引起的体积膨胀。
本发明的电极接触结构适用于上述使用了PNPN结构的3端发光元件的自扫描型发光元件阵列。在图11中表示了这样的自扫描型发光元件阵列的一个例子(专利第2683781号公报中记载的)。
图11所示自扫描型发光元件阵列如下构成,
包括:开关元件阵列,排列了分别具有用于从外部控制用于开关动作的阈值电压或阈值电流的第1控制电极的多个开关元件,各个第1控制电极相互通过第1电部件连接的同时,电源线通过第2电部件连接在各个开关元件上,且用于进行信息传送的时钟布线连接在各个开关元件上,把用于写入信息的信号提供给多个开关元件中的一部分;
发光元件阵列,排列了分别具有用于从外部控制用于发光动作的阈值电压或阈值电流的第2控制电极的多个发光元件,提供用于使发光元件发光的电流的电流供应线被连接在各个发光元件上;
第3电部件,分别连接在开关元件的第1控制电极和发光元件的第2控制电极上,
并且,通过控制电流供应线提供的电流的量,由外部写入开关元件阵列上的各个上述开关元件的开/关状态的信息被写入发光元件阵列,且被写入发光元件阵列的开/关状态的信息只在预期的时间内被保持。
在图11中,S表示开关元件,G表示作为第1控制电极的栅电极,D表示第1电部件的二极管,VGK表示电源线,RL1、RL2表示第2电部件的电阻,CL1表示提供时钟的时钟线路,CL2表示提供时钟
Figure GSA00000045019900102
的时钟线路。
各开关元件的正电极,经过电阻RA1、RA2交替连接在时钟布线CL1、CL2上。
另外,L表示发光元件,G′表示作为第2控制电极的正电极,CLR表示提供电流
Figure GSA00000045019900103
的电流供应线,D′表示第3电部件。
各发光元件的正电极经过电阻RA3连接在电流供应线CLR上。
以上构成的自扫描型发光元件阵列中,由PNPN结构的3端发光晶闸管构成的开关元件S以及发光元件L的电极,适合使用本发明的电极接触结构。

Claims (7)

1.一种电极接触结构,包括:金电极、在上述金电极上的绝缘膜上开设的接触孔、以及通过上述接触孔与金电极进行欧姆接触的铝布线,
其中:上述金电极为金系合金膜、在该金系合金膜上形成的阻挡金属膜、和在该阻挡金属膜上形成的金膜的层结构,总膜厚为0.1μm~0.2μm。
2.一种电极接触结构,包括:金电极、在上述金电极上的绝缘膜上开设的接触孔、以及通过上述接触孔与金电极进行欧姆接触的铝布线,
其中:上述金电极为金系合金膜、在该金系合金膜上形成的阻挡金属膜、和在该阻挡金属膜上形成的金膜的层结构,上述金电极的周边部分与上述绝缘膜的重合宽度小于等于1μm。
3.一种电极接触结构,包括:金电极、在上述金电极上的绝缘膜上开设的接触孔、以及通过上述接触孔与金电极进行欧姆接触的铝布线,
其中:上述金电极为金系合金膜、在该金系合金膜上形成的阻挡金属膜、和在该阻挡金属膜上形成的金膜的层结构,上述接触孔的大小至少大于等于16μm2
4.如权利要求1、2或3所述的电极接触结构,其特征在于:上述阻挡金属膜由Cr、Ni、Pt、Ti中的任一种形成的高熔点金属构成。
5.如权利要求1、2或3所述电极接触结构,其特征在于:上述阻挡金属膜由Ti形成。
6.如权利要求1~5中任一项所述的电极接触结构,其特征在于:所述金膜的厚度大于等于5nm小于等于0.1μm。
7.一种使用了PNPN结构的3端发光晶闸管的自扫描型发光元件阵列,其特征在于:上述3端发光晶闸管的电极接触结构是权利要求1~6中任一项所述的电极接触结构。
CN201010134380XA 2004-04-28 2005-04-28 电极接触结构及其制造方法 Expired - Fee Related CN101814479B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2004132738 2004-04-28
JP2004-132738 2004-04-28
JP2005-26149 2005-02-02
JP2005026149A JP4882236B2 (ja) 2004-04-28 2005-02-02 電極コンタクト構造およびその製造方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN2005100684793A Division CN1691286B (zh) 2004-04-28 2005-04-28 电极接触结构及其制造方法

Publications (2)

Publication Number Publication Date
CN101814479A true CN101814479A (zh) 2010-08-25
CN101814479B CN101814479B (zh) 2011-12-14

Family

ID=35493929

Family Applications (2)

Application Number Title Priority Date Filing Date
CN2005100684793A Expired - Fee Related CN1691286B (zh) 2004-04-28 2005-04-28 电极接触结构及其制造方法
CN201010134380XA Expired - Fee Related CN101814479B (zh) 2004-04-28 2005-04-28 电极接触结构及其制造方法

Family Applications Before (1)

Application Number Title Priority Date Filing Date
CN2005100684793A Expired - Fee Related CN1691286B (zh) 2004-04-28 2005-04-28 电极接触结构及其制造方法

Country Status (5)

Country Link
US (1) US7436065B2 (zh)
JP (1) JP4882236B2 (zh)
KR (1) KR101042882B1 (zh)
CN (2) CN1691286B (zh)
TW (1) TWI385798B (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109923645A (zh) * 2016-10-28 2019-06-21 三菱电机株式会社 半导体装置及其制造方法
CN111129251A (zh) * 2019-12-30 2020-05-08 广东德力光电有限公司 一种高焊接性倒装led芯片的电极结构

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5181462B2 (ja) * 2006-10-31 2013-04-10 富士ゼロックス株式会社 半導体素子及びその製造方法
JP2011040582A (ja) 2009-08-11 2011-02-24 Fuji Xerox Co Ltd 発光素子およびその製造方法
JP5423275B2 (ja) 2009-09-17 2014-02-19 富士ゼロックス株式会社 発光素子
JP2011066296A (ja) * 2009-09-18 2011-03-31 Fuji Xerox Co Ltd 電極コンタクト構造、自己走査型発光素子アレイ
CN103993287B (zh) * 2014-05-30 2017-01-04 天津大学 一种金电极的制备方法
CN110729387B (zh) * 2019-10-24 2020-10-23 厦门乾照光电股份有限公司 发光二极管芯片及发光二极管芯片的制造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6489468A (en) * 1987-09-30 1989-04-03 Toshiba Corp Semiconductor device
US5821627A (en) * 1993-03-11 1998-10-13 Kabushiki Kaisha Toshiba Electronic circuit device
JP3239596B2 (ja) 1994-02-23 2001-12-17 株式会社デンソー 半導体装置
US5587336A (en) * 1994-12-09 1996-12-24 Vlsi Technology Bump formation on yielded semiconductor dies
JP3379062B2 (ja) * 1997-12-02 2003-02-17 富士通カンタムデバイス株式会社 半導体装置及びその製造方法
JP4362905B2 (ja) * 1999-09-21 2009-11-11 富士ゼロックス株式会社 自己走査型発光装置、書き込み用光源および光プリンタ
JP2004303861A (ja) * 2003-03-31 2004-10-28 Renesas Technology Corp 半導体装置およびその製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109923645A (zh) * 2016-10-28 2019-06-21 三菱电机株式会社 半导体装置及其制造方法
CN109923645B (zh) * 2016-10-28 2022-11-01 三菱电机株式会社 半导体装置及其制造方法
CN111129251A (zh) * 2019-12-30 2020-05-08 广东德力光电有限公司 一种高焊接性倒装led芯片的电极结构

Also Published As

Publication number Publication date
CN101814479B (zh) 2011-12-14
CN1691286A (zh) 2005-11-02
US20060001171A1 (en) 2006-01-05
CN1691286B (zh) 2010-04-21
JP2005340767A (ja) 2005-12-08
JP4882236B2 (ja) 2012-02-22
TWI385798B (zh) 2013-02-11
US7436065B2 (en) 2008-10-14
KR101042882B1 (ko) 2011-06-20
TW200610146A (en) 2006-03-16
KR20060047205A (ko) 2006-05-18

Similar Documents

Publication Publication Date Title
CN101814479B (zh) 电极接触结构及其制造方法
CN105637658B (zh) 半导体发光元件
JP4947954B2 (ja) 発光素子
JP4970739B2 (ja) 複数の電流拡張層を有するオプトエレクトロニクス素子およびその製造方法
CN104471727A (zh) 半导体发光器件
CN111416027B (zh) 一种倒装高压发光二极管及发光装置
US20080237629A1 (en) Group III-V Semiconductor device and method for producing the same
JP4901453B2 (ja) 半導体発光素子
KR20240100327A (ko) 발광소자
CN108598251A (zh) 半导体发光元件
KR20080087619A (ko) 일체형 열 싱크를 갖는 집적 회로 디바이스
EP2037507A1 (en) Semiconductor light emitting element and method for fabricating the same
US20130168721A1 (en) Light emitting device
CN103137813A (zh) 半导体发光元件
JP2005123489A (ja) 窒化物半導体発光素子およびその製造方法
JP2011040582A (ja) 発光素子およびその製造方法
CN105981185A (zh) 半导体发光元件
JP6040769B2 (ja) 発光素子及びその製造方法
US7632759B2 (en) Semiconductor device with front side metallization and method for the production thereof
JP6119906B2 (ja) 発光素子
US9093356B2 (en) Semiconductor light emitting element
JP2011119627A (ja) 半導体装置
US20230230903A1 (en) Semiconductor chip, chip system, method of forming a semiconductor chip, and method of forming a chip system
JP5471882B2 (ja) 半導体素子
JPH0233929A (ja) 半導体装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20111214

Termination date: 20180428