CN109923645A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN109923645A
CN109923645A CN201680090353.2A CN201680090353A CN109923645A CN 109923645 A CN109923645 A CN 109923645A CN 201680090353 A CN201680090353 A CN 201680090353A CN 109923645 A CN109923645 A CN 109923645A
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film
semiconductor device
electroless
back side
catalyst metal
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CN109923645B (zh
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上野隆二
砂本昌利
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
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Abstract

目的在于提供能够对上方配置有镍膜的半导体基板的污染进行抑制的技术。半导体装置具备：半导体基板；铝合金膜，其配置于半导体基板的表面以及背面中的至少任意一个面之上；催化剂金属膜，其配置于铝合金膜上方，且具有能够进行析出镍的自催化反应的催化活性；无电解镍镀膜，其配置于催化剂金属膜之上；以及反应物层，其配置于铝合金膜和催化剂金属膜之间，且包含催化剂金属膜的金属。

Description

半导体装置及其制造方法
技术领域
本发明涉及具备镍膜的半导体装置及其制造方法。
背景技术
在IGBT(绝缘栅型双极晶体管)、二极管等纵向导通的半导体装置的制造工序中，为了降低通电时的电阻而提高电流电压特性，对半导体晶片进行减薄加工。近年来，有时半导体晶片的厚度被减薄至50μm左右。
另一方面，现有的主流技术是，在将纵向导通的半导体装置安装于电路基板时，在半导体装置的背面电极进行焊料接合，进行将铝线等连接于表面电极的导线键合。但是，近年来，为了低成本化、提高散热性，正在使用在半导体装置的表面电极以及背面电极这两面进行焊料接合的技术。因此，焊料接合性优异的镍(Ni)/金(Au)的膜对于半导体装置的表面电极是必要的。但是，在进行焊料接合时，由于Ni膜被焊料侵蚀而逐渐减少，所以需要例如大于或等于2μm的比较厚的Ni膜。作为比较厚的Ni膜的形成，由于在基于蒸镀或溅射的成膜的情况下制造成本高并且图案化困难，所以低成本且图案化容易的基于镀覆的形成受到关注。
然而，随着上述半导体装置的薄化和表面电极即Ni膜的厚膜化，半导体装置的翘曲即半导体晶片的翘曲变大。其结果，半导体装置的处理变得困难，在向电路基板进行安装时焊料内容易存在孔洞而容易产生接合不良，由此，成品率降低。
但是，通常针对半导体装置的铝(Al)合金电极表面的Ni镀层，使用称为锌酸盐法的无电解镀Ni方法。在锌酸盐法中，首先，对形成于半导体晶片之上的Al合金电极进行脱脂、酸洗，使其表面成为活性面。之后，利用锌(Zn)的标准氧化还原电位比Al的该电位高这一情况，在Al合金电极表面析出薄的Zn膜，然后通过使该Zn膜的上部与Ni膜进行置换，从而形成无电解Ni镀层。
然而，在上述锌酸盐法中，存在由于脱脂、酸洗、锌盐酸处理的药液而使Al合金电极局部被异常蚀刻而消失的问题。该消失是起因于Al合金电极的膜质异常、膜中异物而产生的。这样，在Al合金电极消失的情况下，由于下层的半导体基板暴露于药液，因而存在使半导体基板被污染、电气特性恶化的问题。为了防止这样的问题，提出了各种技术(例如专利文献1)。
专利文献1：日本特许第5707709号公报
发明内容
在专利文献1所公开的技术中，通过进行将Ni镀膜下层的金属电极表面活性化的工序，从而不进行镀Ni工序中的脱脂、酸洗、锌盐酸处理等预处理，就在金属电极表面析出无电解Ni镀膜。但是，在该技术中，在金属电极表面的活性化工序中难以维持稳定的品质，存在产生金属电极膜和Ni镀膜的密合不良、产生Ni镀膜的析出异常的问题。
因此，本发明是鉴于上述问题而提出的，其目的在于提供能够抑制上方配置有镍膜的半导体基板的污染的技术。
本发明涉及的半导体装置具备：半导体基板；铝合金膜，其配置于所述半导体基板的表面以及背面中的至少任意一个面之上；催化剂金属膜，其配置于所述铝合金膜上方且具有能够进行析出镍的自催化反应的催化活性；无电解镍镀膜，其配置于所述催化剂金属膜之上；以及反应物层，其配置于所述铝合金膜和所述催化剂金属膜之间且包含所述催化剂金属膜的金属。
发明的效果
根据本发明，具备配置于铝合金膜和催化剂金属膜之间的包含催化剂金属膜的金属的反应物层。由此，能够通过反应物层抑制例如镀覆处理时由脱脂液、无电解Ni镀液、以及无电解Au镀液等导致的对半导体基板的污染。
本发明的目的、特征、方式以及优点通过下面的详细说明和附图而更加清楚。
附图说明
图1是表示实施方式1涉及的半导体装置的结构的剖面图。
图2是表示实施方式1涉及的半导体装置的制造工序的流程图。
图3是表示实施方式1涉及的半导体装置的制造工序的剖面图。
图4是表示实施方式1涉及的半导体装置的制造工序的剖面图。
图5是表示实施方式1涉及的半导体装置的制造工序的剖面图。
图6是表示实施方式1涉及的半导体装置的制造工序的剖面图。
图7是表示实施方式1涉及的半导体装置的制造工序的剖面图。
图8是表示实施方式1涉及的半导体装置的制造工序的剖面图。
图9是表示实施方式1涉及的半导体装置的制造工序的条件的一个例子的图。
图10是表示变形例涉及的半导体装置的表面Au膜的厚度和各种特性之间的关系的图。
图11是表示实施方式2涉及的半导体装置的结构的剖面图。
图12是表示实施方式2涉及的半导体装置的制造工序的流程图。
图13是表示实施方式2涉及的半导体装置的制造工序的剖面图。
图14是表示实施方式2涉及的半导体装置的制造工序的剖面图。
图15是表示实施方式2涉及的半导体装置的制造工序的剖面图。
图16是表示实施方式2涉及的半导体装置的制造工序的剖面图。
图17是表示实施方式2涉及的半导体装置的制造工序的剖面图。
图18是表示实施方式2涉及的半导体装置的制造工序的条件的一个例子的图。
图19是表示实施方式3涉及的半导体装置的结构的剖面图。
图20是表示实施方式3涉及的半导体装置的制造工序的流程图。
图21是表示实施方式3涉及的半导体装置的制造工序的剖面图。
图22是表示实施方式3涉及的半导体装置的制造工序的剖面图。
图23是表示实施方式3涉及的半导体装置的制造工序的剖面图。
图24是表示实施方式3涉及的半导体装置的制造工序的剖面图。
图25是表示实施方式3涉及的半导体装置的制造工序的条件的一个例子的图。
具体实施方式
<实施方式1>
图1是表示本发明的实施方式1涉及的半导体装置的结构的剖面图。图1的半导体装置具备：半导体晶片1；表面半导体元件区2；表面Al合金膜3；表面Au膜4；表面反应物层5；聚酰亚胺保护膜6；背面扩散区7；背面电极8；表面无电解Ni镀膜9；以及无电解金镀膜即表面无电解Au镀膜10。此外，表面Al合金膜3、表面Au膜4、表面反应物层5、表面无电解Ni镀膜9以及表面无电解Au镀膜10被用作半导体晶片1的表面侧的电极。
半导体基板即半导体晶片1使用例如除了硅(Si)以外，由碳化硅(SiC)等宽带隙半导体构成的晶片。表面半导体元件区2是在半导体晶片1的表面配置的区域，例如杂质的浓度适当地被改变。作为铝合金膜的表面Al合金膜3配置于半导体晶片1的表面半导体元件区2等的表面之上。
作为催化剂金属膜的表面Au膜4是具有能够进行析出镍的自催化反应的催化活性的膜或层，配置于表面Al合金膜3上方。作为无电解镍镀膜的表面无电解Ni镀膜9配置于表面Au膜4之上。而且，表面反应物层5是包含表面Au膜4的金属即Au的膜，配置于表面Al合金膜3和表面Au膜4之间。
根据这样的结构，配置于表面Al合金膜3和表面Au膜4之间的表面反应物层5作为阻挡膜起作用，以使得不会由于镀敷时的处理液对表面Al合金膜3进行了蚀刻而使表面半导体元件区2受到污染。而且，在表面反应物层5的表面之上配置有具有针对镍的自析出催化活性的表面Au膜4，在表面Au膜4的表面之上配置有通过镍的自催化反应而析出的表面无电解Ni镀膜9。
<制造方法>
图2是表示本实施方式1涉及的半导体装置的制造工序的流程图。
如图3所示，在步骤S1中，在半导体晶片1的表面形成表面半导体元件区2。在步骤S2中，通过溅射法在半导体晶片1的表面的所期望区域形成包含例如AlSi、AlCu(Cu是铜)、AuSiCu等的表面Al合金膜3。
然后，如图4所示，在步骤S3中，通过溅射法在表面Al合金膜3的表面之上形成表面Au膜4a。此时，对成膜室的晶片工作台进行加热而成膜出表面Au膜4a。通过这样加热而成膜出表面Au膜4a，由此表面Au膜4a的Au扩散至表面Al合金膜3中与表面Au膜4接触的部分。其结果，在表面Al合金膜3和表面Au膜4a之间形成包含Au的表面反应物层5。
如图5所示，在步骤S4中，将成膜室的晶片工作台温度设为小于或等于常温的温度例如25℃，继续进行表面Au膜的成膜，由此完成表面Au膜4。通过利用小于或等于25℃的晶片工作台进行表面Au膜的成膜，从而能够抑制在该成膜中Au从表面Au膜向表面反应物层5的扩散。
然后，如图6所示，在步骤S5中，以覆盖表面Au膜4的边缘的方式形成由聚酰亚胺构成的聚酰亚胺保护膜6。
然后，如图7所示，在步骤S6中，通过对半导体晶片1的背面进行机械磨削而减薄半导体晶片1。之后，对通过机械磨削而产生于半导体晶片1的未图示的缺陷层进行湿蚀刻，由此除去例如5～20μm，将半导体晶片1减薄至期望的厚度。然后，在步骤S7中，在半导体晶片1的背面形成背面扩散区7，在步骤S8中，在背面扩散区7之上形成背面电极8。背面电极8使用多个金属膜，上述多个金属膜是例如使用溅射法在半导体晶片1的背面依次形成的，包含AlSi、AlCu、AlSiCu等Al合金膜、Ti膜、Ni膜、Au膜。在这样构成的情况下，能够通过Al合金膜而获得半导体晶片1和背面电极8的良好的接合，能够通过Ti膜而获得阻挡金属的功能，能够通过Ni膜以及Au膜而获得良好的焊料接合。
然后，在步骤S9中，在表面Au膜4的表面实施通过等离子体进行清洁化的处理即等离子体清洁。在本实施方式1中，作为等离子体清洁，是在由氧等离子体进行的清洁之后执行由氢等离子体进行的清洁。
氧等离子体清洁处理是如下工序，即，利用氧等离子体，使无法通过镀覆预处理除去的附着于表面Au膜4表面的牢固的有机物残渣氧化分解而除去。氢等离子体清洁处理是如下工序，即，使氢混入至氩或氮的等离子体中，利用氩离子或氮离子进行撞击而除去有机物残渣，同时通过氢离子对附着于表面Au膜4表面的氧化物进行还原除去。通过进行上述氧等离子体清洁处理和氢等离子体清洁处理，从而能够使表面Au膜4的表面清洁化，因此，能够提高表面Au膜4和下一个工序中形成的表面无电解Ni镀膜9之间的密合性。
然后，如图8所示，在步骤S10中，在表面Au膜4之上形成表面无电解Ni镀膜9。首先，通过使半导体晶片1浸渍于脱脂液，从而除去表面Au膜4的表面之上的油脂、有机物，提高表面Au膜4的润湿性。然后，通过使半导体晶片1浸渍于无电解Ni镀液，进行析出镍的自催化反应，从而在表面Au膜4之上形成期望厚度的表面无电解Ni镀膜9。通过自催化反应而析出无电解Ni镀层是由于表面Au膜4的Au成为无电解Ni镀层析出的催化点。
具体而言，首先，通过表面Au膜4的Au作为催化剂起作用，从而从无电解Ni镀液内的还原剂释放出电子。然后，无电解Ni镀液内的镍离子接收该电子，从而在表面Au膜4的表面析出无电解Ni镀层。之后，在上述反应中，通过代替表面Au膜4的Au而使用无电解Ni镀膜的Ni作为催化剂，从而能够在镍的析出中进行镍成为催化剂的镍的自催化反应。根据这样的自催化反应，不需要现有的在向Al合金表面析出无电解Ni镀层时所利用的锌酸盐法。因此，根据本实施方式1涉及的半导体装置的制造方法，能够抑制通过锌酸盐法产生的Al合金膜的减少，其结果，能够抑制半导体晶片1的污染。
此外，如果还考虑到向半导体晶片1的膜应力等，则优选表面无电解Ni镀膜9的厚度是例如2～10μm，进一步而言，优选是例如5μm。在镀覆法中，能够容易地形成这样的几μm级的厚膜，与此同时，由于在聚酰亚胺等的不产生电子的交换的保护膜之上不析出无电解Ni镀层，所以能够形成具有所期望图案的无电解Ni镀膜。
然后，在步骤S11中，为了抑制表面无电解Ni镀膜9的表面的氧化，在形成表面无电解Ni镀膜9之后浸渍于无电解Au镀液。由此，在表面无电解Ni镀膜9之上形成厚度例如为10～70nm的表面无电解Au镀膜10。这里，作为表面无电解Au镀膜10的形成，使用了镍的自催化反应，但是不限于此，也可以使用例如锌酸盐法等。
图9是表示上述各工序的条件的一个例子的图。以图9所示的条件形成半导体装置的结果是，确认到在表面Al合金膜3和表面Au膜4之间配置有厚度为67nm的表面反应物层5的构造。另外，表面Al合金膜3也没有减少，充分确保了表面Al合金膜3和表面无电解Ni镀膜9之间的密合力。
<实施方式1的总结>
以上的本实施方式1涉及的半导体装置具备在表面Al合金膜3和表面Au膜4之间配置的表面反应物层5。根据这样的结构，由于表面反应物层5作为阻挡膜起作用，所以能够抑制镀覆处理时脱脂液、无电解Ni镀液、以及无电解Au镀液对半导体晶片1的污染。另外，还能够抑制因脱脂液导致的表面Al合金膜3的减少，能够形成具有均匀膜厚的表面无电解Ni镀膜9。
另外，本实施方式1涉及的半导体装置在表面无电解Ni镀膜9之上具备表面无电解Au镀膜10。由此，能够抑制表面无电解Ni镀膜9的表面的氧化，所以能够获得良好的焊料接合。
另外，根据本实施方式1，构成为将由在无电解Ni镀层的形成中催化活性高的Au构成的表面Au膜4用作催化剂金属膜。根据这样的结构，能够高效地析出表面无电解Ni镀膜9，能够降低生产成本。此外，在以上说明中，使用Au作为催化剂金属膜的催化剂金属。但是，催化剂金属不限于此，例如使用具有无电解Ni镀层的催化作用的Pd(钯)、Ni、Co(钴)也能够期待获得与上述同样的效果。
另外，在本实施方式1中，通过等离子体对表面Au膜4进行清洁化。由此，表面Au膜4的表面变成活性表面，所以能够提高表面Au膜4和表面无电解Ni镀膜9之间的密合性。
<变形例>
图10是表示对实施方式1中说明的表面Au膜4的厚度、表面Al合金膜3的减少量、以及表面Au膜4和表面无电解Ni镀膜9之间的密合性的关系进行调查得到的结果的图。根据图10的结果可知，关于表面Al合金膜3的减少，在所有条件下都没有发生减少，能够确认到由表面反应物层5带来的阻挡膜的效果。另一方面，密合性随着表面Au膜4的目标厚度增加而变好。因此，表面Au膜4的厚度优选大于或等于20nm且小于或等于200nm，更优选大于或等于50nm且小于或等于200nm。在这样构成的情况下，能够提高表面Au膜4和表面无电解Ni镀膜9之间的密合性。此外，以上的变形例对于后述的实施方式2及其后的实施方式的催化剂金属膜也同样能够适用。
<实施方式2>
图11是表示本发明的实施方式2涉及的半导体装置的结构的剖面图。以下，在本实施方式2说明的结构要素中，对于与实施方式1相同或类似的结构要素，标注相同的参照标号，主要对不同的结构要素进行说明。
图11的半导体装置具备：半导体晶片1、表面半导体元件区2、表面Al合金膜3、聚酰亚胺保护膜6、背面扩散区7、背面Al合金膜11、背面Au膜12、背面反应物层13、背面无电解Ni镀膜14、以及背面无电解Au镀膜15。
在本实施方式2中，作为与在图1的半导体晶片1的表面侧配置的表面Al合金膜3、表面Au膜4、表面反应物层5、表面无电解Ni镀膜9以及表面无电解Au镀膜10相同的结构要素，在半导体晶片1的背面侧配置有背面Al合金膜11、背面Au膜12、背面反应物层13、背面无电解Ni镀膜14以及背面无电解Au镀膜15。
<制造方法>
图12是表示本实施方式2涉及的半导体装置的制造工序的流程图。
如图13所示，在步骤S11中，在半导体晶片1的表面形成表面半导体元件区2。在步骤S12中，通过溅射法在半导体晶片1的表面的所期望区域形成包含例如AlSi、AlCu、AuSiCu等的表面Al合金膜3。然后，在步骤S13中，以覆盖表面Al合金膜3的边缘的方式形成由聚酰亚胺构成的聚酰亚胺保护膜6。
然后，如图14所示，在步骤S14中，通过在半导体晶片1的背面进行机械磨削而减薄半导体晶片1。之后，对通过机械磨削而产生于半导体晶片1的未图示的缺陷层进行湿蚀刻，由此除去例如5～20μm，将半导体晶片1减薄至期望的厚度。然后，在步骤S15中，在半导体晶片1的背面形成背面扩散区7，在步骤S16中，通过溅射法在半导体晶片1的背面形成包含例如AlSi、AlCu、AuSiCu等的背面Al合金膜11。
然后，如图15所示，在步骤S17中，通过溅射法在背面Al合金膜11的表面之上形成背面Au膜12a。此时，对成膜室的晶片工作台进行加热而成膜出背面Au膜12a。通过这样加热而成膜出背面Au膜12a，由此背面Au膜12a的Au扩散至背面Al合金膜11中与背面Au膜12a接触的部分。其结果，在背面Al合金膜11和背面Au膜12a之间形成包含Au的背面反应物层13。
如图16所示，在步骤S18中，将成膜室的晶片工作台温度设为小于或等于常温的温度例如25℃，继续进行背面Au膜的成膜，由此完成背面Au膜12。通过利用小于或等于25℃的晶片工作台进行背面Au膜的成膜，从而能够抑制在该成膜中Au从背面Au膜向背面反应物层13的扩散。
然后，在步骤S19中，在背面Au膜12的表面实施通过等离子体进行清洁化的处理即等离子体清洁。在本实施方式2中，等离子体清洁是在由氧等离子体进行的清洁之后执行由氢等离子体进行的清洁。由此，能够提高背面Au膜12和下一个工序中形成的背面无电解Ni镀膜14之间的密合性。
然后，如图17所示，在步骤S20中，在背面Au膜12之上形成背面无电解Ni镀膜14。首先，通过使半导体晶片1浸渍于脱脂液，从而除去背面Au膜12的表面之上的油脂、有机物，提高背面Au膜12的润湿性。然后，通过使半导体晶片1浸渍于无电解Ni镀液，进行析出镍的自催化反应，从而在背面Au膜12之上形成所期望厚度的背面无电解Ni镀膜14。通过自催化反应而析出无电解Ni镀层是由于背面Au膜12的Au成为无电解Ni镀层析出的催化点。但是，在半导体晶片1的表面侧，仅未成为无电解Ni镀层的催化点的表面Al合金膜3露出，所以没有析出无电解Ni镀层。如果还考虑到向半导体晶片1的膜应力等，则优选背面无电解Ni镀膜14的厚度是例如2～10μm，进一步而言，优选是例如5μm。
然后，在步骤S21中，为了抑制背面无电解Ni镀膜14的表面的氧化，在形成背面无电解Ni镀膜14之后，浸渍于无电解Au镀液。由此，在背面无电解Ni镀膜14之上形成厚度例如为10～70nm的背面无电解Au镀膜15。这里，作为背面无电解Au镀膜15的形成，使用了镍的自催化反应，但是不限于此，也可以使用例如锌酸盐法等。
图18是表示上述的各工序的条件的一个例子的图。以图18所示的条件形成半导体装置的结果是，确认到在背面Al合金膜11和背面Au膜12之间配置有厚度为48nm的背面反应物层13的构造。另外，背面Al合金膜11也没有减少，充分确保了背面Al合金膜11和背面无电解Ni镀膜14之间的密合力。
<实施方式2的总结>
以上的本实施方式2涉及的半导体装置具备在背面Al合金膜11和背面Au膜12之间配置的背面反应物层13。根据这样的结构，由于背面反应物层13作为阻挡膜起作用，所以能够抑制镀覆处理时脱脂液、无电解Ni镀液、以及无电解Au镀液对半导体晶片1的污染。另外，还能够抑制因脱脂液导致的背面Al合金膜11的减少，能够形成均匀膜厚的背面无电解Ni镀膜14。另外，除此之外，还能够获得与在实施方式1中说明的效果相同的效果。
<实施方式3>
图19是表示本发明的实施方式3涉及的半导体装置的结构的剖面图。以下，在本实施方式3说明的结构要素中，对于与实施方式1、2相同或类似的结构要素，标注相同的参照标号，主要对不同的结构要素进行说明。
图19的半导体装置具备：半导体晶片1、表面半导体元件区2、表面Al合金膜3、表面Au膜4、表面反应物层5、聚酰亚胺保护膜6、背面扩散区7、表面无电解Ni镀膜9、表面无电解Au镀膜10、背面Al合金膜11、背面Au膜12、背面反应物层13、背面无电解Ni镀膜14、以及背面无电解Au镀膜15。
在本实施方式3中，在半导体晶片1的表面侧具备实施方式1中说明过的配置于图1的半导体晶片1的表面侧的结构要素，在半导体晶片1的背面侧具备实施方式2中说明过的配置于图11的半导体晶片1的表面侧的结构要素。除此之外，在本实施方式3中，半导体晶片1具有在该半导体晶片1的外周部配置的加强部1a。这里，虽然说明了加强部1a是半导体晶片1的比较厚的部分，但是不限于此。
<制造方法>
图20是表示本实施方式3涉及的半导体装置的制造工序的流程图。
在步骤S31～S35中，进行与实施方式1的步骤S1～S5相同的工序。由此，获得与图6相同的构造。
然后，如图21所示，在步骤S36中，通过在半导体晶片1的背面进行机械磨削而减薄半导体晶片1的外周部以外的部分。之后，对通过机械磨削而产生于半导体晶片1的未图示的缺陷层进行湿蚀刻，由此除去例如5～20μm，将该部分减薄至期望的厚度。由此，在半导体晶片1的外周部形成比较厚的加强部1a。通过该加强部1a，即使减薄半导体晶片1的外周部以外的部分，也能确保半导体晶片1的强度，另外，还能够抑制半导体晶片1的翘曲。
然后，在步骤S37中，在半导体晶片1的背面形成背面扩散区7，在步骤S38中，通过溅射法在半导体晶片1的背面形成包含例如AlSi、AlCu、AuSiCu等的背面Al合金膜11。
然后，如图22所示，在步骤S39中，通过溅射法在背面Al合金膜11的表面之上形成背面Au膜12a。此时，对成膜室的晶片工作台进行加热而成膜出背面Au膜12a。通过这样加热而成膜出背面Au膜12a，由此背面Au膜12a的Au扩散至背面Al合金膜11中与背面Au膜12a接触的部分。其结果，在背面Al合金膜11和背面Au膜12a之间形成包含Au的背面反应物层13。
如图23所示，在步骤S40中，将成膜室的晶片工作台温度设为小于或等于常温的温度例如25℃，继续进行背面Au膜的成膜，由此完成背面Au膜12。通过利用小于或等于25℃的晶片工作台进行背面Au膜的成膜，从而能够抑制在该成膜中Au从背面Au膜向背面反应物层13的扩散。
然后，在步骤S41中，在表面Au膜4以及背面Au膜12的表面实施通过等离子体进行清洁化的处理即等离子体清洁。在本实施方式3中，等离子体清洁是在由氧等离子体进行的清洁之后执行由氢等离子体进行的清洁。由此，能够提高表面Au膜4和下一个工序中形成的表面无电解Ni镀膜9之间的密合性、以及背面Au膜12和背面无电解Ni镀膜14之间的密合性。
然后，如图24所示，在步骤S42中，在表面Au膜4之上以及背面Au膜12之上分别并行地形成表面无电解Ni镀膜9以及背面无电解Ni镀膜14。首先，通过使半导体晶片1浸渍于脱脂液，从而除去表面Au膜4以及背面Au膜12的表面之上的油脂、有机物，提高表面Au膜4以及背面Au膜12的润湿性。然后，通过使半导体晶片1浸渍于无电解Ni镀液，进行析出镍的自催化反应，从而形成期望厚度的表面无电解Ni镀膜9以及背面无电解Ni镀膜14。通过自催化反应而析出无电解Ni镀层是由于Au成为无电解Ni镀层析出的催化点。如果还考虑到向半导体晶片1的膜应力等，则优选表面无电解Ni镀膜9以及背面无电解Ni镀膜14各自的厚度是例如2～10μm。
然后，在步骤S43中，在表面无电解Ni镀膜9之上以及背面无电解Ni镀膜14之上分别并行地形成表面无电解Au镀膜10以及背面无电解Au镀膜15。另外，无电解Au镀膜的形成既可以使用镍的自催化反应，也可以使用锌酸盐法。
图25是表示上述各工序的条件的一个例子的图。以图25所示的条件形成半导体装置的结果是，确认到厚度为59nm的表面反应物层5以及厚度为43nm的背面反应物层13。另外，表面Al合金膜3以及背面Al合金膜11也没有减少，充分确保了表面Al合金膜3和表面无电解Ni镀膜9之间的密合力、以及背面Al合金膜11和背面无电解Ni镀膜14之间的密合力。另外，还能够确认到抑制了半导体晶片1的翘曲。
<实施方式3的总结>
以上这样的本实施方式3涉及的半导体装置具备表面反应物层5以及背面反应物层13，因此，能够获得与实施方式1的效果以及实施方式2的效果相同的效果。
另外，在本实施方式3中，半导体晶片1具备配置于该半导体晶片1的外周部的加强部1a。由此，能够抑制由于Ni镀膜的应力导致的半导体晶片1的翘曲以及进行了芯片化时的芯片的翘曲。
此外，本发明能够在其发明范围内对各实施方式以及各变形例自由地进行组合，对各实施方式以及各变形例适当地进行变形、省略。
虽然详细说明了本发明，但是上述说明在所有方式中都是例示，本发明并不限定于此。可以解释为在不超出本发明范围的情况下能够想到未例示的无数个变形例。
标号的说明
1半导体晶片，2表面Al合金膜，4表面Au膜，5表面反应物层，9表面无电解Ni镀膜，10表面无电解Au镀膜，11背面Al合金膜，12背面Au膜，13背面反应物层，14背面无电解Ni镀膜，15背面无电解Au镀膜。

Claims (12)

1.一种半导体装置，其具备：
半导体基板；
铝合金膜，其配置于所述半导体基板的表面以及背面中的至少任意一个面之上；
催化剂金属膜，其配置于所述铝合金膜上方且具有能够进行析出镍的自催化反应的催化活性；
无电解镍镀膜，其配置于所述催化剂金属膜之上；以及
反应物层，其配置于所述铝合金膜和所述催化剂金属膜之间且包含所述催化剂金属膜的金属。
2.根据权利要求1所述的半导体装置，其中，
还具备：
无电解金镀膜，其配置于所述无电解镍镀膜之上。
3.根据权利要求1或2所述的半导体装置，其中，
所述催化剂金属膜的所述金属包含Au、Pd、Ni、Co中的至少任意一个。
4.根据权利要求1～3中任一项所述的半导体装置，其中，
所述催化剂金属膜的厚度大于或等于20nm且小于或等于200nm。
5.根据权利要求1～4中任一项所述的半导体装置，其中，
所述半导体基板具有加强部，所述加强部配置于该半导体基板的外周部。
6.一种半导体装置的制造方法，其具备以下工序：
(a)在半导体基板的表面以及背面中的至少任意一个面之上形成铝合金膜；
(b)在所述铝合金膜之上形成催化剂金属膜，所述催化剂金属膜具有能够进行析出镍的自催化反应的催化活性；
(c)使所述催化剂金属膜的金属扩散至所述铝合金膜中与所述催化剂金属膜接触的部分，由此在所述铝合金膜和所述催化剂金属膜之间形成反应物层；以及
(d)在所述工序(c)之后，通过所述自催化反应而在所述催化剂金属膜之上形成无电解镍镀膜。
7.根据权利要求6所述的半导体装置的制造方法，其中，
还具备以下工序：
(e)在所述无电解镍镀膜之上形成无电解金镀膜。
8.根据权利要求6或7所述的半导体装置的制造方法，其中，
所述催化剂金属膜的所述金属包含Au、Pd、Ni、Co中的至少任意一个。
9.根据权利要求6～8中任一项所述的半导体装置的制造方法，其中，
所述催化剂金属膜的厚度大于或等于20nm且小于或等于200nm。
10.根据权利要求6～9中任一项所述的半导体装置的制造方法，其中，
还具备以下工序：
(f)在所述工序(c)和所述工序(d)之间，通过等离子体对所述催化剂金属膜进行清洁化。
11.根据权利要求10所述的半导体装置的制造方法，其中，
所述等离子体包含氧等离子体或氢等离子体。
12.根据权利要求6～11中任一项所述的半导体装置的制造方法，其中，
还具备以下工序：
(g)在所述半导体基板的外周部形成加强部。
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