CN101802992A - 以离子植入致能的晶圆键合 - Google Patents

以离子植入致能的晶圆键合 Download PDF

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CN101802992A
CN101802992A CN200880107434A CN200880107434A CN101802992A CN 101802992 A CN101802992 A CN 101802992A CN 200880107434 A CN200880107434 A CN 200880107434A CN 200880107434 A CN200880107434 A CN 200880107434A CN 101802992 A CN101802992 A CN 101802992A
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bonding
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由里·艾洛克海
保罗·沙利文
史帝文·R·沃特
彼得·纽南
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Varian Semiconductor Equipment Associates Inc
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Abstract

所揭示的是将两个藉由离子植入而活化的基底晶圆键合在一起的方法。原位离子键合室允许在制造流程所使用的现有制程设备中进行离子活化与键合。基底的至少其中之一是在低植入能量下进行离子活化,以确保薄表面层下面的晶圆材料免受离子活化的影响。

Description

以离子植入致能的晶圆键合
技术领域
本发明涉及基底(substrate)的植入(implantation)与键合(bonding)的领域,尤其涉及对基底进行离子活化(ion activation)来促成键合的装置及其方法。
背景技术
离子植入是将离子掺入工件的制程。有一种离子植入是在半导体基底的制造过程中植入杂质离子,以得到想要的元件电特性。如同本领域中众所周知的,硅晶圆(silicon wafer)具有晶体结构(crystalline structure),其中硅的固有导电性(intrinsic conductivity)太低,所以不是一种实用的电元件。然而,将想要的杂质掺入晶格(crystal lattice)就能形成载流子(current carrier)。将要掺入晶圆的材料首先要在离子源(ion source)中被游离(ionized)。从离子源中提取(extract)出来的离子经加速而形成规定能量的离子束(ionbeam),此离子束朝着晶圆的表面传播。离子束中的高能离子穿入晶圆主体(bulk),且被埋入(embed)半导体材料的晶格,形成具有想要的导电性的区域。
离子植入机通常包括:离子源室,用来产生特定物种的离子;一系列束线构件(beam line components),用来控制离子束;以及平台(platen)或卡盘(chuck),用来支撑着接收离子束的晶圆。这些构件是安装在真空环境中,以避免接触污染物以及防止离子束分散(dispersion)。束线构件可包括:一系列电极(electrodes),用来从离子源室中提取离子;质量分析器(massanalyzer),此质量分析器被配置以特殊磁场,使得只有具有想要的质荷比(mass-to-charge ratio)的离子才能够穿过此质量分析器;以及修正磁铁(corrector magnet),用来提供带状束(ribbon beam),此带状束朝着正交于此离子束的晶圆传播,且将离子植入晶圆基底。当离子在基底中与电子(electrons)、原子核(nuclei)相碰撞时,离子会丧失能量,且按照其加速度能量(acceleration energy)在基底内的想要的深度停止移动。基底的植入深度是基于离子源室中所产生的离子的离子植入能量与质量。通过静电束扫描或磁束扫描、通过基底移动或者通过束扫描与基底移动相结合,离子束可分布在基底上。离子束可以是点束(spot beam)或具有长维度(long dimension)与短维度(short dimension)的带状束。典型的是,可掺入砷(arsenic)或磷(phosphorus)来在晶圆中形成n型区域,以及掺入硼(boron)、镓(gallium)或铟(indium)来在晶圆中形成p型区域。
可选择的是,也可使用电浆掺杂制程(plasma doping process)来对半导体晶圆进行掺杂。要掺杂的晶圆被放置在电性偏压(electrically-biased)的平台上,此平台是用作阴极(cathode),且位于电浆掺杂模组中。可游离的掺杂气体被引进制程室,且电压脉冲被施加在平台与阳极或制程室墙壁之间,导致含有掺质气体中的离子的电浆形成。此电浆的电浆鞘(plasma sheath)靠近晶圆。所施加的脉冲致使电浆中的离子加速穿过电浆鞘,且植入晶圆。植入的深度是和晶圆与阳极或制程室墙壁之间所施加的电压有关。如此一来,可得到的植入能量非常低。例如,于1994年10月11日颁发给Sheng的美国专利第5,354,381号、于2000年2月1日颁发给Liebert等人的美国专利第6,020,592号以及于2001年2月6日颁发给Goeckner等人的美国专利第6,182,604号中有关于电浆掺杂系统的描述。在其他类型的电浆掺杂系统中,电浆是通过(例如)来自天线(antenna)的感应耦合(inductively-coupled)射频(Radio Frequency,RF)电力来源源不断地产生,其中天线是配置在电浆掺杂室之内或之外,且此天线连接到射频电源。电压脉冲是以特定的间隔施加在平台与阳极之间,致使电浆中的离子加速前往晶圆。
许多半导体制程都包括晶圆键合,在晶圆键合中,不同的材料被统一化(unified)以构成新的电子元件,而此电子元件不可能以别的方式利用单一的硅晶圆制造而成。依赖于晶圆键合的一些常见制程包括(例如)硅覆绝缘层(silicon-on-insulator,SOI)制造与三维堆迭晶片(three-dimensional stackedchip)制造。制造硅覆绝缘层晶片有几种不同的方法,一种方法是利用层传递制程(layer transfer process)来形成硅覆绝缘层结构,在此层传递制程中,一晶体硅晶圆被键合到先前形成在另一晶体硅晶圆上的二氧化硅层的上面。范德华力(Van der Waals forces)致使这两个晶圆立即黏合,使得在退火(annealing)步骤中通过加热晶圆能够形成更牢固的键合。然后,半导体活性层(active semiconductor layer)沿着一平面而裂开(cleaved),且上面部分被移除以提供适当薄的半导体活性层。然后此硅树脂隔离层(isolatedsilicone layer)上形成集成电路(integrated circuits)。硅覆绝缘层技术是用来减小结电容(junction capacitance)与寄生漏电流(parasitic leakage current),以提高半导体元件的速度。
要制备将要键合的晶圆,必须活化(activate)表面。活化表面的一种方法是利用湿化学品(wet chemistries)来处理晶圆以产生键合力(bondingforce),且在高温下(>900℃)使用后续退火制程来强化键合。电浆活化法(plasma activation)是用来活化要键合的晶圆表面的另一种制程。在此电浆活化法中,晶圆被放置在电浆室中,在此电浆室里,晶圆暴露在电浆(例如,氢气(H2)、氧气(O2)等)中。在不破坏真空的条件下,晶圆表面被并在一起,且发生键合。利用电浆活化法,晶圆表面上的离子物种的可动性(mobility)增大,这使得氧化物反应增强,从而强化键合制程。此外,电浆活化法使接触污染物的可能性降低,同时也排除了对温度退火的需要。然而,电浆活化法要求在专用的制程装置(例如,半导体集束型设备(semiconductorcluster tool)的电浆室)中进行基底表面键合。典型的半导体集束型设备是由几个不同的晶圆处理模组来组成的,这些晶圆处理模组可依靠中央控制系统来管理。使用独立的制程设备可增大在集束型设备内以及在制造过程中制造晶圆的复杂度及成本。因此,本领域需要一种致能晶圆键合的改良装置及其方法。
发明内容
本发明实施例的目的是一种通过离子植入来致能的晶圆键合方法。在一个实施例中,此晶圆键合方法包括将至少两个基底放置在离子靶室(ion targetchamber)中。这两个基底中的第一基底的至少一个表面暴露在离子束中。这种暴露会减少此基底的表面物种,以准备与第二基底键合。在离子靶室内,第一基底与第二基底在想要的温度下对准(aligned)。第一基底的暴露表面与第二基底的一表面被并在一起且相互接触,以形成键合的基底。
附图说明
图1是活化前的示范性基底表面的示意图。
图2是根据本发明一实施例的示范性离子植入机。
图3是根据本发明一实施例的图1所示的基底在使用图2所示的离子植入机进行了表面活化之后的示意图。
图4显示根据本发明一实施例的离子植入机的制程室。
图5是根据本发明一实施例的离子植入机的图4所示的制程室的另一图式。
图6显示根据本发明一实施例的离子植入机的制程室的另一实施例。
图7是根据本发明一实施例的离子植入机的图6所示的制程室的另一图式。
图8是根据本发明一实施例的图2所示的离子植入机的活化制程的流程图。
具体实施方式
下面将参照附图来详细描述本发明,本发明的较佳实施例示于这些附图中。但是,本发明也可体现为许多不同的形态,而不应局限于本说明书所列举的实施例。确切地说,提供这些实施例是为了使揭示的内容更透彻更完整,且将本发明的范围充分传递给本领域技术人员。在整个附图中,相同的符号代表相同的元件。
本说明书中的装置与方法针对离子植入机来进行描述。但是,这些方法也可应用于与半导体制造有关的其他系统及制程或使用基底键合的其他系统。因此,本发明并不局限于以下所述的特殊实施例。如上所述,基底键合表面的活化可提高硅覆绝缘层晶圆或需要两个基底键合在一起的其他产品的品质。图1是活化前的示范性基底表面的示意图。基底42可以是晶圆或者用具有多个原子40的晶格结构来组成的其他工件。原子40可以是硅或其他元素,其中,(例如)这些原子的外壳与相邻的原子共用电子,形成共价键(covalent bonds),从而形成稳定的晶格结构。但是,位于基底42表面的原子40却不能与相邻的原子(例如,横向上)键合以形成共价键。表面上的这些原子被视为未达到饱和(unsaturated),因为它们缺少形成共价键的相邻原子。第一单层(monolayer)中的原子40的外壳上的一些电子通过与相邻原子40之间的交互作用来达到饱和(saturated),但是这些键相对而言较弱。不在原子40上的其他电子则通过与钝化(passivating)基底表面的杂质之间或与邻接这些原子的其他化合物之间的交互作用来达到饱和。因此,原子40将与化合物41键合,其中化合物41可以是(例如)基底42的表面上所吸收的材料(诸如,有机膜)。原子40与化合物41之间的键合虽然不如主体晶格中的原子40之间的键合那样牢固,但是这些键合仍然会减小基底42表面上的原子40的反应性(reactivity)。如上所述,致使这些原子发生反应的一种方法是将基底表面暴露在湿化学品中以产生键合力,以及在高温下使用后续退火制程且持续规定的时间间隔。此制程使得基底表面具有亲水性(hydrophilic),且容易键合。用来活化基底42表面的另一种方法包括将基底表面暴露在电浆中。如此一来,晶圆表面的离子物种的可动性提高,这样可加强氧化物反应,从而强化键合制程。但是,如上所述,这些制程均有其各自的缺点。
图2是根据本发明用于活化基底42表面的离子植入机10的实施例。此离子植入机可能已经并入(例如)硅覆绝缘层或三维堆迭晶片晶圆制造所使用的半导体制造过程的各别部分。离子植入机10包括离子束源室11,此离子束源室11也可具有一气体箱(gas box),而此气体箱是用来容纳将要游离的想要的气体。离子束源室11可以是间接热阴极(indirectly heated cathode,IHC)、微波离子源或射频离子源。一旦气体被供应到离子束源室,离子就会从离子束源室中被提取出来以形成离子束12。离子是利用标准三电极组态来提取,此标准三电极组态包括电浆或电弧缝电极(plasma or arc slitelectrode)、消弧电极(suppression electrode)14以及位于消弧电极14下游的接地电极15。这些电极是用来产生想要的电场,以聚焦从离子束源室11中提取出来的离子束12。这些电极所产生的电场强度可被调谐为想要的射束电流,以提取特定类型的离子束12。离子束12传播到质量分析器16,此质量分析器16包括分解磁铁(resolving magnet)13以及具有分解孔径(resolvingaperture)18的遮罩电极(masking electrode)17。分解磁铁13使离子束12中的离子发生偏转,使得想要的离子物种的离子穿过分解孔径18。不想要的离子物种则不会穿过分解孔径18,而是被遮罩电极17遮挡住。在一个实施例中,分解磁铁13使想要的物种的离子偏转大约90°。
想要的物种的离子穿过分解孔径18,到达角度修正磁铁(angle correctormagnet)23。有些实施例中,想要的物种的离子也要穿过一减速段(decelerationstage)(未图示)。角度修正磁铁23使想要的离子物种的离子发生偏转,且将离子束从发散的(diverging)离子束转变成带状束24,而此带状束24具有实质上平行的离子轨迹(ion trajectoryies)。在一个实施例中,角度修正磁铁23使想要的离子物种的离子偏转大约70°。有些实施例中,离子束12可穿过一加速塔(acceleration column)。此加速塔可选择性地控制离子束12的能量,且协助离子束12以想要的方式聚集并渗入到基底或晶圆26中。带状束24也可穿过一加速塔,此加速塔可配置在质量分析器16与角度修正磁铁23之间,也可配置在角度修正磁铁23后面。终端台(end station)25包括卡盘32,此卡盘32用来支撑着晶圆或其他工件26,目的是进行原位(in situ)离子植入。此终端台25对准带状束24的路径,使得想要的物种的离子能够植入晶圆26。终端台25也可包括一扫描仪(scanner),用来垂直于带状束24剖面的长维度来移动晶圆26,或者执行另外的一维扫描(one-dimensional scans),从而使离子分布在晶圆26的整个表面上。卡盘32也可配置成能够旋转,且提供正交扫描修正。
离子植入机10通过(例如)硅(silicon)、氧(oxygen)、锗(germanium)、氙(xenon)、氦(helium)、氖(neon)、氩(argon)、氪(krypton)、二氧化碳(carbon dioxide)、氮(nitrogen)、其他的化学活性物种或惰性物种、其他单体离子(monomer ion)、其他游离分子或原子团簇(cluster)的植入来活化基底的键合表面。这些植入可在足够低的能量(0.2至5keV,这取决于物种)与足够高的剂量(dose)(3E15至1E17)下执行以活化每个晶圆的薄表面层。使用低植入能量来进行表面活化可确保薄表面层下面的晶圆材料免受离子植入的影响。相对于离子束来斜置(tilting)晶圆可进一步控制受到离子植入表面活化的影响的表面层深度。斜置晶圆会影响穿隧效应(channeling),防止植入的离子植入晶圆太深。斜置晶圆也可增加进入晶圆表面的单位深度(per unit depth)内发生交互作用的数量。斜置晶圆也可造成晶圆表面附近的想要的区域中发生更多碰撞。因此,在离子植入过程中斜置晶圆可将操作控制在离子束植入的较佳能量范围内。在不同于室温的温度下执行离子植入也可改良晶圆26的表面活化。例如,在-50℃至200℃的温度下加热晶圆26使表面物种(诸如,图1中的化合物41)挥发(volatize)。
图3为根据本发明的图1所示的晶格结构在使用离子植入机10进行活化之后的示意图。离子束24植入或对准基底26的表面,这样会使化合物41脱离基底表面,使得原子40可与其他材料或基底键合。基底26的表面是“活性的”,这样可强化键合制程。此活化制程产生悬键(dangling bonds),以准备与另一基底键合。悬键本质上是被破坏的共价键,在此情形下,经查找,硅晶圆表面上的每个表面晶格原子40有两个悬键。虽然图3所示的是基底26的一个表面被活化,但是离子植入可在每个要键合的基底的多个表面上执行。用来活化基底26表面的离子束24可以是带状束,但是也可以是点状离子束或其他离子束形态。此外,用电浆掺杂设备中的电浆来产生的离子也可用来活化要键合的基底。
表面活化可与用来定义后键合分裂制程(post-bond splitting process)的植入步骤相链结。后键合分裂制程可在(例如)硅覆绝缘层制造中使用。详细地说,在晶圆上形成氧化物膜,且将氢与/或氦植入要键合的晶圆之一的上表面,就能在晶圆内形成微气泡层(fine bubble layer)。执行了离子植入的硅晶圆被迭置(superposed)在另一硅晶圆上,使得执行了离子植入的表面能够透过氧化物膜来紧密接触另一硅晶圆。此晶圆经加热处理以利用微气泡层作为分层平面(delaminating plane)来将晶圆之一的一部分分层,从而形成薄膜硅层。可选择的是,在进行氢植入和/或氦植入以形成气泡层之前,可先进行离子表面活化。根据本实施例,执行表面活化的表面上可形成氧化物层,也可不形成氧化物层。可选择的是,分裂的晶圆可再利用以形成其他硅覆绝缘层晶圆。在其他实施例中,键合是在退火步骤或其他热步骤之后执行。如此一来,在准备表面活化(例如,与氢分裂植入或其他物种分裂植入相链结的植入)的同时,离子植入机在降低的温度下可提供增大的键合强度与晶圆键合的好处。此外,物种分裂植入与表面活化植入是在同一个离子植入机中执行。后键合分裂可应用于(例如)三维堆迭晶片、集成电路或其他多层晶片技术。后键合分裂可应用于任何基于层传递的制程(例如,薄膜的制造)。此薄膜制造可在昂贵的材料(例如,氮化镓(GaN))上执行,然后此材料被粘结在廉价的处理晶圆(handle wafer)上。后键合分裂也可用来设计制造诸如砷化镓覆硅(GaAs on Si)或锗覆硅(Ge on Si)之类的新型半导体基底。
图4至图7为示范性的制程室与两个要键合的晶圆,以通过离子植入机10利用离子活化来形成硅覆绝缘层晶圆。图4至图7中所示的制程室可取代使用离子束24的终端台25,或者成为终端台25之外的附加构件。利用离子活化,离子植入机10的制程室可提供改良的性能来键合已在真空中进行了活化的两个基底表面。此步骤不需要将基底暴露在大气中和/或将晶圆运送到另一个制程设备来执行键合步骤。因此,使用离子植入机来进行预键合(pre-bonding)表面活化,可不需要专用于电浆活化和/或湿化学品暴露的额外制程设备,从而使生产制程流线化(streamlining),且降低有关的制造成本。
图4是根据本发明的制程室50的第一实施例的图式,此制程室50包括一个或多个开口(opening),这些开口经配置以接收离子束24。制程室50包括:卡盘51,经配置以固持着基底52;以及卡盘53,经配置以固持着基底54。基底52可以是(例如)硅覆绝缘层制造中所使用的支撑工件,而基底54可经配置以用于粘结(cleaving)或经受上述的后键合分裂制程。因此,执行粘结或后键合分裂的植入(例如,氢或氦)已在本实施例中执行完。卡盘51与卡盘53是以可移动方式配置在制程室50内。特别地,卡盘51与53的至少其中之一或其两者可移置到离子束24的路径中。基底52与54的至少其中之一通过离子植入来进行活化,在想要的温度下相互对准(aligned)并相互接触。制程室50也经配置以控制基底52与基底54的温度,使它们的温度可高达500℃。可选择的是,卡盘51与53(而不是制程室50)也可用来控制温度,使温度可高达500℃。
图5是图4所示的制程室50的另一图式,在图5中,基底52与54绘示为在想要的温度下相互接触且持续规定的时间间隔。卡盘53松开基底54,结合在一起的基底52与基底54作为一个单元从制程室50中移出。可选择的是,当基底52与基底54在想要的温度下相互接触持续规定的时间间隔之后,温度可升高,以启动分裂。卡盘51扣住有新粘结的层在上面的支撑晶圆,而卡盘53则扣住剩余的后分裂层。在另一实施例中,制程室50中只包含卡盘51或53之一,一晶圆处理机械手(wafer handling robot)固持着用来与其他基底键合的第二基底。可选择的是,制程室50可包括一个或多个卡盘与多个晶圆处理机械手,以操控与促成两个基底52与54之间的键合。
图6与图7为制程室50的另一实施例,此实施例中使用独立的制程室55来进行基底键合,而制程室50则是用来进行离子束24的离子植入。键合室55是经由一真空连杆(vacuum link)来连接到制程室50。如图7所示,卡盘51与卡盘53经配置以在制程室50与键合室55之间移动。详细地说,在制程室50中对基底52与53执行一个或多个离子植入步骤,且卡盘51与53分别将基底52与54转移到独立的键合室55中,其间要维持真空环境。然后,基底52与基底54将在键合室55内在想要的温度下相互接触且持续规定的时间间隔。卡盘53松开基底54,被卡盘51支撑着的结合在一起的基底52与基底54作为一个单元从键合室55中移出。如果制程步骤要求相结合的基底分裂开,则可升高键合室55内的温度,以启动此分裂制程。然后,卡盘53从卡盘51附近移开,且卡盘51支撑着有新粘结的层在上面的晶圆,而卡盘53则支撑着剩余的后分裂层。制程室55也经配置以控制基底52与基底54的温度,使温度可高达500℃。可选择的是,卡盘51与53(而不是制程室55)也可用来控制温度,使温度可高达500℃。在另一实施例中,表面活化也允许在制程室50之外的另一制程室中执行键合。在另一实施例中,制程室50中仅包含一个卡盘,且使用一晶圆处理机械手来固持着用来键合的第二基底。键合室55也可包括两个晶圆处理机械手,这两个晶圆处理机械手经配置以将基底52与54从制程室50转移到键合室55。可选择的是,制程室50也可包括一个或多个卡盘以及至少一个晶圆处理机械手,用来将基底52与54从制程室50转移到键合室55。
图8是根据本发明一实施例,图2所示的离子植入机的活化制程的流程图。本领域技术人员将注意的是,此方法可根据要键合的基底以及各种制程条件来进行修正,以适合于各种应用。基底52与54被放置在离子植入机键合室50中(步骤S1)。掺质气体被供应到离子源室11,以产生适合进行预键合基底表面活化的物种离子(步骤S2)。基底52和/或基底54被分别定位在卡盘51与53上,且这两个基底的至少其中之一的表面暴露在所产生的离子束形态的物种离子中(步骤S3)。在步骤S4中,两个基底52与54在想要的温度下相互对准,在步骤S5中,两个基底52与54键合在一起。相结合的基底从制程室50中移出(步骤S6)。可选择的是,键合在一起的基底仍然留在制程室50中,且制程室50的温度升高以启动后键合分裂(步骤S7)。然后,后键合分裂层与粘结层分离(步骤S8),且基底从制程室中移出。
虽然本发明以较佳实施例揭示如上,但其并非用以限定本发明,本领域技术人员,在不脱离本发明的精神和范围内,可以作任意更改或等同替换,因此本发明的保护范围应当以本申请权利要求书所界定的范围为准。

Claims (18)

1.一种将至少两个基底原位键合在一起的方法,包括:
将所述基底放置在离子靶室中;
将至少两个所述基底中的第一基底的至少一个表面暴露在离子束中,以减少至少一个所述表面上的表面物种,准备与至少两个所述基底中的第二基底键合;
在所述离子靶室内在想要的温度下对准所述第一基底与所述第二基底;以及
将所述第一基底的所述暴露表面与所述第二基底的一表面并在一起且使之相互接触,以形成键合的基底。
2.根据权利要求1所述的将至少两个基底原位键合在一起的方法,还包括将键合的所述基底从所述离子靶室中移出。
3.根据权利要求1所述的将至少两个基底原位键合在一起的方法,还包括升高所述离子靶室的温度,以启动键合的所述基底的后键合分裂层。
4.根据权利要求3所述的将至少两个基底原位键合在一起的方法,还包括用键合的所述基底来形成粘结层。
5.根据权利要求4所述的将至少两个基底原位键合在一起的方法,还包括将所述后键合分裂层与所述粘结层分离。
6.根据权利要求1所述的将至少两个基底原位键合在一起的方法,其中所述第一基底是具有二氧化硅层的硅晶圆。
7.根据权利要求1所述的将至少两个基底原位键合在一起的方法,还包括将所述第二基底的至少一个表面暴露在离子束中,以减少至少一个所述表面上的表面物种,准备与所述第一基底键合。
8.根据权利要求1所述的将至少两个基底原位键合在一起的方法,其中所述第一基底的至少一个所述表面暴露在植入能量介于0.2keV与5keV之间的所述离子束中。
9.根据权利要求1所述的将至少两个基底原位键合在一起的方法,还包括当所述第一基底暴露在所述离子束中时,所述第一基底相对于所述离子束倾斜一角度。
10.一种将至少两个基底键合在一起的方法,包括:
将所述基底放置在第一室中;
将至少两个所述基底中的第一基底的至少一个表面暴露在离子束中,以减少至少一个所述表面上的表面物种,准备与至少两个所述基底中的第二基底键合;
在所述第一室内在想要的温度下对准所述第一基底与所述第二基底;
将所述第一基底与所述第二基底从所述第一室转移到第二室,所述第一室与所述第二室之间保持真空环境;以及
在所述第二室内将所述第一基底的所述暴露表面与所述第二基底的一表面并在一起且使之相互接触,以形成键合的基底。
11.根据权利要求10所述的将至少两个基底键合在一起的方法,还包括升高所述第二室的温度,以启动键合的所述基底的后键合分裂层。
12.根据权利要求11所述的将至少两个基底键合在一起的方法,还包括用键合的所述基底来形成粘结层。
13.根据权利要求12所述的将至少两个基底键合在一起的方法,还包括将所述后键合分裂层与所述粘结层分离。
14.根据权利要求10所述的将至少两个基底键合在一起的方法,还包括当所述第一基底暴露在所述离子束中时,所述第一基底相对于所述离子束倾斜一角度。
15.一种离子植入机处理系统,包括:
离子源室,经配置以接收原料气,且产生具有特定能量与质量的离子,所述离子源室具有一孔径,所述离子通过所述孔径而被提取出来;
靶室,配置在所述离子源的下游,经配置以接收所述离子束;
第一卡盘组件,配置在所述靶室内,所述第一卡盘组件经配置以承接着对准所述离子束的第一基底;以及
第二卡盘组件,配置在所述靶室内,所述第二卡盘组件经配置以承接着第二基底,
所述离子束具有特定的植入能量,使得离子能够活化所述第一基底的表面层。
16.根据权利要求15所述的离子植入机处理系统,其中所述靶室是第一室,所述离子植入机处理系统还包括连接到所述第一室的第二室,所述第一室与所述第二室之间保持真空环境。
17.根据权利要求15所述的离子植入机处理系统,其中所述第一卡盘与所述第二卡盘经配置以使得所述第一基底与所述第二基底相互接触。
18.根据权利要求16所述的离子植入机处理系统,其中所述第一卡盘与所述第二卡盘经配置以在所述第一室与所述第二室之间移动,且还经配置以使得所述第一基底与所述第二基底在所述第二室内相互接触。
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