CN101656193A - Technique for processing silicon chip - Google Patents
Technique for processing silicon chip Download PDFInfo
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- CN101656193A CN101656193A CN200810118667A CN200810118667A CN101656193A CN 101656193 A CN101656193 A CN 101656193A CN 200810118667 A CN200810118667 A CN 200810118667A CN 200810118667 A CN200810118667 A CN 200810118667A CN 101656193 A CN101656193 A CN 101656193A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 89
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 87
- 239000010703 silicon Substances 0.000 title claims abstract description 87
- 238000000034 method Methods 0.000 title claims abstract description 32
- 238000000227 grinding Methods 0.000 claims abstract description 49
- 230000007797 corrosion Effects 0.000 claims abstract description 36
- 238000005260 corrosion Methods 0.000 claims abstract description 36
- 238000005498 polishing Methods 0.000 claims abstract description 29
- 239000002253 acid Substances 0.000 claims abstract description 22
- 239000000243 solution Substances 0.000 claims abstract description 8
- 238000004140 cleaning Methods 0.000 claims abstract description 7
- 239000011259 mixed solution Substances 0.000 claims abstract description 6
- 238000005516 engineering process Methods 0.000 claims description 17
- 229910001651 emery Inorganic materials 0.000 claims description 3
- 238000001035 drying Methods 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 239000003518 caustics Substances 0.000 description 9
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 8
- 238000003754 machining Methods 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 239000007800 oxidant agent Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000007517 polishing process Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- QTBSBXVTEAMEQO-UHFFFAOYSA-M Acetate Chemical compound CC([O-])=O QTBSBXVTEAMEQO-UHFFFAOYSA-M 0.000 description 1
- 241000226585 Antennaria plantaginifolia Species 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 238000005282 brightening Methods 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 125000000896 monocarboxylic acid group Chemical group 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 238000004441 surface measurement Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Abstract
The invention discloses a technique for processing a silicon chip, which comprises the following steps: (1) performing double-sided grinding on the chamfered silicon chip by a double-sided grinding machine; (2) removing micro-convex parts on the silicon surface with mixed solution combined by HF solution and either H2O2 or O3; (3) performing conventional acid corrosion on the silicon chip; and (4)performing conventional double-sided polishing on the silicon chip after the acid corrosion, and performing single-sided fine polishing and cleaning on the silicon chip. The technique for processingthe silicon chip has the advantages of capability of obtaining the silicon chip with high flatness and capability of reducing the removal amount in the whole manufacturing process about 20 microns which is equivalent to the removal amount in single-sided polishing.
Description
Technical field
The present invention relates to a kind of silicon chip processing worker who removes mechanical damage and reduce silicon chip processing removal amount.
Background technology
Semi-conductor silicon chip is the main backing material of modern very lagre scale integrated circuit (VLSIC), generally the integrated circuit level semiconductor silicon chip that forms by technical process manufacturings such as crystal pulling, section, chamfering, abrasive disc (comprising grinding and grinding), burn into polishing, cleanings.Wherein the abrasive disc technology after the chamfering can make silicon chip obtain the shape of degree of precision, and the precision of its processing directly has influence on the geometric parameter of product.
Tradition silicon chip two-sided lapping technology (lapping) has been difficult to bigger lifting to the ability of 300mm silicon chip surface machining accuracy.The local evenness of grinding back silicon chip etc. is difficult to reach technological requirement, and because silicon chip affected layer after two-sided lapping is thicker, need remove the surface damage of silicon chip through the corrosion of excessive removal amount, has increased production cost and environmental problem.Advantages such as grinding technique (grinding) is processed back silicon chip surface parameters precision height owing to the working (machining) efficiency height, and cost is low, and the surface damage of generation is little replace traditional two-sided lapping at present and are used widely in the silicon polished preparation technology of 300mm.
According to the different application scope, the silicon chip grinding of 300mm has dual mode, and a kind of is the single face grinding, promptly grinding is carried out on a surface of silicon chip earlier, another side is processed afterwards again; Second kind of processing mode is double-side grinding.Promptly grinding is carried out on two surfaces of silicon chip simultaneously.In the double-side grinding course of processing to silicon chip, silicon chip places plumbness, silicon chip both sides emery wheel tooth is the level of state, and silicon chip places level during vertical processing, silicon chip both sides emery wheel tooth in vertical state, its advantage is that silicon chip is in plumbness in the course of processing, can avoid the deformation that causes because of deadweight effectively, the easier control silicon chip of the processing mode two sides that the while silicon chip is in plumbness is in essentially identical grinding process condition, makes the two sides obtain essentially identical grinding skin pattern.This machining accuracy influence to 300mm and larger diameter size silicon chip surface is extremely important.But silicon chip is through behind the double-side grinding, although silicon chip obtains higher processing precision, but stay significantly on the surface, mill seal clocklike, this mill seal can have influence on the nanotopography characteristic on silicon polished surface, and is difficult to be removed in next step polishing process.
In order to eliminate damage and the stress behind the abrasive disc (grinding or grinding), behind abrasive disc, the surface is corroded usually.Etching process generally has two kinds of caustic corrosion and acid corrosions, and caustic corrosion technology is slow because of its corrosion rate, though can guarantee that silicon chip surface is smooth, caustic corrosion is an anisotropic etch, and surface ratio is more coarse and easily adsorb impurity.The corrosion rate of acid corrosion is very fast, and silicon chip surface is light relatively, and the surface is difficult for absorption impurity, but the geometric parameter of silicon chip is very responsive to temperature in the acid corrosion process, controls bad surface and easily is pincushion, and promptly the surface is the thin thick middle in both sides.The used chemical reagent purity requirement of acid corrosion is than higher, and expense is more expensive, so cost is than caustic corrosion height.Therefore caustic corrosion technology is generally all adopted in large-diameter silicon wafer corrosion at present.
Because strong anisotropy is arranged during caustic corrosion, the mill that produces behind double-side grinding seal is difficult in the caustic corrosion and is eliminated, and this can increase etching extent.Simultaneously, because surface ratio is more coarse in caustic corrosion, this also can increase the polishing removal amount of following one twin polishing operation, thereby reduces the silicon chip output of every kilogram of monocrystalline.At present, in order to address this problem, and guarantee that final polished surface has specific nanotopography, method commonly used is at double-side grinding or after grinding, the surface is carried out again the double-side grinding technology of " weak property ", promptly finish grind, technology path such as Fig. 1, the main purpose that adds the single face grinding is in order to remove the mill seal that double-side grinding brings.This moment, used grinding process and traditional double-side grinding technology were different, the positive pressure of its processing is smaller, used frosted also can be thinner, and grinding removal amount also littler (greatly about about 10 microns) is printed with this this mill of eliminating on the silicon chip surface simultaneously.Therefore,, can after two-sided corase grind, add a step correct grinding, still, add the cost that correct grinding can further improve product in order to solve the mill seal that double-side grinding produces.
Summary of the invention
The purpose of this invention is to provide a kind of technique for processing silicon chip, adopt this technology can obtain the silicon chip of high-flatness, the while can be reduced the removal amount of whole manufacturing process.
In order to realize above-mentioned purpose, the present invention adopts following technical scheme: this technique for processing silicon chip comprises the steps:
(1) silicon chip after the chamfering is carried out double-side grinding with the double-side grinding machine;
(2) with HF solution be selected from H
2O
2, O
3In a kind of composition mixed solution, remove the microscopic protrusions part of silicon face;
(3) silicon chip is carried out the conventional acid corrosion;
(4) the acid corrosion sheet is carried out conventional twin polishing;
(5) silicon chip is carried out smart throwing of single face and cleaning.
In processing step of the present invention (1), the silicon chip double-side grinding after the chamfering is adopted the processing mode that grinding is carried out on two surfaces of silicon chip simultaneously.Double-side grinding helps guaranteeing the geometric parameter of silicon chip, makes the silicon chip surface after the processing that higher precision be arranged;
In a word, in processing step of the present invention (1),, obtain the silicon chip surface of high-flatness, help next step processing by double-side grinding technology.
In a kind of technique for processing silicon chip, be to adopt KOYO DSG double-side grinding machine to carry out grinding.
In processing step of the present invention (2), adopt HF solution and be selected from H
2O
2, O
3A kind of composition mixed solution in the oxidant carries out rinsing to silicon chip, and the rinsing time is wanted 0＜t＜60 minute.Step (3) is preceding can clean silicon chip with ultrasonic wave or a cleaning fluid carrying out;
In processing step of the present invention (3), the composition of the acid corrosion liquid that uses is nitric acid HNO
3, hydrofluoric acid HF and phosphoric acid H
3PO
4The mixed acid of forming, or nitric acid HNO
3, hydrofluoric acid HF and acetate CH
3The mixed acid that COOH forms
Can wash processing with deionized water after intact.
In processing step of the present invention (4), the twin polishing method of use comprises all silicon chip twin polishing methods, and for example every dish is thrown five or 15 silicon chips.
In processing step of the present invention (6), edge polishing can be gone into before twin polishing or afterwards.Edge polishing is placed on before the twin polishing, can guarantee that the surface after the twin polishing can not be subjected to the corrosion that liquid is thrown on the limit, can be but throw good edge by pleasure boat sheet edge damage in the twin polishing process, therefore, edge polishing technology can be placed on after the twin polishing.
The present invention can reduce the removal amount of silicon single crystal by the manufacture method after improving, and removes the mill seal on surface, thereby can produce the large-diameter silicon wafer of high-flatness.The AFS3220 that the surface measurements geometric parameter uses ADE Co. to produce.
The present invention is with HF and be selected from H
2O
2, O3 a kind of in other oxidant form the microscopic protrusions part that mixed solution is removed the surface, make on the silicon chip surface every acid corrosion speed more even, the acid corrosion isotropism, surface-brightening after the corrosion, mechanical damage is removed easily, more helps polishing, thereby polishing time is reduced significantly, reduce the silicon single crystal removal amount simultaneously, improved the productive rate of unit monocrystalline.Because stock removal and etching extent reduce, thus strong assurance the machining accuracy of product.
Advantage of the present invention is: the silicon chip that can obtain high-flatness, can reduce simultaneously the removal amount of whole manufacturing process, reduce about 20 microns removal amounts and (be equivalent to reduce the removal of single-sided polishing, the present invention processes at large-diameter silicon wafer, and the surperficial mill seal of particularly removing after the grinding is very practical.The present invention can be used in any large-diameter silicon wafer processing technology of coml.
Description of drawings
The process chart that the existing solution mill seal of Fig. 1 is adopted
Fig. 2 process chart used in the present invention.
Fig. 3 to the direct acid corrosion of double-side grinding sheet after the total thickness variations of silicon chip.
Fig. 4 carries out total thickness variations after the twin polishing through 15 of acid corrosion
Among Fig. 3,4, abscissa is a silicon chip, and ordinate is a total thickness variations.
Embodiment
Embodiment 1
The P (100) that uses Czochralski method to produce, resistivity is 15 of 12 inches double-side grinding sheets of 1-3 Ω cm, uses the HF groove to add H on conventional cleaning machine
2O
2Or hydrofluoric acid adds the mixed liquor of O3, and hydrofluoric acid concentration is 49% usually, H
2O
2Concentration is that 30% (their amount ratio is 1: 0.5) carried out rinsing to silicon chip, removes the microscopic protrusions part on surface, corrodes on the acid corrosion machine then, and the erosion removal amount is 15 microns.With the AFS3220 geometric parameter tester silicon chip geometric parameter is measured before and after handling, so that the GBIR that obtains before and after the acid corrosion changes.GBIR (gross thickness) before and after the corrosion changes all less than 0.9 micron, and every GBIR changes as shown in Figure 3.The variation of GBIR is less as can be seen from the figure, this shown with HF the processing method of H2O2+ acid corrosion can satisfy the required precision that large-diameter silicon wafer is made.
Get above 15 silicon chips through acid corrosion, use method of the present invention to carry out twin polishing on the Speedfam20B polishing machine, the polishing removal amount is 15 microns.Clean with cleaning machine then, carry out drying with drier, the GBIR after the polishing sees Fig. 4.As can be seen, through behind the present invention, total removal amount has only 30 microns after the grinding from the figure, but precision is higher.
Embodiment 3
Getting 15 of above double-side grinding sheets processes with present existing technology.In order to remove the mill seal on surface, carry out fine grinding with the single face milling drum, remove 10 microns (totally 20 microns) for every.With caustic corrosion abrasive sheet is corroded then, remove the damage on surface, removal amount is 15 microns.Carry out twin polishing at last, removal amount is 15 microns.After the present processing technology of process was processed, removal amount was 50 microns.
Claims (9)
1. technique for processing silicon chip, it comprises the steps:
(1) silicon chip after the chamfering is carried out double-side grinding with the double-side grinding machine;
(2) with HF solution be selected from H
2O
2, O
3In a kind ofly form the microscopic protrusions part that mixed solution is removed silicon face;
(3) silicon chip is carried out the conventional acid corrosion;
(4) the acid corrosion sheet is carried out conventional twin polishing;
(5) silicon chip is carried out smart throwing of single face and cleaning.
2, a kind of technique for processing silicon chip according to claim 1 is characterized in that: the silicon chip double-side grinding after the chamfering is adopted the processing mode that grinding is carried out on two surfaces of silicon chip simultaneously.
3, according to claims 2 described a kind of technique for processing silicon chip, it is characterized in that: it is 2000～8000 that abrasive grinding wheel uses the order number of emery wheel, and removal amount is 20～100 microns.
4, according to claims 1 or 2 described technique for processing silicon chip, it is characterized in that: described with HF solution be selected from H
2O
2, O
3A kind of microscopic protrusions part that mixed solution is removed silicon face, wherein HF solution and H of forming
2O
2The consumption volume ratio be 1: 0.01～1: 1, or HF/O
3The content of O3 is 0.1mg/L～1g/L in the solution.
5, according to claims 4 described a kind of technique for processing silicon chip, it is characterized in that: temperature is 15～60 ℃, and the rinsing time is wanted 0＜t＜60 minute.
6, according to claims 1 or 4 or 5 described a kind of technique for processing silicon chip, it is characterized in that: acid corrosion removal amount single face is that 0＜d＜15 micron total amount is 0＜D＜30 micron.
7, according to claims 1 described a kind of technique for processing silicon chip, it is characterized in that: add edge polishing technology before twin polishing or after the polishing.
8, according to the technology of claims 1 described a kind of silicon chip processing, it is characterized in that: after described step (3) or (4) step matting is arranged.
9, according to claims 8 described a kind of technique for processing silicon chip, it is characterized in that: after the described matting drying process is arranged.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200810118667 CN101656193B (en) | 2008-08-21 | 2008-08-21 | Technique for processing silicon chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200810118667 CN101656193B (en) | 2008-08-21 | 2008-08-21 | Technique for processing silicon chip |
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| Publication Number | Publication Date |
|---|---|
| CN101656193A true CN101656193A (en) | 2010-02-24 |
| CN101656193B CN101656193B (en) | 2011-09-28 |
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ID=41710416
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|---|---|---|---|
| CN 200810118667 Active CN101656193B (en) | 2008-08-21 | 2008-08-21 | Technique for processing silicon chip |
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|---|---|---|---|---|
| CN102423872A (en) * | 2011-12-07 | 2012-04-25 | 深圳深爱半导体股份有限公司 | Method for polishing silicon chip |
| CN102528597A (en) * | 2010-12-08 | 2012-07-04 | 有研半导体材料股份有限公司 | Manufacturing process of large-diameter silicon wafer |
| CN103123865A (en) * | 2013-02-26 | 2013-05-29 | 宁波韵升股份有限公司 | Magnetic product processing method and automatic sorting device |
| CN103144024A (en) * | 2011-12-06 | 2013-06-12 | 有研半导体材料股份有限公司 | Process for manufacturing 300mm silicon polished wafer by using high-temperature heat treatment |
| CN103567857A (en) * | 2013-11-04 | 2014-02-12 | 上海申和热磁电子有限公司 | Double-sided polishing process for silicon wafer |
| CN107993936A (en) * | 2017-11-30 | 2018-05-04 | 北京创昱科技有限公司 | Substrate processing method |
| CN108054111A (en) * | 2017-12-19 | 2018-05-18 | 大连鑫鑫创世科技发展有限公司 | A kind of dividing method of integrated circuit silicon chip |
| CN108400081A (en) * | 2017-02-08 | 2018-08-14 | 上海新昇半导体科技有限公司 | The production method of silicon chip |
| CN110010458A (en) * | 2019-04-01 | 2019-07-12 | 徐州鑫晶半导体科技有限公司 | Control the method and semiconductor wafer of semiconductor crystal wafer surface topography |
| CN110277307A (en) * | 2019-05-28 | 2019-09-24 | 天津中环领先材料技术有限公司 | A kind of process preparing single side high brightness sour piece |
| CN110526201A (en) * | 2018-05-25 | 2019-12-03 | 浙江清华柔性电子技术研究院 | The preparation method of flexible silicon wafer |
| CN110526202A (en) * | 2018-05-25 | 2019-12-03 | 浙江清华柔性电子技术研究院 | The preparation method of flexible silicon wafer |
| CN111295740A (en) * | 2017-12-25 | 2020-06-16 | 胜高股份有限公司 | Double-side grinding method for wafer |
| CN111341884A (en) * | 2020-03-20 | 2020-06-26 | 浙江晶科能源有限公司 | Silicon chip and preparation method of inverted pyramid structure on surface of silicon chip |
| CN112059736A (en) * | 2020-09-08 | 2020-12-11 | 有研半导体材料有限公司 | Silicon wafer manufacturing process |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5837662A (en) * | 1997-12-12 | 1998-11-17 | Memc Electronic Materials, Inc. | Post-lapping cleaning process for silicon wafers |
| CN1753154A (en) * | 2004-09-23 | 2006-03-29 | 北京有色金属研究总院 | Method of removing chip oxide film edge and its device |
-
2008
- 2008-08-21 CN CN 200810118667 patent/CN101656193B/en active Active
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| CN102528597B (en) * | 2010-12-08 | 2015-06-24 | 有研新材料股份有限公司 | Manufacturing process of large-diameter silicon wafer |
| CN103144024A (en) * | 2011-12-06 | 2013-06-12 | 有研半导体材料股份有限公司 | Process for manufacturing 300mm silicon polished wafer by using high-temperature heat treatment |
| CN102423872A (en) * | 2011-12-07 | 2012-04-25 | 深圳深爱半导体股份有限公司 | Method for polishing silicon chip |
| CN103123865A (en) * | 2013-02-26 | 2013-05-29 | 宁波韵升股份有限公司 | Magnetic product processing method and automatic sorting device |
| CN103123865B (en) * | 2013-02-26 | 2015-05-27 | 宁波韵升股份有限公司 | Magnetic product processing method and automatic sorting device |
| CN103567857A (en) * | 2013-11-04 | 2014-02-12 | 上海申和热磁电子有限公司 | Double-sided polishing process for silicon wafer |
| CN108400081A (en) * | 2017-02-08 | 2018-08-14 | 上海新昇半导体科技有限公司 | The production method of silicon chip |
| CN107993936A (en) * | 2017-11-30 | 2018-05-04 | 北京创昱科技有限公司 | Substrate processing method |
| CN108054111A (en) * | 2017-12-19 | 2018-05-18 | 大连鑫鑫创世科技发展有限公司 | A kind of dividing method of integrated circuit silicon chip |
| CN111295740B (en) * | 2017-12-25 | 2023-04-18 | 胜高股份有限公司 | Double-side grinding method for wafer |
| CN111295740A (en) * | 2017-12-25 | 2020-06-16 | 胜高股份有限公司 | Double-side grinding method for wafer |
| CN110526202B (en) * | 2018-05-25 | 2022-11-01 | 浙江清华柔性电子技术研究院 | Preparation method of flexible silicon wafer |
| CN110526201A (en) * | 2018-05-25 | 2019-12-03 | 浙江清华柔性电子技术研究院 | The preparation method of flexible silicon wafer |
| CN110526202A (en) * | 2018-05-25 | 2019-12-03 | 浙江清华柔性电子技术研究院 | The preparation method of flexible silicon wafer |
| CN110526201B (en) * | 2018-05-25 | 2022-11-01 | 浙江清华柔性电子技术研究院 | Preparation method of flexible silicon wafer |
| CN110010458A (en) * | 2019-04-01 | 2019-07-12 | 徐州鑫晶半导体科技有限公司 | Control the method and semiconductor wafer of semiconductor crystal wafer surface topography |
| CN110010458B (en) * | 2019-04-01 | 2021-08-27 | 徐州鑫晶半导体科技有限公司 | Method for controlling surface morphology of semiconductor wafer and semiconductor wafer |
| CN110277307B (en) * | 2019-05-28 | 2022-02-11 | 天津中环领先材料技术有限公司 | Process method for preparing single-side high-brightness sour bean curd slices |
| CN110277307A (en) * | 2019-05-28 | 2019-09-24 | 天津中环领先材料技术有限公司 | A kind of process preparing single side high brightness sour piece |
| CN111341884A (en) * | 2020-03-20 | 2020-06-26 | 浙江晶科能源有限公司 | Silicon chip and preparation method of inverted pyramid structure on surface of silicon chip |
| CN112059736A (en) * | 2020-09-08 | 2020-12-11 | 有研半导体材料有限公司 | Silicon wafer manufacturing process |
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