CN108400081A - The production method of silicon chip - Google Patents

The production method of silicon chip Download PDF

Info

Publication number
CN108400081A
CN108400081A CN201710068794.9A CN201710068794A CN108400081A CN 108400081 A CN108400081 A CN 108400081A CN 201710068794 A CN201710068794 A CN 201710068794A CN 108400081 A CN108400081 A CN 108400081A
Authority
CN
China
Prior art keywords
silicon chip
face
production method
silicon
carried out
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710068794.9A
Other languages
Chinese (zh)
Inventor
赵厚莹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zing Semiconductor Corp
Original Assignee
Zing Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zing Semiconductor Corp filed Critical Zing Semiconductor Corp
Priority to CN201710068794.9A priority Critical patent/CN108400081A/en
Priority to TW106126976A priority patent/TWI668738B/en
Publication of CN108400081A publication Critical patent/CN108400081A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02024Mirror polishing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The present invention provides a kind of production methods of silicon chip comprising following steps:One silicon chip is provided;The first face and the second face to silicon chip are carried out at the same time grinding, and the first face and the second face of silicon chip are respectively formed by the pattern of edge to center progressive additive;The silicon chip is adsorbed in an Acetabula device, the second face of the silicon chip is contacted with the Acetabula device, is ground to the first face of the silicon chip;By the silicon wafer turnover and it is adsorbed in the Acetabula device, the first face of the silicon chip is contacted with the Acetabula device, is ground to the second face of the silicon chip, is formed the silicon chip of bowl structure;Planarization is carried out at the same time to the first face and the second face of silicon chip;The epitaxial growth epitaxial layer on the first face or the second face of silicon chip.The problem of present invention solves traditional handicraft in grown above silicon epitaxial layer, obtained silicon chip intermediate projections or recess, while the corrugated nanotopography generated when cutting silicon chip is eliminated, and have preferably part and overall flat degree compared with the prior art.

Description

The production method of silicon chip
Technical field
The present invention relates to semiconductor process technique fields, and in particular to a kind of production method of silicon chip.
Background technology
Growth technology is developed in the beginning of the sixties at the end of the fifties, and industry is widely used in grown above silicon epitaxial layer at present The mode of (i.e. new single-crystal layer).The new single-crystal layer of epitaxial growth can be in conduction type, resistivity etc. and silicon chip (i.e. monocrystalline silicon Substrate) it is different, also, can by growth technology grown above silicon different-thickness and different requirements multilayer monocrystalline, from And improve the performance of the flexibility and device of device design.
In grown above silicon epitaxial layer, since the lattice of epitaxial layer and silicon chip mismatches, lattice mismatch will produce.With normal For the epitaxial layer for growing boron doped high resistivity in the monocrystalline substrate of boron doped low-resistivity seen, due to lattice The length of covalent bond of mismatch and boron atom is shorter than the length of covalent bond of silicon atom, silicon chip can be caused to be formed gradual by edge to center The pattern of protrusion.Certainly, in the epitaxial layer of other doping of epitaxial growth on silicon chip or different resistivity, silicon chip is in some cases Also it will appear the pattern being gradually recessed by edge to center.If epitaxial wafer has protrusion or recess, may cannot be satisfied follow-up Requirement of the technique to silicon wafer thickness homogeneity.
The patent document of Publication No. US7781313B2 provides a kind of method making silicon chip, as depicted in figs. 1 and 2, It includes the following steps:
First, a silicon chip is provided;
Then, the silicon chip is adsorbed in an Acetabula device (not shown in figure 1), the second face B1 of the silicon chip with it is described Acetabula device contacts;
Then, the first face A1 of the silicon chip is ground and is planarized, the first face A1 is made to ultimately form by edge The recess pattern being gradually thinned to center thickness, as shown in Figure 1;
Then, by the silicon wafer turnover and it is adsorbed in the Acetabula device, the first face A1 and the sucker of the silicon chip Device contacts, since the first face of silicon chip centers A1 are relatively thin, when being adsorbed in the Acetabula device, due to the work of pull of vacuum With the edge of the silicon chip can be made to be contacted first with abrasive disk;
Then, the second face B1 of the silicon chip is ground and is planarized, due to the silicon chip edge first with grind Mill contacts, so will can gradually be ground by edge to center when grinding;
Finally, the pull of vacuum of the Acetabula device is removed, the silicon chip can form a bowl shaped structure, as shown in Figure 2.
For that can be formed in epitaxial process for the epitaxial layer of protrusion, suitable growth in bowl shaped structure silicon chip the On two face B1;For that can be formed for the epitaxial layer of recess in growth course, suitable growth in bowl shaped structure silicon chip first On the A1 of face, in this way, can be obtained the satisfactory silicon chip of homogeneity.
However there are following two problems for the above method:
1. corrugated nanotopography problem, during being cut into silicon chip using multi-wire saw method, cutting line can be in silicon Piece surface forms corrugated nanotopography, and when carrying out single side grinding using the above method, silicon chip can be adsorbed in an Acetabula device, by In elastic deformation this corrugated nanotopography meeting temporary extinction, after grinding is completed to remove pull of vacuum, this corrugated nanometer shape Looks will appear again.
2. the first face of pair silicon chip and the second face carry out single side flat one by one has flatness deficiency.
Invention content
Intermediate projections or recess pattern are formed to solve the silicon chip after outer layer growth, silicon chip homogeneity is caused not meet It is required that the problem of, and corrugated nanotopography is eliminated, the present invention provides a kind of production methods of silicon chip.
The present invention provides a kind of production methods of silicon chip comprising following steps:
One silicon chip is provided;
The first face and the second face to the silicon chip are carried out at the same time grinding, and the first face and the second face of the silicon chip are respectively formed By the pattern of edge to center progressive additive;
The silicon chip is adsorbed in an Acetabula device, the second face of the silicon chip is contacted with the Acetabula device, to described First face of silicon chip is ground;
By the silicon wafer turnover and it is adsorbed in the Acetabula device, the first face and the Acetabula device of the silicon chip connect It touches, the second face of the silicon chip is ground, the silicon chip of bowl structure is formed;
Planarization is carried out at the same time to the first face and the second face of the silicon chip;
The epitaxial growth epitaxial layer on the first face or the second face of the silicon chip.
Optionally, after being carried out at the same time planarization to the first face of the silicon chip and the second face, further include:
First face of the silicon chip is finally planarized, the epitaxial layer is epitaxially grown in the first face of the silicon chip On.
Optionally, the central concave in the first face of the silicon chip, the central protuberance in the second face of the silicon chip, the extension The pattern being gradually recessed by edge to center is formed when layer epitaxially grown.
Optionally, after being carried out at the same time planarization to the first face of the silicon chip and the second face, further include:
Second face of the silicon chip is finally planarized, the epitaxial layer is epitaxially grown in the second face of the silicon chip On.
Optionally, the central concave in the first face of the silicon chip, the central protuberance in the second face of the silicon chip, the extension It is formed when layer epitaxially grown by the pattern of the gradual protrusion in edge to center.
Optionally, in the step of being carried out at the same time grinding to the first face of the silicon chip and the second face, using abrasive wheel to institute It states silicon chip and carries out physical grinding.
Optionally, the diameter of the abrasive wheel is more than or equal to the radius of the silicon chip.
Optionally, in the step of being carried out at the same time planarization to the first face of the silicon chip and the second face, using chemical machinery Polishing process is carried out at the same time planarization to the first face of the silicon chip and the second face.
Optionally, further include a mill before or after being carried out at the same time grinding to the first face of the silicon chip and the second face Side technique.
Optionally, further include one wet before or after being carried out at the same time grinding to the first face of the silicon chip and the second face Method cleaning.
Optionally, further include a wet-etching technology after being ground to the second face of the silicon chip.
Optionally, further include that an edge is flat before being carried out at the same time planarization to the first face of the silicon chip and the second face Chemical industry skill.
Optionally, further include a wet clean process after the edge flatening process.
Optionally, further include that an edge is flat after being carried out at the same time planarization to the first face of the silicon chip and the second face Chemical industry skill.
Optionally, further include a wet clean process after the edge flatening process.
Optionally, further include a wet-cleaning after being carried out at the same time planarization to the first face of the silicon chip and the second face Technique.
Optionally, further include a wet clean process after the final planarization.
It is eliminated in cutting silicon chip using the production method of silicon chip provided by the invention due to using double-side grinding technique During form corrugated nanotopography, also, use two-sided flatening process, compared with the prior art in it is flat using single side Smooth chemical industry skill has preferably part and overall flat degree.
Description of the drawings
Fig. 1 is the schematic diagram of the silicon chip after being planarized in the prior art to the first face of silicon chip;
Fig. 2 is the schematic diagram of the silicon chip of finally obtained bowl shaped structure in the prior art;
Fig. 3 is the flow chart of the production method for the silicon chip that the embodiment of the present invention one provides;
Fig. 4 be the embodiment of the present invention one provide silicon chip production method in, double-side grinding technique use silicon chip with hold The schematic diagram of load plate, rotation motor and abrasive wheel;
Fig. 5 be the embodiment of the present invention one provide silicon chip production method in, before double-side grinding technique, silicon chip and abrasive wheel Schematic diagram;
Fig. 6 be the embodiment of the present invention one provide silicon chip production method in, after double-side grinding technique, silicon chip and abrasive wheel Schematic diagram;
Fig. 7 is in the production method for the silicon chip that the embodiment of the present invention one provides, and when the first face of grinding silicon chip, Acetabula device is also The signal of silicon chip and swingle, abrasive wheel fixing device, abrasive wheel and Acetabula device when not to silicon chip applying vacuum suction Figure;
Fig. 8 is in the production method for the silicon chip that the embodiment of the present invention one provides, when the first face of grinding silicon chip, Acetabula device pair Silicon chip after silicon chip applying vacuum suction and swingle, the schematic diagram of abrasive wheel fixing device, abrasive wheel and Acetabula device;
Fig. 9 is behind the first face of grinding silicon chip, to remove sucker dress in the production method for the silicon chip that the embodiment of the present invention one provides Silicon chip after the pull of vacuum set and swingle, the schematic diagram of abrasive wheel fixing device, abrasive wheel and Acetabula device;
Figure 10 is in the production method for the silicon chip that the embodiment of the present invention one provides, when the second face of grinding silicon chip, Acetabula device Silicon chip when also not to silicon chip applying vacuum suction shows with swingle, abrasive wheel fixing device, abrasive wheel and Acetabula device It is intended to;
Figure 11 is in the production method for the silicon chip that the embodiment of the present invention one provides, when the second face of grinding silicon chip, Acetabula device To the silicon chip and swingle, the schematic diagram of abrasive wheel fixing device, abrasive wheel and Acetabula device after silicon chip applying vacuum suction;
Figure 12 be the embodiment of the present invention one provide silicon chip production method in, behind the second face of grinding silicon chip, bowl structure Silicon chip and swingle, the schematic diagram of abrasive wheel fixing device, abrasive wheel and Acetabula device;
Figure 13 is the signal of the silicon chip after outer layer growth in the production method for the silicon chip that the embodiment of the present invention one provides Figure;
Figure 14 is the signal of the silicon chip after outer layer growth in the production method of silicon chip provided by Embodiment 2 of the present invention Figure;
The description of symbols of attached drawing 1- attached drawings 13 is as follows:
First face of A1, A2, A3- silicon chip;
Second face of B1, B2, B3- silicon chip;
Vertical range between d1- abrasive wheels and silicon chip edge;
Vertical range between d2- abrasive wheels and silicon chip center;
101- carriers;
102- rotation motors;
103,403- silicon chips;
104,105,203- abrasive wheels;
201- swingles;
202- abrasive wheel fixing devices;
204- Acetabula devices;
301,501- epitaxial layers.
Specific implementation mode
The production method of silicon chip proposed by the present invention is described in detail below in conjunction with the drawings and specific embodiments.According to following Illustrate and claims, advantages and features of the invention will become apparent from.It should be noted that attached drawing is all made of very simplified shape Formula and use non-accurate ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
<Embodiment one>
The embodiment of the present invention one provides a kind of production method of silicon chip, as shown in figure 3, it includes the following steps:
S1, a silicon chip is provided;
S2, grinding is carried out at the same time to the first face of the silicon chip and the second face, the first face and the second face of the silicon chip are equal Form the pattern by edge to center progressive additive;
S3, the silicon chip is adsorbed in an Acetabula device, the second face of the silicon chip is contacted with the Acetabula device, to institute The first face for stating silicon chip is ground;
S4, by the silicon wafer turnover and it is adsorbed in the Acetabula device, the first face and the Acetabula device of the silicon chip Contact, is ground the second face of the silicon chip, forms the silicon chip of bowl structure;
S5, planarization is carried out at the same time to the first face of the silicon chip and the second face;
S6, final flatening process processing is carried out to the second face of the silicon chip, the final flatening process is, for example, CMP process;
S7, the epitaxial growth epitaxial layer on the second face of the silicon chip.
Below according to Fig. 4-Figure 14, the production method of above-mentioned silicon chip is described in further details.
As shown in figure 4, it is silicon chip 103 in double-side grinding technique and carrier 101, rotation motor 102, abrasive wheel 104 And the schematic diagram of abrasive wheel 105.In step s 2,103 edge of the silicon chip is held on carrier 101, rotation motor 102 are connect with the carrier 101 by gear, and the rotation motor 102 can drive 101 rotation of carrier (i.e. described when rotating Carrier 101 is rotated around its axle center), to drive 103 rotation of the silicon chip, (it is also to surround to hold to be equivalent to silicon chip 103 The axle center of load plate is rotated).There are two abrasive wheels 104,105, the i.e. side of silicon chip 103 for the both sides setting of the silicon chip 103 It is provided with abrasive wheel 104, the other side is provided with abrasive wheel 105, and two abrasive wheels 104,105 are symmetrically distributed in the two of silicon chip 103 Side and high-speed rotation to the silicon chip 103 to carry out double-side grinding, and two abrasive wheels 104,105 are close to silicon chip surface when grinding.
As shown in figure 5, its schematic diagram for silicon chip 103 and abrasive wheel 104,105 in step S2 double-side grinding techniques.Such as figure Shown in 5, the abrasive wheel 104,105 has an angle of inclination, the abrasive wheel 105 and the silicon chip 103 relative to silicon chip 103 Vertical range d1 between edge is less than the vertical range d2 between 103 center of the abrasive wheel 105 and the silicon chip, described to grind Emery wheel 104 and 105 is symmetrically distributed in 103 both sides of silicon chip.Preferably, the diameter of the abrasive wheel 104,105 is all higher than or waits In the radius silicon chip of the silicon chip 103, when can ensure double-side grinding in this way, it is ground to the whole region of the silicon chip 103, is had Conducive to raising grinding effect.After double-side grinding technique, the silicon chip 103 is ultimately formed by the shape of edge to center progressive additive Looks, as shown in Figure 6.Double-side grinding technique can not only make silicon chip 103 form the thin pattern of above-mentioned intermediate thick rim, also by the silicon The corrugated nanotopography that piece 103 is formed during being cut into silicon chip 103 using multi-wire saw method eliminates.
As shown in fig. 7, its be silicon chip provided in an embodiment of the present invention production method in, step S3 grinding silicon chips 103 When the first face A2, Acetabula device 204 also not to 103 applying vacuum suction of silicon chip when silicon chip 103 and swingle 201, abrasive wheel The schematic diagram of fixing device 202, abrasive wheel 203 and Acetabula device 204.Abrasive wheel 203 is installed on abrasive wheel fixing device 202 On, the abrasive wheel fixing device 202 is connected with swingle 201, and the silicon chip 103 is positioned on Acetabula device 204, the silicon Second face B2 of piece is contacted with 204 part of the Acetabula device.The Acetabula device 204 does not also apply the silicon chip 103 at this time It is still the pattern being gradually thinned with edge to center to add pull of vacuum, the silicon chip 103.
After 103 applying vacuum suction of silicon chip described in the Acetabula device 204, due to elastic deformation, the silicon chip 103 Second face B2 becomes flat surface, and is all contacted with the Acetabula device 204, and the silicon chip 103 is changed among the first face A2 The structure (thick middle thin edge) of protrusion, as shown in Figure 8.The rotation of swingle 201 at this time drives the abrasive wheel fixing device 202 Rotation, and then the abrasive wheel 203 is driven to rotate, you can the silicon chip 103 is ground, among the silicon chip 103 Protrusion, so mainly grinding middle section so that the center and peripheral area thickness of 103 pairs of silicon chip is essentially identical.Grinding is completed Afterwards, abrasive wheel 203 to be risen, pull of vacuum of the Acetabula device 204 to silicon chip 103 is removed, elastic deformation occurs for the silicon chip 103, Form bowl structure, the first face A2 intermediate recess, the second face B2 intermediate projections, as shown in Figure 9.
Refering to fig. 10, be silicon chip provided in an embodiment of the present invention production method in, when step S4 grinds the second face B2, Acetabula device 204 also not to 103 applying vacuum suction of silicon chip when silicon chip 103 and swingle 201, abrasive wheel fixing device 202, The schematic diagram of abrasive wheel 203 and Acetabula device 204.The silicon chip 103 is positioned on the Acetabula device 204, the silicon First face A2 of piece is contacted with 204 part of the Acetabula device.At this point, the Acetabula device 204 is not also to the silicon chip at this time 103 applying vacuum suction, the silicon chip 103 still keep bowl structure, the second face B2 central protuberances, the first face A2 central foveas It falls into.
After 103 applying vacuum suction of silicon chip described in the Acetabula device 204, due to elastic deformation, 103 meeting of the silicon chip It flattens, as shown in figure 11.After the completion of grinding, the abrasive wheel 203 is risen, removes vacuum of the Acetabula device 204 to silicon chip 103 Suction, bowl structure before the silicon chip 103 restores, as shown in figure 12.103 thickness of the silicon chip is thinned at this time, and second Face B2 is also more flat.
In the production method of silicon chip provided in this embodiment, step S5 uses two-sided flatening process, that is, i.e. to the silicon First face A2 of piece 103 and the second face B2 of silicon chip 103 is carried out at the same time planarization, in the present embodiment, the referring to of planarization Mechanical polishing process is learned, and identical with 103 process time of a batch of silicon chip.Certainly in practical applications, can also be used other Flatening process, technological parameter also can suitably be adjusted with the requirement of different silicon chips 103.Compared with single side flat chemical industry skill, adopt It will higher with the integral smoothness and partly flat degree of the silicon chip 103 of two-sided flatening process.
In the production method of silicon chip provided in this embodiment, the final flatening process of step S6, that is, subsequently outer to silicon chip The one side of epitaxial growth epitaxial layer is once planarized again.In the present embodiment, the second face B2 of the silicon chip 103 is carried out flat Change, forms the silicon chip 103 of final bowl structure.
Finally, it such as step S7, is grown on the second face B2 of the silicon chip 103 and specifies epitaxial layer 301, that is, complete silicon chip It makes, as shown in figure 13.This epitaxial layer 301 can form the pattern being gradually recessed by edge to center in growth course, in addition Prolong layer growth 301 when, due to lattice mismatch to 103 pattern of silicon chip generates influence just counteracting silicon chip 103 the second face B2 by The pattern of the gradual protrusion in edge to center, so smooth, the satisfactory silicon chip of uniformity can be formed.
As a unrestricted example, between step S1 and step S2 or between step S2 and step S3, that is, Before or after the double-side grinding technique, it can also increase by an edging technique, that is, carry out to the edge of the silicon chip 103 Grinding, by double-side grinding technique be difficult to the fringe region being ground to also grind it is smooth.
As a unrestricted example, between step S1 and step S2 or between step S2 and step S3, that is, Before or after double-side grinding technique, it can also increase by a wet clean process, for example, by using deionized water, and can be with Use ultrasonic cleaning mode.
As a unrestricted example, between step S4 and step S5, that is, after grinding the second face B2, also It can increase by a wet-etching technology, preferably alkaline etch bath performs etching, and etching liquid is, for example, NaOH or KOH, for removing Internal stress after grinding.
As a unrestricted example, between step S4 and step S5 or between step S5 and step S6, that is, Before or after two-sided flatening process, it can also increase by an edge flatening process.After increasing edge flatening process, It can also increase by a wet clean process after edge flatening process, this wet-cleaning preferably with having No. 1 liquid simultaneously (NH4OH:H2O2:H2O), No. 2 liquid (HCL:H2O2:H2O can add appropriate hydrofluoric acid) the wet-cleaning machine of rinse bath carry out it is clear It washes.
As a unrestricted example, between step S5 and step S6 or between step S6 and step S7, that is, After the two-sided planarization or after final planarization, it can also increase by a wet clean process, this wet-cleaning is preferred With simultaneously there is No. 1 liquid (NH4OH:H2O2:H2O), No. 2 liquid (HCL:H2O2:H2O can add appropriate hydrofluoric acid) rinse bath it is wet Method cleaning machine is cleaned.
<Embodiment two>
The production method of silicon chip provided by Embodiment 2 of the present invention with embodiment one difference lies in give birth to by epitaxial layer 501 It is longer than the first face A2 of the silicon chip 403, as shown in figure 14.Its epitaxial layer 501 is that can be formed by edge to center in growth The gradually material of protrusion pattern, when this epitaxial layer 501 is grown, the influence generated to 403 pattern of silicon chip due to lattice mismatch is just The pattern that the first face A3 of silicon chip 403 is gradually recessed by edge to center is offset, is met so smooth, uniformity can be formed It is required that silicon chip 403.Certainly in the final planarisation step before, and the first face A3 of silicon chip 403 is planarized.
In conclusion using the production method of silicon chip provided by the invention, due to using double-side grinding technique, eliminate Cut silicon chip during formed corrugated nanotopography, also, use two-sided flatening process, compared with the prior art in adopt There is preferably part and overall flat degree with single side flat chemical industry skill.
Foregoing description is only the description to present pre-ferred embodiments, not to any restriction of the scope of the invention, this hair Any change, the modification that the those of ordinary skill in bright field does according to the disclosure above content, belong to the protection of claims Range.

Claims (17)

1. a kind of production method of silicon chip, which is characterized in that include the following steps:
One silicon chip is provided;
The first face and the second face to the silicon chip are carried out at the same time grinding, and the first face and the second face of the silicon chip are respectively formed by side Edge to center progressive additive pattern;
The silicon chip is adsorbed in an Acetabula device, the second face of the silicon chip is contacted with the Acetabula device, to the silicon chip The first face be ground;
By the silicon wafer turnover and it is adsorbed in the Acetabula device, the first face of the silicon chip is contacted with the Acetabula device, right Second face of the silicon chip is ground, and forms the silicon chip of bowl structure;
Planarization is carried out at the same time to the first face and the second face of the silicon chip;
The epitaxial growth epitaxial layer on the first face or the second face of the silicon chip.
2. the production method of silicon chip as described in claim 1, which is characterized in that the first face and the second face to the silicon chip are simultaneously After being planarized, further include:
First face of the silicon chip is finally planarized, the epitaxial layer is epitaxially grown on the first face of the silicon chip.
3. the production method of silicon chip as claimed in claim 2, which is characterized in that the central concave in the first face of the silicon chip, institute State the central protuberance in the second face of silicon chip, when extension layer epitaxially grown is formed by the pattern of the gradual protrusion in edge to center.
4. the production method of silicon chip as described in claim 1, which is characterized in that the first face and the second face to the silicon chip are simultaneously After being planarized, further include:
Second face of the silicon chip is finally planarized, the epitaxial layer is epitaxially grown on the second face of the silicon chip.
5. the production method of silicon chip as claimed in claim 4, which is characterized in that the central concave in the first face of the silicon chip, institute State the central protuberance in the second face of silicon chip, when extension layer epitaxially grown forms the pattern being gradually recessed by edge to center.
6. the production method of silicon chip as described in claim 1, which is characterized in that the first face and the second face to the silicon chip are simultaneously In the step of being ground, physical grinding is carried out to the silicon chip using abrasive wheel.
7. the production method of silicon chip as claimed in claim 6, which is characterized in that the diameter of the abrasive wheel is more than or equal to institute State the radius of silicon chip.
8. the production method of silicon chip as described in claim 1, which is characterized in that the first face and the second face to the silicon chip are simultaneously In the step of being planarized, the first face of the silicon chip and the second face are carried out at the same time using CMP process flat Change.
9. the production method of silicon chip as described in any one of claim 1~8, which is characterized in that the first of the silicon chip Face and the second face are carried out at the same time before or after grinding, further include an edging technique.
10. the production method of silicon chip as described in any one of claim 1~8, which is characterized in that the first of the silicon chip Face and the second face are carried out at the same time before or after grinding, further include a wet clean process.
11. the production method of silicon chip as described in any one of claim 1~8, which is characterized in that the second of the silicon chip Further include a wet-etching technology after face is ground.
12. the production method of silicon chip as described in any one of claim 1~8, which is characterized in that the first of the silicon chip Face and the second face are carried out at the same time before planarization, further include an edge flatening process.
13. the production method of silicon chip as claimed in claim 12, which is characterized in that after the edge flatening process, also Including a wet clean process.
14. the production method of silicon chip as described in any one of claim 1~8, which is characterized in that the first of the silicon chip Face and the second face are carried out at the same time after planarization, further include an edge flatening process.
15. the production method of silicon chip as claimed in claim 14, which is characterized in that after the edge flatening process, also Including a wet clean process.
16. the production method of silicon chip as described in any one of claim 1~8, which is characterized in that the first of the silicon chip Face and the second face are carried out at the same time after planarization, further include a wet clean process.
17. the production method of silicon chip as described in claim 2 or 4, which is characterized in that after the final planarization, also wrap Include a wet clean process.
CN201710068794.9A 2017-02-08 2017-02-08 The production method of silicon chip Pending CN108400081A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201710068794.9A CN108400081A (en) 2017-02-08 2017-02-08 The production method of silicon chip
TW106126976A TWI668738B (en) 2017-02-08 2017-08-09 A manufacturing method for wafers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710068794.9A CN108400081A (en) 2017-02-08 2017-02-08 The production method of silicon chip

Publications (1)

Publication Number Publication Date
CN108400081A true CN108400081A (en) 2018-08-14

Family

ID=63093866

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710068794.9A Pending CN108400081A (en) 2017-02-08 2017-02-08 The production method of silicon chip

Country Status (2)

Country Link
CN (1) CN108400081A (en)
TW (1) TWI668738B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111230605A (en) * 2020-02-17 2020-06-05 中环领先半导体材料有限公司 Method for improving flatness of silicon polished wafer
CN111816548A (en) * 2020-05-11 2020-10-23 中环领先半导体材料有限公司 Process for improving edge roughness of large-diameter semiconductor silicon wafer by edge polishing
CN114700874A (en) * 2022-04-24 2022-07-05 西安奕斯伟材料科技有限公司 Single-face thinning system and single-face thinning method
CN114800104A (en) * 2022-05-30 2022-07-29 西安奕斯伟材料科技有限公司 Single-side thinning method and single-side thinning equipment

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000060602A (en) * 1999-03-17 2000-10-16 윤종용 A methode of fabricating semiconductor wafer
CN1272222A (en) * 1997-08-21 2000-11-01 Memc电子材料有限公司 Method of processing semiconductor wafers
US20090325385A1 (en) * 2006-11-30 2009-12-31 Sumco Corporation Method for manufacturing silicon wafer
CN101656195A (en) * 2008-08-22 2010-02-24 北京有色金属研究总院 Method for manufacturing large-diameter silicon wafer
CN101656193A (en) * 2008-08-21 2010-02-24 北京有色金属研究总院 Technique for processing silicon chip
CN101791779A (en) * 2009-12-03 2010-08-04 北京有色金属研究总院 Semiconductor silicon wafer manufacture process
CN101927447A (en) * 2009-06-24 2010-12-29 硅电子股份公司 The method of twin polishing semiconductor wafer
CN102107391A (en) * 2009-12-24 2011-06-29 北京天科合达蓝光半导体有限公司 Method for processing monocrystal silicon carbide wafer
CN104097134A (en) * 2013-04-12 2014-10-15 硅电子股份公司 Method for polishing semiconductor wafers by means of simultaneous double-side polishing
CN104769704A (en) * 2013-02-19 2015-07-08 胜高股份有限公司 Method for processing semiconductor wafer

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004356252A (en) * 2003-05-28 2004-12-16 Sumitomo Mitsubishi Silicon Corp Method for working silicon wafer
JP4835069B2 (en) * 2005-08-17 2011-12-14 株式会社Sumco Silicon wafer manufacturing method
EP3109894B1 (en) * 2014-02-18 2020-11-25 NGK Insulators, Ltd. Composite substrate for semiconductor, and method for manufacturing a composite substrate for semiconductor

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1272222A (en) * 1997-08-21 2000-11-01 Memc电子材料有限公司 Method of processing semiconductor wafers
KR20000060602A (en) * 1999-03-17 2000-10-16 윤종용 A methode of fabricating semiconductor wafer
US20090325385A1 (en) * 2006-11-30 2009-12-31 Sumco Corporation Method for manufacturing silicon wafer
CN101656193A (en) * 2008-08-21 2010-02-24 北京有色金属研究总院 Technique for processing silicon chip
CN101656195A (en) * 2008-08-22 2010-02-24 北京有色金属研究总院 Method for manufacturing large-diameter silicon wafer
CN101927447A (en) * 2009-06-24 2010-12-29 硅电子股份公司 The method of twin polishing semiconductor wafer
CN101791779A (en) * 2009-12-03 2010-08-04 北京有色金属研究总院 Semiconductor silicon wafer manufacture process
CN102107391A (en) * 2009-12-24 2011-06-29 北京天科合达蓝光半导体有限公司 Method for processing monocrystal silicon carbide wafer
CN104769704A (en) * 2013-02-19 2015-07-08 胜高股份有限公司 Method for processing semiconductor wafer
CN104097134A (en) * 2013-04-12 2014-10-15 硅电子股份公司 Method for polishing semiconductor wafers by means of simultaneous double-side polishing

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111230605A (en) * 2020-02-17 2020-06-05 中环领先半导体材料有限公司 Method for improving flatness of silicon polished wafer
CN111816548A (en) * 2020-05-11 2020-10-23 中环领先半导体材料有限公司 Process for improving edge roughness of large-diameter semiconductor silicon wafer by edge polishing
CN114700874A (en) * 2022-04-24 2022-07-05 西安奕斯伟材料科技有限公司 Single-face thinning system and single-face thinning method
CN114800104A (en) * 2022-05-30 2022-07-29 西安奕斯伟材料科技有限公司 Single-side thinning method and single-side thinning equipment
TWI832487B (en) * 2022-05-30 2024-02-11 大陸商西安奕斯偉材料科技股份有限公司 Single-sided thinning method and single-sided thinning equipment

Also Published As

Publication number Publication date
TW201837987A (en) 2018-10-16
TWI668738B (en) 2019-08-11

Similar Documents

Publication Publication Date Title
CN108400081A (en) The production method of silicon chip
JP4835069B2 (en) Silicon wafer manufacturing method
US5622875A (en) Method for reclaiming substrate from semiconductor wafers
US9293318B2 (en) Semiconductor wafer manufacturing method
TWI285924B (en) Method for manufacturing silicon wafer
CN101431021B (en) Processing method of thin silicon monocrystal polished section
EP1005069A2 (en) Semiconductor wafer and method for fabrication thereof
TWI595548B (en) Method for processing semiconductor wafer, method for manufacturing bonded wafer, and method for manufacturing epitaxial wafer
KR100418442B1 (en) Manufacturing Method of Semiconductor Mirror Wafer
US8562849B2 (en) Methods and apparatus for edge chamfering of semiconductor wafers using chemical mechanical polishing
JP3828176B2 (en) Manufacturing method of semiconductor wafer
CN105081893A (en) Ultrathin Ge single crystal substrate material and preparation method thereof
JPH0281431A (en) Manufacture of semiconductor device
CN110010458B (en) Method for controlling surface morphology of semiconductor wafer and semiconductor wafer
SG187487A1 (en) Method for producing a polished semiconductor wafer
EP1145296B1 (en) Semiconductor wafer manufacturing method
JP2014027006A (en) Processing method of wafer
WO2016180273A1 (en) Special-shaped semiconductor wafer, manufacturing method and wafer carrier
US9502230B2 (en) Method for producing SiC substrate
JP4224871B2 (en) Manufacturing method of semiconductor substrate
JP4103808B2 (en) Wafer grinding method and wafer
JP2012174935A (en) Method of manufacturing epitaxial wafer
JP2000340571A (en) Manufacture of wafer of high planarity degree
JP2003151939A (en) Method of manufacturing soi substrate
CN108735591A (en) Method for planarization of wafer surface

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20180814

RJ01 Rejection of invention patent application after publication