CN101609806A - 用于印刷电路板表面安装元件的薄型焊栅阵列技术 - Google Patents
用于印刷电路板表面安装元件的薄型焊栅阵列技术 Download PDFInfo
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Abstract
本发明提供用于印刷电路板表面安装元件的薄型焊栅阵列技术。支起触点(standoff contact)阵列设置在倒装芯片封装件的安装基片和板之间。支起触点阵列可通过使安装基片上的薄型焊料凸点与板上的薄型焊膏配合而形成。之后,通过紧贴安装基片上的薄型焊料凸点回流板上的薄型焊膏而形成支起触点阵列。
Description
技术领域
公开的实施例涉及半导体装置、封装件以及制造它们的工艺。
附图说明
为了理解获得实施例的方式,上文简要说明的各种不同实施例的更具体的说明将通过参考附图提供。这些图描绘实施例其不必须按比例绘制并且不认为在范围上是限制的。一些实施例将通过附图的使用以附加的特征和细节说明和解释其中:
图1a是根据实施例的半导体集成电路封装件的横截面正视图;
图1b是根据实施例的在图1a中描绘的封装件进一步加工之后的半导体集成电路封装的横截面正视图;
图1c是根据实施例的在图1b中描绘的封装件进一步加工之后的半导体集成电路封装的横截面正视图;
图1d是根据实施例的在图1c中描绘的封装件进一步加工之后的半导体集成电路封装的横截面正视图;
图1e是根据实施例的在图1d中描绘的封装件进一步加工之后的半导体集成电路封装的横截面正视图;
图1f是根据实施例的在图1e中描绘的封装件进一步加工之后的半导体集成电路封装的横截面正视图;
图2是根据实施例的在图1d中描绘的横截面正视图的细节;
图3a是根据实施例的在图1f中描绘的详细横截面正视图;
图3b是根据实施例的在如图3a中示出的加工之后在图1f中描绘的详细横截面正视图;
图4是根据实施例的方法流程图400;以及
图5是根据实施例的电子系统的示意图。
具体实施方式
通过允许焊膏回流成薄型焊料凸点而在安装基片上形成薄型焊栅阵列(low-profile solder grid array)。薄型焊栅阵列通过每个薄型焊料凸点(solder bump)与板上的薄型焊膏(solder paste)接触而安装到板上。然后回流该薄型焊膏以与薄型凸点接合。
现在参考附图,其中相似的结构可提供有相似的后缀标号。为了最清晰地示出各种不同的实施例的结构,这里包括的附图是集成电路结构的图形表示。因此,制造的结构的实际外观,例如在显微照片中,可能显得不同,然而仍包含示出的实施例的要求权利的结构。此外,附图只示出用于理解示出的实施例所必需的结构。没有包括本领域内已知的另外的结构以保持附图的清晰。
图1a是根据实施例的半导体集成电路封装100的横截面正视图。倒装芯片封装件110包括半导体集成电路112(以下“芯片”)、底部填充材料114、其中一个由标号116标示的多个焊球,和安装基片118。芯片112通过多个焊球116与安装基片118电连接。在实施例中,安装基片118配置有多个焊盘,其中一个用标号120标示。焊盘120可具有表面层122,例如比焊盘120的金属更具惰性的金属。对于实例实施例,焊盘120是铜金属而表面层122是金金属。对于实例实施例,焊盘120是铜金属而表面层122是铂族金属。在实例实施例中,焊盘120是铜金属而表面层122是镍钯金的合金。在加工过程中,掩模124叠加在安装基片118上以使焊盘120显露。通过以非限制性的方式,使用涂刷器128使焊膏126图案化至焊盘120上。在任何情况下,焊膏126施加到焊盘120上以形成焊膏阵列130。在实施例中,焊膏126源于锡(Sn)的无铅金属粉末。在实施例中,焊膏126是锡-银(Sn-Ag)成分。在实施例中,焊膏126是锡银铜(Sn-Ag-Cu)成分例如SAC305(其是Sn96.5/Ag3.0/Cu0.5)。在实施例中,焊膏126是Sn-Ag-Cu成分例如SAC405(其是Sn3.8Ag0.7Cu)。在实施例中使用锡-锑(Sn-Sb)焊膏126。在实施例中,焊膏126是锡-铅(Sn-Pb)共晶粉末。
在实施例中,焊膏126具有在大约5μm到45μm的范围内的平均金属粒直径。
图1b是根据实施例的在图1a中描绘的封装件100进一步加工之后的半导体集成电路封装件101的横截面正视图。当在X-Z平面看时焊膏阵列130描绘为具有关于掩模124的平坦轮廓。在实施例中,在焊膏阵列130中的每个元件的轮廓由掩模124的厚度控制。例如,掩模124具有一厚度,其留下高度在100微米(μm)到200μm范围内的以焊膏形式的焊料凸点。在实施例中,在安装基片118上的焊膏阵列130的两个存在点之间的中心到中心的间距是0.6毫米(mm)并且焊膏阵列130的每个存在点的高度在大约170到200μm范围内。在实施例中,在安装基片118的焊膏阵列130的两个存在点之间的间距是0.5mm并且焊膏阵列130的每个存在点的高度在从50μm到大约100μm的范围内。
在实施例中,数字130代表的结构是例如金属柱等的电连接器。尽管高宽比(Z方向尺寸除以X方向尺寸)小于一,但是结构130可称为接触柱。在这个实施例中,由数字122代表的结构可是柱120的润湿层。例如,润湿层122可是焊膏实施例并且柱130是铜柱。在下文中,结构130将指焊膏阵列130,除非另外明确地说明。
在实施例中,在焊膏阵列130中单个存在点可具有取决于位置的不同的直径。例如接近安装基片118的外围的焊盘120可具有第一直径160,其大于接近其的中心的焊盘,其具有第二直径162。焊盘尺寸以及相应薄型焊料凸点的这个变化可允许在其中可能经历较大强度的热应力和物理冲击的外围处的有用的应力阻力。
图1c是根据实施例的在图1b中描绘的封装件101进一步加工之后的半导体集成电路封装件102的横截面正视图。在形成焊膏阵列130后,移走掩模124(图1b)。
图1d是根据实施例的在图1c中描绘的封装件102进一步加工之后的半导体集成电路封装件103的横截面正视图。焊膏阵列130(图1c)回流以形成薄型焊料凸点阵列131。
图2是根据实施例的在图1d中描绘的横截面正视图的细节200。细节200沿在图1d中的截面线200截取。安装基片118在带有焊盘120的两个存在点和相应表面层122的详细部分中示出。也描绘了薄型焊料凸点阵列131的两个存在点。每个薄型焊料凸点131有凸点高度232和凸点宽度234。每个薄型焊料凸点131的高宽比给作凸点高度232除以宽度234。另外在焊盘120的宽度234给作单位量的实施例中,间距236给作1.5倍单位量。
在实施例中,高宽比基于0.6mm间距的实施例,其中间距是焊盘120的宽度234的1.5倍。因此,其中每个薄型焊料凸点131具有170μm除以0.4mm的高宽比,或大约0.425的高宽比。在实施例中,其中每个薄型焊料凸点131具有200μm除以0.4mm的高宽比,或大约0.5的高宽比。在实施例中,其中焊盘120具有300μm的直径并且间距是0.6mm,带有200μm凸点支起(bump standoff)的高宽比是0.67。
在实施例中,高宽比基于0.5mm间距的实施例,其中间距236是焊盘120的宽度234的1.5倍。因此,其中每个薄型焊料凸点131具有100μm除以333mm的高宽比,或大约0.3的高宽比。在实施例中其焊盘120具有200μm的直径并且间距是0.5mm,带有100μm凸点支起的高宽比是0.5。
其他的间距可应用到示出实施例中。在实施例中,间距236是焊盘120的宽度234的1.33倍。在实施例中,间距236是焊盘120的宽度234的1.25倍。在实施例中,间距236与焊盘120的宽度234相等。在实施例中,间距236是焊盘120的宽度234的1.67倍。在实施例中,间距236是焊盘120的宽度234的双倍。
图1e是根据实施例的在图1d中描绘的封装件103进一步加工后的半导体集成电路封装件104的横截面正视图。如示出的倒装芯片封装件110关于Z轴倒置。根据实施例倒装芯片封装件110描绘成与例如印刷线路板等的板138配合。指向箭头示出使安装基片118与板138合在一起。板138配置有多个焊盘,其中一个用标号140标示。与在安装基片118上的焊盘120类似,板138上的焊盘140可具有表面层142。同样类似地,根据实施例表面层142可是比焊盘140的金属更具惰性的金属或合金。
板138还包括焊膏阵列。示出板焊膏阵列144的四个存在点。在加工实施例中,回流的薄型焊膏阵列131与板焊膏阵列144的对应存在点配合。在加工实施例中,示范组装微电子器件封装件110的焊栅阵列131的过程以便薄型焊料凸点131与安置在印刷线路板基片138上的板焊膏阵列144配合。多个回流的薄型焊料凸点131到板焊膏阵列144的组装可在这个示出的实施例中完成。
图1f是根据实施例的在图1f中描绘的封装件104进一步加工后的半导体集成电路封装件105的横截面正视图。封装件105包括通过薄型焊料凸点阵列131和板焊膏阵列144之间的接触而与与板138配合的安装基片118。
图3a是根据实施例的在图1f中描绘的横截面正视图的细节300。细节300沿在图1f中的截面线300截取。安装基片118在带有焊盘120的一个存在点的详细部分中示出。在图3a中示出更多的细节,其也可在图2中说明和示出的实施例中找到。例如,在薄型焊料凸点阵列131的回流过程中,可消耗一部分表面层122以形成封装金属间化合层150和封装剩余表面层123。封装金属间化合层150由消耗的表面层122和来自焊膏的部分焊料构成。
图3a还描绘与薄型焊料凸点131直接接触的板焊膏144。组合的板焊膏144和薄型焊料凸点131显示出封装凸点高度346以及封装凸点宽度348。封装凸点宽度348定义为特征宽度348或焊盘120和140的直径。每个封装凸点的高宽比给作封装凸点高度346除以封装凸点宽度348。
图3b是根据实施例的在图3a中描绘的结构进一步加工之后在图1f中描绘的横截面正视图的细节300。板焊膏144(图3a)回流成板凸点145。回流还导致在图1e中描绘的表面层142的至少部分消耗以形成剩余表面层143以及板金属间化合层152。
在实施例中,板凸点145具有与薄型焊料凸点131截然不同的化学成分。由于板焊膏144的回流,在板凸点145以及薄型焊料凸点131间产生有用的润湿接触而没有显著的物质转移。
在实施例中,薄型焊料凸点131由于板凸点145的回流材料的侵入而稀释。由于板焊膏144回流,基于焊料相热力学,板焊膏144的组分溶解进入薄型焊料凸点131。因此,薄型焊料凸点131的焊料化学组成与焊膏130的焊料化学组成显著不同。类似地,板凸点145的焊料化学组成与板焊膏144的焊料化学组成显著不同。并且另外,薄型焊料凸点131和板凸点145的焊料化学组成是相同的。
在实施例中,薄型焊料凸点131只是部分地被板凸点145的回流材料渗入。由于板焊膏144回流,基于焊料相热力学,板焊膏144的组分溶解进入薄型焊料凸点131。然而其溶解的程度是有限的使得接近剩余表面层123的薄型焊料凸点131明显地没有受到板凸点145的材料的影响。类似地,板凸点145的材料的溶解进入薄型焊料凸点131的程度是有限的使得板凸点145具有与靠近剩余表面层143的板焊膏144类似的化学组成。在这个实施例中,过渡区域354示为在薄型焊料凸点131和板凸点145之间的虚线。过渡区域的范围代表薄型焊料凸点131和板凸点145间的区域稀释。薄型焊料凸点131与板凸点145可基于具体的回流状况以及薄型焊料凸点131和板凸点145的焊料化学组成而改变。
封装件到焊盘的宽度支起比率定义为凸点131以及145的累积高度346除以焊盘宽度348。在下文中这个比率称作支起比率。
在基于0.6mm间距实施例的实施例中,其中间距是焊盘120的宽度的1.5倍,支起比率是大约0.425。在0.425支起比率的实施例中,累积高度是170μm。在基于0.6mm间距实施例的实施例中,其中间距是焊盘120的宽度的1.5倍,支起比率是大约0.5。在0.400支起比率的实施例中,累积高度是200μm。在基于0.6mm间距实施例的实施例中,其中间距是焊盘120的宽度的1.5倍,支起比率是大约0.3。
在基于0.5mm间距实施例的实施例中,其中间距是焊盘120的宽度的1.5倍,支起比率大约0.3。在0.3支起比率的实施例中,累积高度是100μm。
在实施例中,达到支起比率而没有焊料凸点。在实施例中,用与焊盘120和140中的每个直接接触的导电柱达到结构的高度346。在实施例中,通过由焊料膜电连接的导电柱达到高度346。在图3b中,结构131和145代表一体式柱结构使得分界线354不存在。此外,结构150和152代表将导电柱131和145与各自的焊盘120和140接合的焊料膜。在实施例中,导电柱131和145是铜,焊盘120和140是铜,并且焊料膜150和152源于焊膏。在实施例中,图3b按关于高度346和宽度348的比例绘制并且高宽比可以通过如示出的这样的高度346除以这样的宽度348的按理比较来确定。此外,这个高宽比可变化正或负10%。
不管支起比率是否用焊膏或柱达到,通过这些工艺获得的电结构可称为支起触点。
图4是根据实施例的工艺流程图400。
在410,工艺包括在微电子器件安装基片上形成焊膏阵列。非限制性的例子在图1a到1c中描绘。
在420,工艺包括回流焊膏阵列以形成薄型焊料凸点。非限制性的例子在图1d中描绘。
在430,工艺包括使薄型焊料凸点阵列配合到印刷线路板上的板焊膏阵列。非限制性的例子在图1e和1f中描绘。在实施例中,工艺在430开始和终止。在实施例中,工艺在410开始而在430终止。
在440,工艺包括紧贴薄型焊料凸点阵列回流板焊膏阵列以形成带有薄型支起触点的低支起比率封装件。非限制性的例子在图1d中描绘。在实施例中,薄型支起触点通过柱的使用形成。
图5是根据实施例的电子系统500的示意图。电子系统500如描绘的可以体现显示如在这个说明中阐述的支起比率实施例的装置。在实施例中,电子系统500是计算机系统,其包括电耦合电子系统500的各个不同的元件的系统总线520。根据不同的实施例,系统总线520是单个总线或多个总线的任何组合。电子系统500包括向集成电路510提供电力的电压源530。在一些实施例中,电压源530通过系统总线520向集成电路510供应电流。
根据实施例集成电路510与系统总线520电耦合并且包括任何电路或电路的组合。在实施例中,集成电路510包括可以是任何类型的处理器512。如这里所用的,处理器512可表示例如但不限于微处理器、微控制器、图形处理器、数字信号处理器或别的处理器等任何类型的电路。可以包括在集成电路510中的其他类型的电路是定制电路或ASIC,例如用于例如蜂窝电话、寻呼机、便携式计算机、双向式收音机和类似的电子系统等的无线设备中的通信电路514。在实施例中,处理器510包括芯片上存储器516,例如SRAM。在实施例中,处理器510包括芯片上存储器516,例如eDRAM。
在实施例中,电子系统500还包括外部存储器840,其进而可包括一个或一个以上适合于特定应用的存储器元件,例如以RAM的形式的主存储器542、一个或一个以上硬驱动机544,和/或一个或一个以上驱动器,其处理可移动媒体546,例如磁盘、压缩盘(CD)、数字视频盘(DVD)、闪存钥和其他在本领域内已知的可移动媒体。
在实施例中,电子系统500还包括显示设备550,音频输出560。在实施例中,电子系统500包括控制器570,例如键盘、鼠标、轨迹球、游戏控制器、麦克风、声音识别设备或任何其他输入信息进入电子系统500的设备。
如这里示出的,集成电路510可以在许多不同的实施例中实施,包括电子封装件、电子系统、计算机系统、一个或一个以上制造集成电路的方法和一个或一个以上制造包括集成电路和如在这里各种不同的实施例中阐述的薄型支起阵列集成电路芯片封装件和它们的本领域公认的等价物的电子组件的方法。元件、材料、几何结构、尺寸和操作顺序都可以变化以适合特定的封装要求。
提供摘要以遵守需要允许读者快速确定技术揭露的本质和主旨的摘要的37C.F.R.§1.72(b)。它被提交而理解为它不用于解释或限制权利要求的范围或含义。
在前面的详细说明中,为了简化说明的目的而在单个实施例中将各个不同的特征组合在一起。这个公开的方法不解释为反映本发明所保护实施例要求比每个权利要求中明确详述的特征更多的特征的意图。相反,如下列权利要求反映的,发明性的主题在于比单个公开的实施例的所有特征少。因而下列权利要求以此方式结合于具体实施方式部分内,其中每个权利要求立足于它自身作为独立的优选实施例。
对于那些本领域内技术人员容易理解可作出在为了说明本发明的本质而已经说明和示出的细节、材料、部件和方法阶段中的各种不同的其他变化而没有偏离如在附加权利要求中表达的本发明的原理和范围。
Claims (22)
1.一种工艺,包括:
在倒装芯片安装基片上形成焊膏阵列;
回流所述焊膏阵列以形成以焊栅阵列(SGA)的多个焊料凸点;以及
装配所述倒装芯片安装基片的所述SGA到设置在印刷线路板基片上的板焊膏阵列。
2.如权利要求1所述的工艺,还包括紧贴所述SGA回流所述板焊膏阵列以获得回流的板SGA。
3.如权利要求1所述的工艺,还包括紧贴所述SGA回流所述板焊膏阵列以获得回流的板SGA,其中回流所述板焊膏阵列达到所述SGA中至少一个焊料凸点被来自所述回流的板SGA的材料的稀释。
4.如权利要求1所述的工艺,还包括紧贴所述SGA回流所述板焊膏阵列,其中回流所述板焊膏阵列达到所述SGA中至少一个焊料凸点被来自所述板焊膏阵列的材料的区域性稀释,其中区域性稀释导致设置在所述SGA的至少一个焊料凸点中的未稀释焊料和来自所述板焊膏中的至少一个未稀释焊料的回流焊料之间的过渡区域。
5.如权利要求1所述的工艺,还包括紧贴所述SGA回流所述板焊膏阵列以获得回流的板SGA,其中所述SGA包括第一直径焊料凸点的中心区域和第二直径焊料凸点的外围区域,并且其中所述第二直径大于所述第一直径。
6.如权利要求1所述的工艺,其中所述SGA设置在安装基片焊盘阵列上,其中所述安装基片焊盘阵列包括第一金属和表面层第二金属,并且其中在回流所述焊膏阵列期间,所述第二金属和所述焊膏形成金属间化合层。
7.如权利要求1所述的工艺,其中所述SGA设置在安装基片焊盘阵列上,其中所述安装基片焊盘阵列包括第一金属和表面层第二金属,并且其中在回流所述焊膏阵列期间,所述第二金属和所述焊膏形成金属间化合层,所述工艺还包括:
紧贴所述SGA回流所述板焊膏阵列以获得回流的板SGA,其中所述板焊膏阵列设置在包括第一金属和表面层第二金属的板焊盘阵列上,并且其中在回流所述板焊膏阵列期间,所述第二金属和所述板焊膏形成金属间化合层。
8.一种工艺,包括:
在微电子器件安装基片和板之间装配接触柱,其中所述接触柱具有在从100μm到200μm的范围内的高度,并且其中所述安装基片和板呈现从0.3到0.5的支起比率(接触柱高/焊盘宽)。
9.如权利要求8所述的工艺,其中所述接触柱是铜,并且其中装配所述接触柱包括在源于焊膏的焊料膜之间设置所述接触柱;以及
在一定条件下回流所述焊料膜以获得在大约10μm到大约100μm的范围内的平均金属晶粒尺寸。
10.如权利要求8所述的工艺,还包括回流设置在所述接触柱上方以及下面的焊料膜,其中所述接触柱是接触柱阵列的一部分,其包括第一直径接触柱的中心区域和第二直径接触柱的外围区域,并且其中所述第二直径大于所述第一直径。
11.一种装置,包括:
设置在安装基片上的倒装芯片封装件;
板,其中所述安装基片包括设置在多个焊盘上的支起触点阵列,其中所述支起触点阵列与板配合,并且其中所述板和所述安装基片被所述支起触点阵列隔开有100μm到200μm的范围内的高度和0.3到0.5的支起比率(支起触点高/焊盘宽)。
12.如权利要求11所述的装置,其中所述支起触点阵列是焊栅阵列(SGA)。
13.如权利要求11所述的装置,其中所述支起触点阵列是焊栅阵列(SGA),并且其中所述SGA包括与所述安装基片接触的焊料第一凸点和与所述板接触的焊料第二凸点。
14.如权利要求11所述的装置,其中所述支起触点阵列是铜柱阵列,其与所述安装基片上的相应焊盘和所述板上的相应焊盘配合。
15.如权利要求11所述的装置,其中所述支起触点阵列包括第一直径支起触点的中心区域和第二直径支起触点的外围区域,并且其中所述第二直径大于所述第一直径。
16.如权利要求11所述的装置,其中所述支起触点阵列是焊栅阵列(SGA),并且其中所述SGA包括与所述安装基片接触的焊料第一凸点和与所述板接触的焊料第二凸点,其中所述支起触点阵列包括第一直径支起触点的中心区域和第二直径支起触点的外围区域,并且其中所述第二直径大于所述第一直径。
17.如权利要求11所述的装置,其中所述支起触点阵列是铜柱阵列,其与所述安装基片上的相应焊盘和所述板上的相应焊盘配合,其中所述支起触点阵列包括第一直径支起触点的中心区域和第二直径支起触点的外围区域,并且其中所述第二直径大于所述第一直径。
18.如权利要求11所述的装置,其中所述SGA设置在安装基片焊盘阵列上,其中所述安装基片焊盘阵列包括第一金属和表面层第二金属,并且还包括设置在所述表面层第二金属和所述支起触点阵列之间的金属间化合层。
19.如权利要求11所述的装置,其中所述SGA设置在安装基片焊盘阵列上,其中所述安装基片焊盘阵列包括第一金属和表面层第二金属,还包括设置在所述表面层第二金属和所述支起触点阵列之间的金属间化合层,所述装置还包括:
回流的板SGA,其中所述板SGA设置在包括第一金属和板表面层第二金属的板焊盘阵列上;以及
设置在所述板SGA和所述板表面层之间的金属间化合层。
20.一种计算系统,包括:
设置在倒装芯片封装件中的微电子芯片,其设置在包括多个安装基片焊盘的安装基片上;
板,其中所述安装基片包括设置在所述多个安装基片焊盘上的支起触点阵列,其中所述支起触点阵列在相应多个板焊盘上与所述板配合,并且其中所述板和所述安装基片被所述支起触点阵列隔开有高度在从100μm到200μm的范围内并且有支起比率(支起触点高/焊盘宽)从0.3到0.5;以及
与所述微电子芯片耦合的外部存储器。
21.如权利要求20所述的计算系统,其中所述支起触点阵列包括回流的安装基片焊栅阵列和回流的板焊栅阵列。
22.如权利要求20所述的计算系统,其中所述支起触点阵列包括接触柱阵列。
Applications Claiming Priority (2)
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US12/214006 | 2008-06-16 | ||
US12/214,006 US20090310320A1 (en) | 2008-06-16 | 2008-06-16 | Low profile solder grid array technology for printed circuit board surface mount components |
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CN101609806A true CN101609806A (zh) | 2009-12-23 |
CN101609806B CN101609806B (zh) | 2017-06-23 |
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CN200910150363.2A Active CN101609806B (zh) | 2008-06-16 | 2009-06-16 | 用于印刷电路板表面安装元件的薄型焊栅阵列技术 |
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US (2) | US20090310320A1 (zh) |
JP (2) | JP2009302539A (zh) |
CN (1) | CN101609806B (zh) |
TW (1) | TW201021139A (zh) |
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CN103579150A (zh) * | 2012-07-31 | 2014-02-12 | 台湾积体电路制造股份有限公司 | 用于球栅阵列的焊料凸块 |
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Publication number | Priority date | Publication date | Assignee | Title |
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CN102348328A (zh) * | 2011-09-15 | 2012-02-08 | 深南电路有限公司 | 芯片埋入方法和芯片埋入式电路板 |
CN102348328B (zh) * | 2011-09-15 | 2015-05-13 | 深南电路股份有限公司 | 芯片埋入方法和芯片埋入式电路板 |
CN103579150A (zh) * | 2012-07-31 | 2014-02-12 | 台湾积体电路制造股份有限公司 | 用于球栅阵列的焊料凸块 |
CN103579150B (zh) * | 2012-07-31 | 2016-12-21 | 台湾积体电路制造股份有限公司 | 用于球栅阵列的焊料凸块 |
Also Published As
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JP2009302539A (ja) | 2009-12-24 |
US20120224331A1 (en) | 2012-09-06 |
CN101609806B (zh) | 2017-06-23 |
TW201021139A (en) | 2010-06-01 |
JP2012151487A (ja) | 2012-08-09 |
US20090310320A1 (en) | 2009-12-17 |
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