CN101505905A - 改进的导电凸块、包括改进的导电凸块的线圈及形成方法 - Google Patents
改进的导电凸块、包括改进的导电凸块的线圈及形成方法 Download PDFInfo
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Abstract
本发明涉及使用引线接合机器形成导电凸块的一种方法。本方法包括(a)在半导体元件的触头垫上放置无空气球凸块;(b)在被放置的无空气球凸块上形成引线的第一层;以及(c)在引线的第一层上形成引线的第二层。
Description
技术领域
本发明涉及半导体器件的引线接合,并且更具体地讲,涉及利用引线接合机所形成的改进的导电凸块与线圈。
背景技术
在各种半导体器件的制造厂家中,引线接合技术通常用于在器件中连接各部件。例如,线圈通常被用于提供半导体芯片/压模与引线框架上的触头等之间的互连。示意性的传统的引线接合操作包括(1)接合至半导体压模上的第一接合部位(例如,使用球焊);(2)朝引线框架上的第二接合部位延伸一引线;(3)接合延伸的引线的端部至第二接合部位;以及(4)切断所述引线。
在特定的应用中,期望在半导体压模等的触头垫上形成导电凸块,这利用有时被称为“凸块接合(bump bonding)”或者“柱接合(studbonding)”的已知的技术实现。在这样的应用中,通常期望形成具有高的高度—直径比的导电凸块。形成具有高的高度—直径比的导电凸块的传统方法包括堆叠凸块;然而,当堆叠凸块时存在一些挑战:这包括(1)凸块形成速度;(2)被堆叠凸块的排列;以及(3)由于多次碰撞而引起小间距的问题。
当形成线圈时,一种传统技术包括(1)在第二接合部位形成导电凸块;并且(2)形成从第一接合部位延伸至之前在第二接合部位被形成的所述导电凸块的线圈。例如,第一接合部位可以是在半导体压模上的接合垫,并且第二接合部位可以是在引线框架上的接合垫。不幸的是,通常这种技术没有在线圈与半导体压模的表面之间提供合适的间隙(例如,在某些应用中,形成第二接合的导电凸块不具有足够高度)。
因此,期望提供改进的导电凸块、线圈、以及形成该导电凸块与线圈的方法。
发明内容
根据本发明的示意性实施例,提供一种利用引线接合机形成导电凸块的方法。所述方法包括(a)在半导体元件的接触垫上沉积无空气球凸块;(b)在所述被沉积的无空气球凸块上形成引线的第一折叠部;并且(c)在引线的第一折叠部上形成引线的第二折叠部。
根据本发明的另一示意性实施例,提供一种利用引线接合机在第一接合部位与第二接合部位之间接合引线的方法。所述方法包括(a)在第二接合部位形成导电凸块;并且(b)在第一接合部位与所形成的导电凸块之间延伸一段长度的引线。形成导电凸块的步骤包括:(1)在半导体元件的触头垫上沉积无空气球凸块;(2)在所沉积的无空气球凸块上形成引线的第一折叠部;并且(3)在引线的第一折叠部上形成引线的第二折叠部。
本发明的这些以及其他方法可作为参数(例如,作为引线接合机的信息的一部分),或者作为在计算机可读载体(例如,用于与引线接合机器相连接的计算机可读载体)上的计算机程序指令而被实现。
根据本发明的另一示意性实施例,提供一种导电凸块。所述导电凸块包括一段长度的引线的无空气球凸块部、所述无空气球凸块部上的引线的第一折叠部、以及引线的第一折叠部上的引线的第二折叠部。
根据本发明的另一实施例,提供一种在第一接合部位与第二接合部位之间提供电互连的线圈。所述线圈包括置于第二接合部位的导电凸块。所述导电凸块包括由一段长度的引线形成的无空气球凸块部、无空气球凸块部上的引线的第一折叠部、以及在引线的第一折叠部上的引线的第二折叠部。所述线圈还包括在第一接合部位与所述导电凸块之间延伸的一段长度的引线。
附图说明
结合附图阅读以下详细说明更好地理解本发明。应该强调的是,根据实践,附图中的不同的结构并不是成比例的。相反,各不同的结构的尺寸出于清晰的目的而被任意扩展或者缩小。附图包括:
图1至9A是一组侧视图,示出了根据本发明的示意性实施例形成导电凸块的方法;
图9B至11是跟随在图1至7中示出的步骤后的一组侧视图,示出了根据本发明的示意性实施例形成导电凸块的方法;
图12至14是一组侧视图,示出了根据本发明的示意性实施例的线圈的形成;
图15A至15B是侧视图,示出了根据本发明的示意性实施例的导电凸块的增加的高度;
图16A至16B是俯视图,示出了根据本发明的示意性实施例的导电凸块;并且
图17A至17B是示出了根据本发明的多个示意性实施例而形成导电凸块的运动的视图。
具体实施方式
美国专利公开文献No.5205463、No.6062462和No.6156990以及美国专利申请公开文献No.2004/0152292,涉及引线接合技术,它们全文结合在此引作参考。
正如在此所用,术语“接触垫”与“接合垫”是指实施接合(例如,球接合)的任何导电区域/表面。
正如在此所用,术语半导体元件是指用于半导体加工中的任何广泛类别元件,包括半导体晶片、单一半导体压模/芯片、基板(例如,引线框架)等。
正如在此所用,术语“无空气球凸块(free air ball bump)”不限于任何特定的形状,并且将覆盖利用电子灭焰装置所形成的球凸块和不用这种装置所形成的球凸块。
在某些示意性实施例中,本发明涉及形成具有改进的高度—直径比例如更大的高度—直径比的导电凸块的方法。这种导电凸块可通过以下措施被形成,即沉积无空气球凸块(例如,通过已知的球凸块加工)并然后延伸连接至所沉积的凸块的引线,从而在所期望的凸块的顶部上形成引线的多折叠部。通过这样的技术,最终的导电凸块的高度可按期望增加,而导电凸块的宽度仍可保持相同。
根据本发明形成的导电凸块可用在多种已知应用中。一个这样的示意性应用就是在用于倒装芯片互连的半导体器件(例如,半导体晶片)上所形成的导电凸块(例如,柱凸块)。
根据本发明形成的导电凸块也可用于线圈的形成,例如,为引线接合形成提供更大(和/或更高)的目标。例如,在第二接合部位(例如,在引线框架接合垫上、在半导体压模接合垫上等)上形成导电凸块之后,一段长度的引线可在第一接合部位的接合垫(例如,引线框架接合垫、半导体压模接合垫等)与在第二接合部位上已经形成的导电凸块之间延伸。在其它实施例中,根据本发明的导电凸块可在第一接合部位和第二接合部位的每一个上被形成,其中一段长度的引线在两个导电凸块之间延伸(例如,针脚接合(stitch bond))。其它的结构也是可以考虑的。
图1至9A是一组侧视图,示出了根据本发明的一个示意性实施例的导电凸块的形成方法。在图1中,接合工具102(例如,毛细管工具102)被用于将球凸块106沉积在半导体压模100的接合垫(半导体压模100上的接合垫在图中未示出)上。如图2所示,球凸块106仍连接至引线104,而毛细管工具102被升高在球凸块106的表面之上。图3示出了毛细管工具102沿横向(即,沿水平方向)移动,而在图4中,毛细管工具102沿垂直方向被移动,以留出一小长度的引线。在图5中,引线的第一折叠部108通过向下且水平地移动毛细管工具102而被形成。图6示出了毛细管工具102沿垂直方向被移动,以留出一小部分的引线,而图7示出了毛细管102向下且水平(沿与用于形成第一折叠部108的方向相反的方向)移动以形成第二折叠部110。
在图7示出的步骤后,多个其它步骤可根据本发明的各不同的示意性实施例而被完成。图8至9A示出一个示意性实施例,而图9B至11示出另一个示意性实施例。
具体参看图8,毛细管工具102沿垂直方向(从图7中示出的位置之后)被移动,以留出一小部分的引线,所述运动可跟随着(1)快速水平振动运动和/或(2)超声波能量的施加。所述快速水平振动运动的距离取决于多个因素(例如,引线直径、引线材料、毛细管工具孔直径、毛细管工具材料等)而发生变化。该快速振动运动的目的是弱化引线尾部以利于破坏和/或以防止非粘合失效。在图9A中,线材夹具(未示出)是闭合的,且毛细管工具102沿垂直方向移动以扯断引线尾部104a。因而,根据图1至9A示出的本发明的示意性实施例,导电凸块120(在图9A中示出)被形成。导电凸块120包括(1)球凸块106;(2)引线的第一折叠部108;以及(3)引线的第二折叠部110。
可替代地,从图7中示出的位置,毛细管102可被升高(例如,升高至与图8中示出的位置相似的位置)并且然后降低且水平移动以形成引线的第三折叠部112,如图9B所示。如图10所示,毛细管102然后(从图9B示出的位置)沿垂直方向移动,以留出一小部分的引线,所述运动后可伴随着(1)快速水平振动运动和/或(2)超声波能量的施加。快速水平振动运动的距离取决于多个因素(例如,引线直径、引线材料、毛细管孔直径、毛细管材料等)而变化。该快速振动运动的目的是弱化引线尾部以利于破坏和/或以防止非粘合失效。在图11中,引线夹具(未示出)是闭合的,且毛细管102沿垂直方向移动以扯断引线尾部104a。因此,根据图1至7以及图9B至11示出的本发明的示意性实施例,导电凸块130(在图11中示出)被形成。导电凸块130包括(1)球凸块106,(2)引线的第一折叠部108,(3)引线的第二折叠部110,以及(4)引线的第三折叠部112。
因此,根据本发明,可以产生具有引线的两个折叠部(图9A)、引线的三个折叠部(图11)、和引线的四个、五个或更多个折叠部的导电凸块。形成引线的附加折叠部(例如,第四折叠部、第五折叠部等)的工艺与附图中所示的类似。
图12至14是一组侧视图,示出了根据本发明的示意性实施例的线圈的形成。具体参考图12,半导体压模100在基板114(例如,引线框架)上被设置。导电凸块130(图11中示出的导电凸块130)在半导体压模100的接合垫(未示出)上被形成。然后,一段长度的引线116在基板114的接合垫与导电凸块130之间被形成。更加具体地,导电凸块130在第二接合部位(即,半导体压模100的接合垫)被形成。然后,球接合部116a在第一接合部位(即,基板114的接合垫)被形成,且一段长度的引线116从球接合部116a延伸至导电凸块130。如图13所示,毛细管102然后沿垂直方向被移动,以留出一小部分的引线,所述运动后可伴随着(1)快速水平振动运动和/或(2)超声波能量的施加,从而弱化了引线尾部以便破坏和/或防止非粘合失效。在图14中,引线夹具(未示出)是闭合的,且毛细管102沿垂直方向移动以扯断引线尾部104a。
因而,根据本发明,线圈可利用根据本发明形成的导电凸块而被形成。当然,根据本发明形成的任何导电凸块(例如,具有二、四、五或更多折叠的引线的导电凸块)可替代图12至14中的导电凸块130。此外,根据本发明形成的导电凸块可整合到第一接合部位中(在图12至14中示出的引线框架114的接合垫上),而与第二接合部位(在图12—14中示出的半导体压模的接合垫上)相反。仍进一步,根据本发明形成的导电凸块可被整合到线圈的第一接合部位和第二接合部位,其中一段长度的引线可在两个导电凸块之间被延伸。
图15A至15B是侧视图,示出了根据本发明的示意性实施例的增加高度的导电凸块。更为具体地,图15A示出了具有单折叠部且高度为H1的导电凸块,而图15B示出根据本发明的导电凸块130(图11中示出相同的凸块130),其具有引线的三个折叠部并具有高度H2。导电凸块130,如图15B所示,包括顶侧表面112a(即,引线的第三折叠部112的顶部)和引线尾部/末端112b(即,引线的第三折叠部112的端部)。
图16A至16B是根据本发明的示意性实施例所形成的导电凸块的俯视图。更为具体地,图16A示出导电凸块130(在图11和15B中示出相同的凸块130)的俯视图,所述导电凸块包括球凸块106、引线的第三折叠部112、引线的第三折叠部112的顶侧表面112a、以及引线的第三折叠部112的尾部/末端112b。如图16A所示,引线的第三折叠部112的宽度(包括引线尾部/末端112b)大体处于球凸块106的投影区(footprint)内。
根据本发明的特定示意性实施例,导电凸块在引线多折叠部中的一个的一部分延伸超过下方的球接合部的投影区之处设置。例如,图16B示出导电凸块230(其在多个方面与导电凸块130相似,除了一个或多个引线折叠部的宽度)的俯视图。导电凸块230包括球凸块206、引线的第三折叠部212、引线的第三折叠部212的顶侧表面212a、以及引线的第三折叠部212的引线尾部/末端212b。如图16B所示,引线的第三折叠部212的宽度延伸超出球接合部206的投影区,从而设置了在此接合的较大的目标(例如,为在此接合一段长度的引线,如图12至14所示)。在这样的实施例中,只有引线的顶侧折叠部具有增加的宽度,或者引线的一个或多个附加折叠部(即,下侧折叠的引线)也可具有增加的宽度。
图17A至17B是示出根据本发明的各种示意性实施例形成导电凸块的运动的示意图。更具体地,图17A示出用来形成图9A中示出的导电凸块120的示意性运动,并且图17B示出用来形成图11中示出的导电凸块120的示意性运动。
参照图17A,接合工具102(例如,毛细管工具102)被用于将球凸块106沉积在半导体压模100的接合垫上(在半导体压模100上的接合垫在图中未示出)。在运动A,球凸块106仍连接至引线,毛细管被提升到球凸块106的表面之上。在运动B,毛细管沿横向(即水平方向)被移动,且在运动C,毛细管沿垂直方向被移动,以留出一小长度的引线。在运动D,引线的第一折叠部通过向下且水平移动毛细管而被形成。在运动E,毛细管沿垂直方向被移动以留出一小部分的引线,并且在运动F,毛细管向下且水平(沿与用于形成第一折叠部的方向相反的方向)被移动以形成第二折叠部。参照图8至9A如上所述,引线然后被扯断以从形成的导电凸块分离出引线。
参照图17B,运动A至F与按照图17A的以上说明的运动是相同的。在运动G,毛细管被升高,且在运动H,毛细管被降低并水平移动以形成引线的第三折叠部。参照图9B至11如上所述,引线然后被扯断,以从形成的导电凸块分离出引线。
虽然已经参照间接式针脚接合(stand-off stitch bond)类型的线圈说明了本发明(见图12至14),但是仍认为导电凸块可被用于多种不同线圈。例如,认为根据本发明的导电凸块可定位在第一接合部位和第二接合部位这两者之一或这两者上。
此外,在特定应用(例如,由于间隙问题等)中,可以期望(1)将具有引线的特定数量折叠部的第一导电凸块定位在第一接合部位上,且(2)将具有引线的特定数量折叠部的第二导电凸块定位在第二接合部位上。由于期望定制线圈,第一与第二导电凸块的每一个的引线的折叠部的数量可以彼此不相同。
本发明的引线接合技术可在多种替代介质中实现。例如,所述技术可作为软件被安装在现有计算机系统/服务器(与引线接合机器相连使用或整合的计算机系统)上。此外,所述技术可从计算机可读载体(例如固态存储器、光盘、磁盘、无线电频率承载介质、音频承载介质等)操作,所述计算机可读载体包括与引线接合技术相关的计算机指令(例如,计算机程序指令)。
虽然本发明参照具体实施例在此示出并说明,但是本发明旨在不限于已示出的细节。而且,在本权利要求相等同的范围内以及不脱离本发明的各种改进可被详细实现。
Claims (22)
1.一种利用引线接合机形成导电凸块的方法,该方法包括如下步骤:
(a)在半导体元件的接触垫上沉积无空气球凸块;
(b)在所沉积的无空气球凸块上形成引线的第一折叠部;并且
(c)在所述引线的第一折叠部上形成引线的第二折叠部。
2.根据权利要求1所述的方法,其特征在于,步骤(b)包括沿第一方向形成所述第一折叠部,而步骤(c)包括沿第二方向形成所述第二折叠部,所述第二方向与所述第一方向大致相反。
3.根据权利要求1所述的方法,其特征在于,每个所述无空气球凸块、引线的第一折叠部、以及引线的第二折叠部是同一段引线的每个部件,并且在形成导电凸块的方法的过程中,它们仍互连。
4.根据权利要求1所述的方法,其特征在于,还包括(d)在引线的第二折叠部上形成引线的第三折叠部。
5.根据权利要求1所述的方法,其特征在于,还包括(d)以一个在另一个之上的方式形成引线的附加的折叠部,这是从在引线的第二折叠部上形成引线的第三折叠部开始的。
6.根据权利要求1所述的方法,其特征在于,所述第一折叠部或所述第二折叠部中的至少一个被形成为具有延伸超过所沉积的无空气球凸块的投影区的宽度。
7.一种利用引线接合机在第一接合部位与第二接合部位之间接合引线的方法,所述方法包括以下步骤:
(a)在第二接合部位形成导电凸块,形成导电凸块的步骤包括:
(1)在半导体元件的接触垫上沉积无空气球凸块;
(2)在所沉积的无空气球凸块上形成引线的第一折叠部;并且
(3)在所述第一折叠部上形成引线的第二折叠部;以及
(b)在所述第一接合部位与所形成的导电凸块之间延伸一段长度的引线。
8.根据权利要求7所述的方法,其特征在于,步骤(2)包括沿第一方向形成所述第一折叠部,而步骤(3)包括沿第二方向形成所述第二折叠部,而第二方向与第一方向大致相反。
9.根据权利要求7所述的方法,其特征在于,每个所述无空气球凸块、引线的第一折叠部、以及引线的第二折叠部是同一段引线的每个部件,并且在形成导电凸块的方法的过程中,它们仍互连。
10.根据权利要求7所述的方法,其特征在于,步骤(a)还包括(4)在引线的第二折叠部上形成引线的第三折叠部。
11.根据权利要求7所述的方法,其特征在于,步骤(a)还包括(4)以一个在另一个之上的方式形成引线的附加的折叠部,这是从在引线的第二折叠部上形成引线的第三折叠部开始的。
12.根据权利要求7所述的方法,其特征在于,所述第一折叠部或所述第二折叠部中的至少一个被形成为具有延伸超过所沉积的无空气球凸块的投影区的宽度。
13.一种导电凸块,包括:
一段长度的引线的无空气球凸块部;
所述无空气球凸块部上的引线的第一折叠部;以及
所述引线的第一折叠部上的引线的第二折叠部。
14.根据权利要求13所述的导电凸块,其特征在于,所述无空气球凸块部、所述引线的第一折叠部、以及所述引线的第二折叠部分别彼此相互一体形成。
15.根据权利要求13所述的导电凸块,其特征在于,还包括所述引线的第二折叠部上的引线的第三折叠部。
16.根据权利要求13所述的导电凸块,其特征在于,还包括以一个在另一个之上方式的引线的附加的折叠部,其包括位于引线的第二折叠部上的引线的第三折叠部。
17.根据权利要求13所述的导电凸块,其特征在于,所述第一折叠部或所述第二折叠部中的至少一个被形成为具有延伸超过所沉积的无空气球凸块的投影区的宽度。
18 一种在第一接合部位与第二接合部位之间提供电互连的线圈,所述线圈包括:
(a)位于所述第二接合部位上的导电凸块,所述导电凸块包括一段长度的引线的无空气球凸块部、所述无空气球凸块部上的引线的第一折叠部;以及所述引线的第一折叠部上的引线的第二折叠部;以及
(b)在所述第一接合部位与所述导电凸块之间延伸的一段长度的引线。
19.根据权利要求18所述的线圈,其特征在于,所述无空气球凸块部、所述引线的第一折叠部、以及所述引线的第二折叠部分别彼此相互一体形成。
20.根据权利要求18所述的线圈,其特征在于,所述导电凸块还包括所述引线的第二折叠部上的引线的第三折叠部。
21.根据权利要求18所述的线圈,其特征在于,所述导电凸块还包括以一个在另一个之上方式的引线的附加的折叠部,其包括位于引线的第二折叠部上的引线的第三折叠部。
22.根据权利要求18所述的线圈,其特征在于,所述第一折叠部或所述第二折叠部中的至少一个被形成为具有延伸超过所沉积的无空气球凸块的投影区的宽度。
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US8168458B2 (en) * | 2008-12-08 | 2012-05-01 | Stats Chippac, Ltd. | Semiconductor device and method of forming bond wires and stud bumps in recessed region of peripheral area around the device for electrical interconnection to other devices |
JP4787374B2 (ja) * | 2010-01-27 | 2011-10-05 | 株式会社新川 | 半導体装置の製造方法並びにワイヤボンディング装置 |
DE102010055623A1 (de) * | 2010-12-22 | 2012-06-28 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement und Verfahren zu dessen Herstellung |
DE102015219183B4 (de) | 2015-10-05 | 2019-06-06 | Infineon Technologies Ag | Leistungshalbleiterbauelement, Halbleitermodul, Verfahren zum Verarbeiten eines Leistungshalbleiterbauelements |
KR102443487B1 (ko) * | 2015-12-17 | 2022-09-16 | 삼성전자주식회사 | 반도체 장치의 강화된 강성을 갖는 전기적 연결부 및 그 형성방법 |
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US5014111A (en) * | 1987-12-08 | 1991-05-07 | Matsushita Electric Industrial Co., Ltd. | Electrical contact bump and a package provided with the same |
US5172851A (en) * | 1990-09-20 | 1992-12-22 | Matsushita Electronics Corporation | Method of forming a bump electrode and manufacturing a resin-encapsulated semiconductor device |
US5205463A (en) * | 1992-06-05 | 1993-04-27 | Kulicke And Soffa Investments, Inc. | Method of making constant clearance flat link fine wire interconnections |
US5485949A (en) * | 1993-04-30 | 1996-01-23 | Matsushita Electric Industrial Co., Ltd. | Capillary for a wire bonding apparatus and a method for forming an electric connection bump using the capillary |
JPH08186117A (ja) * | 1994-12-28 | 1996-07-16 | Matsushita Electric Ind Co Ltd | ワイヤボンディング装置用キャピラリーとバンプの形成方法 |
JP3349886B2 (ja) * | 1996-04-18 | 2002-11-25 | 松下電器産業株式会社 | 半導体素子の2段突起形状バンプの形成方法 |
EP1158578B1 (en) * | 1996-10-01 | 2004-06-30 | Matsushita Electric Industrial Co., Ltd. | Integrated circuit or circuit board with bump electrode and manufacturing method thereof |
JP3344235B2 (ja) * | 1996-10-07 | 2002-11-11 | 株式会社デンソー | ワイヤボンディング方法 |
US6062462A (en) * | 1997-08-12 | 2000-05-16 | Kulicke And Soffa Investments, Inc. | Apparatus and method for making predetermined fine wire ball sizes |
US6156990A (en) * | 1998-06-22 | 2000-12-05 | Kulicke & Soffa Industries, Inc. | Long-wearing impervious conductive wire clamp |
JP4088015B2 (ja) * | 2000-03-24 | 2008-05-21 | 株式会社新川 | 湾曲状ワイヤの形成方法 |
JP3913134B2 (ja) * | 2002-08-08 | 2007-05-09 | 株式会社カイジョー | バンプの形成方法及びバンプ |
JP2002280414A (ja) * | 2001-03-22 | 2002-09-27 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP3573133B2 (ja) * | 2002-02-19 | 2004-10-06 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、回路基板並びに電子機器 |
US7229906B2 (en) * | 2002-09-19 | 2007-06-12 | Kulicke And Soffa Industries, Inc. | Method and apparatus for forming bumps for semiconductor interconnections using a wire bonding machine |
JP2004172477A (ja) * | 2002-11-21 | 2004-06-17 | Kaijo Corp | ワイヤループ形状、そのワイヤループ形状を備えた半導体装置、ワイヤボンディング方法及び半導体製造装置 |
US7347352B2 (en) * | 2003-11-26 | 2008-03-25 | Kulicke And Soffa Industries, Inc. | Low loop height ball bonding method and apparatus |
US7074256B2 (en) * | 2004-05-13 | 2006-07-11 | Battelle Energy Alliance, Llc | Phosphazene membranes for gas separations |
US7188759B2 (en) * | 2004-09-08 | 2007-03-13 | Kulicke And Soffa Industries, Inc. | Methods for forming conductive bumps and wire loops |
US7464854B2 (en) * | 2005-01-25 | 2008-12-16 | Kulicke And Soffa Industries, Inc. | Method and apparatus for forming a low profile wire loop |
-
2006
- 2006-10-18 US US11/917,115 patent/US20100186991A1/en not_active Abandoned
- 2006-10-18 WO PCT/US2006/040886 patent/WO2008048262A1/en active Application Filing
- 2006-10-18 CN CNA2006800556302A patent/CN101505905A/zh active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102290391A (zh) * | 2010-06-18 | 2011-12-21 | 株式会社东芝 | 半导体器件及其制造方法和制造装置 |
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US20100186991A1 (en) | 2010-07-29 |
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