CN101459176B - 半导体器件 - Google Patents

半导体器件 Download PDF

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Publication number
CN101459176B
CN101459176B CN200810187029XA CN200810187029A CN101459176B CN 101459176 B CN101459176 B CN 101459176B CN 200810187029X A CN200810187029X A CN 200810187029XA CN 200810187029 A CN200810187029 A CN 200810187029A CN 101459176 B CN101459176 B CN 101459176B
Authority
CN
China
Prior art keywords
drain region
region
semiconductor device
esd protection
pass transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN200810187029XA
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English (en)
Chinese (zh)
Other versions
CN101459176A (zh
Inventor
鹰巢博昭
山本祐广
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ablic Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Publication of CN101459176A publication Critical patent/CN101459176A/zh
Application granted granted Critical
Publication of CN101459176B publication Critical patent/CN101459176B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/519Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/013Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0149Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/923Bond pads having multiple stacked layers
    • H10W72/9232Bond pads having multiple stacked layers with additional elements interposed between layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/934Cross-sectional shape, i.e. in side view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/981Auxiliary members, e.g. spacers
    • H10W72/983Reinforcing structures, e.g. collars

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
CN200810187029XA 2007-12-12 2008-12-12 半导体器件 Expired - Fee Related CN101459176B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007320973 2007-12-12
JP2007320973A JP2009147001A (ja) 2007-12-12 2007-12-12 半導体装置
JP2007-320973 2007-12-12

Publications (2)

Publication Number Publication Date
CN101459176A CN101459176A (zh) 2009-06-17
CN101459176B true CN101459176B (zh) 2013-01-23

Family

ID=40752066

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200810187029XA Expired - Fee Related CN101459176B (zh) 2007-12-12 2008-12-12 半导体器件

Country Status (4)

Country Link
US (1) US7898035B2 (https=)
JP (1) JP2009147001A (https=)
KR (1) KR101489003B1 (https=)
CN (1) CN101459176B (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009147001A (ja) * 2007-12-12 2009-07-02 Seiko Instruments Inc 半導体装置
US8378422B2 (en) * 2009-02-06 2013-02-19 Taiwan Semiconductor Manufacturing Company, Ltd. Electrostatic discharge protection device comprising a plurality of highly doped areas within a well
JP5546191B2 (ja) * 2009-09-25 2014-07-09 セイコーインスツル株式会社 半導体装置
JP2011071329A (ja) * 2009-09-25 2011-04-07 Seiko Instruments Inc 半導体装置
US12396267B2 (en) * 2023-02-02 2025-08-19 Vanguard International Semiconductor Corporation Semiconductor device
CN116169128A (zh) * 2023-03-27 2023-05-26 上海泰矽微电子有限公司 一种静电保护装置和芯片

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5910675A (en) * 1995-12-14 1999-06-08 Nec Corporation Semiconductor device and method of making the same

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2642000B2 (ja) * 1991-05-21 1997-08-20 日本電気アイシーマイコンシステム株式会社 Mos集積回路装置
JP3203831B2 (ja) * 1992-10-23 2001-08-27 ソニー株式会社 静電破壊保護トランジスタ
JP2003289104A (ja) * 2002-03-28 2003-10-10 Ricoh Co Ltd 半導体装置の保護回路及び半導体装置
JP2005019452A (ja) * 2003-06-23 2005-01-20 Toshiba Corp 半導体装置
US6940131B2 (en) * 2003-06-30 2005-09-06 Texas Instruments Incorporated MOS ESD CDM clamp with integral substrate injection guardring and method for fabrication
JP4593094B2 (ja) * 2003-08-21 2010-12-08 日本電気株式会社 液晶表示装置及びその製造方法
KR20050035687A (ko) * 2003-10-14 2005-04-19 삼성전자주식회사 정전기 방전 보호소자 및 그의 제조하는 방법
US6943069B2 (en) * 2003-10-14 2005-09-13 Semiconductor Components Industries, L.L.C. Power system inhibit method and device and structure therefor
US20050224883A1 (en) * 2004-04-06 2005-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Circuit design for increasing charge device model immunity
US7397089B2 (en) * 2005-08-10 2008-07-08 Skyworks Solutions, Inc. ESD protection structure using contact-via chains as ballast resistors
JP5586819B2 (ja) * 2006-04-06 2014-09-10 ピーエスフォー ルクスコ エスエイアールエル 半導体装置
JP2009147001A (ja) * 2007-12-12 2009-07-02 Seiko Instruments Inc 半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5910675A (en) * 1995-12-14 1999-06-08 Nec Corporation Semiconductor device and method of making the same

Also Published As

Publication number Publication date
KR101489003B1 (ko) 2015-02-02
US20090152633A1 (en) 2009-06-18
CN101459176A (zh) 2009-06-17
JP2009147001A (ja) 2009-07-02
KR20090063149A (ko) 2009-06-17
US7898035B2 (en) 2011-03-01

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C06 Publication
PB01 Publication
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SE01 Entry into force of request for substantive examination
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GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20160323

Address after: Chiba County, Japan

Patentee after: SEIKO INSTR INC

Address before: Chiba, Chiba, Japan

Patentee before: Seiko Instruments Inc.

CP01 Change in the name or title of a patent holder
CP01 Change in the name or title of a patent holder

Address after: Chiba County, Japan

Patentee after: EPPs Lingke Co. Ltd.

Address before: Chiba County, Japan

Patentee before: SEIKO INSTR INC

CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130123

Termination date: 20201212