CN101432877B - 具有鳍片的半导体器件的形成方法及其结构 - Google Patents

具有鳍片的半导体器件的形成方法及其结构 Download PDF

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Publication number
CN101432877B
CN101432877B CN200780015277XA CN200780015277A CN101432877B CN 101432877 B CN101432877 B CN 101432877B CN 200780015277X A CN200780015277X A CN 200780015277XA CN 200780015277 A CN200780015277 A CN 200780015277A CN 101432877 B CN101432877 B CN 101432877B
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China
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layer
passivation layer
gate
opening
fin
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CN200780015277XA
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Chinese (zh)
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CN101432877A (zh
Inventor
M·K·奥罗斯基
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NXP USA Inc
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Freescale Semiconductor Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers

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  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
CN200780015277XA 2006-04-27 2007-03-14 具有鳍片的半导体器件的形成方法及其结构 Active CN101432877B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/380,530 US7442590B2 (en) 2006-04-27 2006-04-27 Method for forming a semiconductor device having a fin and structure thereof
US11/380,530 2006-04-27
PCT/US2007/063966 WO2007127533A2 (en) 2006-04-27 2007-03-14 Method for forming a semiconductor device having a fin and structure thereof

Publications (2)

Publication Number Publication Date
CN101432877A CN101432877A (zh) 2009-05-13
CN101432877B true CN101432877B (zh) 2011-09-28

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CN200780015277XA Active CN101432877B (zh) 2006-04-27 2007-03-14 具有鳍片的半导体器件的形成方法及其结构

Country Status (6)

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US (1) US7442590B2 (enExample)
JP (1) JP5208918B2 (enExample)
KR (1) KR20090005066A (enExample)
CN (1) CN101432877B (enExample)
TW (1) TWI404206B (enExample)
WO (1) WO2007127533A2 (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6267958B1 (en) 1995-07-27 2001-07-31 Genentech, Inc. Protein formulation
US8202780B2 (en) * 2009-07-31 2012-06-19 International Business Machines Corporation Method for manufacturing a FinFET device comprising a mask to define a gate perimeter and another mask to define fin regions
JP5569243B2 (ja) * 2010-08-09 2014-08-13 ソニー株式会社 半導体装置及びその製造方法
US8901665B2 (en) * 2011-12-22 2014-12-02 Taiwan Semiconductor Manufacturing Company, Ltd. Gate structure for semiconductor device
US8766363B2 (en) 2012-11-07 2014-07-01 International Business Machines Corporation Method and structure for forming a localized SOI finFET
US8987823B2 (en) 2012-11-07 2015-03-24 International Business Machines Corporation Method and structure for forming a localized SOI finFET
US20140167162A1 (en) 2012-12-13 2014-06-19 International Business Machines Corporation Finfet with merge-free fins
US8981496B2 (en) * 2013-02-27 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Metal gate and gate contact structure for FinFET
US9018054B2 (en) 2013-03-15 2015-04-28 Applied Materials, Inc. Metal gate structures for field effect transistors and method of fabrication
US8969155B2 (en) 2013-05-10 2015-03-03 International Business Machines Corporation Fin structure with varying isolation thickness
US9287372B2 (en) * 2013-12-27 2016-03-15 Taiwan Semiconductor Manufacturing Company Limited Method of forming trench on FinFET and FinFET thereof
US9679985B1 (en) * 2016-06-20 2017-06-13 Globalfoundries Inc. Devices and methods of improving device performance through gate cut last process
CN109427664B (zh) * 2017-08-24 2021-08-06 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
US11973143B2 (en) 2019-03-28 2024-04-30 Intel Corporation Source or drain structures for germanium N-channel devices

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6855989B1 (en) * 2003-10-01 2005-02-15 Advanced Micro Devices, Inc. Damascene finfet gate with selective metal interdiffusion
US6855582B1 (en) * 2003-06-12 2005-02-15 Advanced Micro Devices, Inc. FinFET gate formation using reverse trim and oxide polish

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4044276B2 (ja) * 2000-09-28 2008-02-06 株式会社東芝 半導体装置及びその製造方法
US6800905B2 (en) * 2001-12-14 2004-10-05 International Business Machines Corporation Implanted asymmetric doped polysilicon gate FinFET
US6803631B2 (en) * 2003-01-23 2004-10-12 Advanced Micro Devices, Inc. Strained channel finfet
US6951783B2 (en) * 2003-10-28 2005-10-04 Freescale Semiconductor, Inc. Confined spacers for double gate transistor semiconductor fabrication process
US7041542B2 (en) * 2004-01-12 2006-05-09 Advanced Micro Devices, Inc. Damascene tri-gate FinFET
US6936516B1 (en) * 2004-01-12 2005-08-30 Advanced Micro Devices, Inc. Replacement gate strained silicon finFET process
JP4796329B2 (ja) * 2004-05-25 2011-10-19 三星電子株式会社 マルチ−ブリッジチャンネル型ｍｏｓトランジスタの製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6855582B1 (en) * 2003-06-12 2005-02-15 Advanced Micro Devices, Inc. FinFET gate formation using reverse trim and oxide polish
US6855989B1 (en) * 2003-10-01 2005-02-15 Advanced Micro Devices, Inc. Damascene finfet gate with selective metal interdiffusion

Also Published As

Publication number Publication date
JP2009535820A (ja) 2009-10-01
TWI404206B (zh) 2013-08-01
WO2007127533A3 (en) 2008-06-26
CN101432877A (zh) 2009-05-13
US20070254435A1 (en) 2007-11-01
TW200742070A (en) 2007-11-01
JP5208918B2 (ja) 2013-06-12
KR20090005066A (ko) 2009-01-12
WO2007127533A2 (en) 2007-11-08
US7442590B2 (en) 2008-10-28

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Address after: Texas in the United States

Patentee after: NXP America Co Ltd

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Patentee before: Fisical Semiconductor Inc.

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