CN101392896A - 发光二极管 - Google Patents

发光二极管 Download PDF

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CN101392896A
CN101392896A CNA2007102017967A CN200710201796A CN101392896A CN 101392896 A CN101392896 A CN 101392896A CN A2007102017967 A CNA2007102017967 A CN A2007102017967A CN 200710201796 A CN200710201796 A CN 200710201796A CN 101392896 A CN101392896 A CN 101392896A
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emitting diode
light
light emitting
backlight unit
auxiliary element
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王君伟
徐弘光
江文章
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Foxsemicon Integrated Technology Shanghai Inc
Foxsemicon Integrated Technology Inc
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Foxsemicon Integrated Technology Shanghai Inc
Foxsemicon Integrated Technology Inc
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Priority to US12/168,783 priority patent/US7763896B2/en
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    • H—ELECTRICITY
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    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12032—Schottky diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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Abstract

本发明涉及一种发光二极管，所述发光二极管包括一基板、一发光二极管芯片及一透明封装体，所述发光二极管芯片设置于所述基板上，所述透明封装体用于密封所述发光二极管芯片，所述基板开设一收容孔以容纳一辅助元件。所述发光二极管通过于基板上开设收容孔以容纳辅助元件，一方面，可利用辅助元件扩充发光二极管的使用功能，另一方面，可避免辅助元件吸收发光二极管芯片发出的光造成发光二极管的发光效率降低的现象。

Description

发光二极管
技术领域
本发明涉及一种发光二极管。
背景技术
发光二极管(Light Emitting Diode，LED)是一种固态半导体发光元件，其利用PN结(PN junction)内分离的两种载子，即带负电的电子与带正电的电洞相互结合并释放光子而发光工作。发光二极管具有发光效率高、体积小、寿命长、污染低等特性，于照明、背光及显示等领域具有广阔的应用前景。发光二极管的研究可参阅Rong-Ting Huang等人在1998年IEEE Transactions on Electron Devices上发表的论文Design and fabrication ofAlGaInP LED array with integrated GaAs decode circuits。
发光二极管内通常设置辅助元件，如齐纳二极管(zener diode)等以扩充其使用功能，如增加其实用性及使用过程中的稳定性。然而，现有的齐纳二极管等辅助元件，其表面通常设置为黑色以利于导热，因此在发光二极管内设置所述辅助元件以扩充发光二极管使用功能的同时，其不可避免地因为辅助元件产生吸光作用而导致发光二极管的发光效率降低。
有鉴于此，提供一种可在不降低发光二极管发光效率的前提下扩充发光二极管使用功能的发光二极管实为必要。
发明内容
下面将以实施例说明一种发光二极管，其可在不降低发光二极管发光效率的前提下扩充发光二极管的使用功能。
一种发光二极管，其包括一基板、一发光二极管芯片及一透明封装体，所述发光二极管芯片设置于所述基板上，所述透明封装体用于密封所述发光二极管芯片，其特征在于，所述基板开设一收容孔以容纳一辅助元件。
相对于现有技术，所述发光二极管通过于基板上开设收容孔以容纳辅助元件，一方面，可利用辅助元件扩充发光二极管的使用功能，另一方面，可避免辅助元件吸收发光二极管芯片发出的光造成发光二极管的发光效率降低的现象。
附图说明
图1是本发明第一实施例提供的发光二极管的剖面示意图。
图2是本发明第二实施例提供的发光二极管的剖面示意图。
图3是本发明第三实施例提供的发光二极管的剖面示意图。
图4是本发明第四实施例提供的发光二极管的剖面示意图。
具体实施方式
下面将结合附图对本发明实施例作进一步的详细说明。
请参阅图1，本发明第一实施例提供的一种发光二极管10，其包括一基板11、一发光二极管芯片12及一透明封装体13。
所述基板11用于支撑发光二极管芯片12及透明封装体13，其也可用于导热，且可优选地以绝缘性良好的陶瓷材料制成。所述陶瓷材料可选择性地采用氧化铝(Al2O3)、氧化镁(MgO)、氮化铝(AlN)、氮化硼(BN)、氧化硅(SiO2)、氧化铍(Be0)等作为材质。当然，所述基板11也可采用其它绝缘性良好的材料，如玻璃纤维等制成。
所述基板11包括一第一表面11a，及一与所述第一表面11a相对设置的第二表面11b。所述发光二极管芯片12设置于所述第一表面11a上，从而可利用所述基板11将发光二极管芯片12发出的热量导出，以降低发光二极管芯片12的结温，并提高发光二极管10的发光效率及使用寿命。
所述透明封装体13覆盖于发光二极管芯片12上，用于密封并保护发光二极管芯片12。该透明封装体13可为圆弧形结构，且可采用环氧树脂或硅树脂等绝缘材料制成。本领域技术人员可以理解的是，该透明封装体13通常具有聚光作用，另外，其还可将发光二极管芯片12发出的光转换成其它颜色的光出射。例如，可在透明封装体13内加入黄色荧光粉，使发光二极管芯片12发出的蓝色光经过透明封装体13后，转换为白色光出射。
所述基板11上开设有一收容孔110以容纳一辅助元件100，在本实例中，所述辅助元件100为一防静电元件，其用于防止发光二极管芯片12由于静电作用而被反向击穿。该辅助元件100可选自齐纳二极管(zener diode)、肖特基二极管(Schottky Barrier Diode，SND)、硅基隧穿二极管(Si-based tunneling diode)等晶体管或是静电保护集成电路。另外，所述收容孔110内覆盖有保护胶14以保护所述辅助元件100。
由于齐纳二极管通常为黑色结构，其可吸收发光二极管芯片12发出的光而使发光二极管10的发光效率降低，因此，通过在基板11上开设收容孔110，并将辅助元件100设置于所述收容孔11内，既可利用辅助元件100以保护发光二极管10，又可防止辅助元件100吸收发光二极管芯片12发出的光而使发光二极管10的发光效率降低。优选地，所述收容孔110可开设于所述第一表面11a上且远离所述透明封装体13，即所述辅助元件100位于所述透明封装体13外。
所述发光二极管芯片12可与所述辅助元件100电性并联。具体地，所述第一表面11a及第二表面11b上分别形成一第一正电极151及一第一负电极152以作为发光二极管芯片12的正负电极，所述基板11开设两个第一导电孔15并分别填充导电胶，所述两个第一导电孔15分别对应于第一正电极151及第一负电极152开设，其分别用于导通两个第一正电极151及两个第一负电极152。对应地，所述收容孔110内及所述第二表面11b上分别形成一第二正电极161及一第二负电极162以作为辅助元件100的正负电极，所述基板11进一步开设两个第二导电孔16并分别填充导电胶，所述两个第二导电孔16分别对应于第二正电极161及第二负电极162开设，其分别用于导通两个第二正电极161及两个第二负电极162。
所述发光二极管芯片12与所述辅助元件100分别采用粘和(bonding)方式固连于所述基板11，并可进一步通过金属导线(未标示)分别电连接于第一正电极151、第一负电极152、第二正电极161及第二负电极162。通电时，所述发光二极管芯片12通过金属导线、第一正电极151、第一负电极152及第一导电孔15内填充的导电胶形成电性连接，而所述辅助元件100则通过金属导线、第二正电极161、第二负电极162及第二导电孔16内填充的导电胶形成电性连接。进一步地，可通过电性连接第二表面11b上形成的第一正电极151与第二正电极161，及电性连接第二表面11b上形成的第一负电极152与第二负电极162，使发光二极管芯片12与辅助元件100形成电性并联。
另外，还可在基板11上开设至少一导热孔17，并在所述导热孔17内填充导热胶，以进一步增强所述基板11的导热效果。由于所述发光二极管芯片12与所述基板11通过所述第一表面11a相接合且形成有一接合面11c，因此，为了增强导热效果，可在对应于接合面11c的位置处开设所述至少一导热孔17。
请参阅图2，本发明第二实施例提供的一种发光二极管20，其与本发明第一实施例提供的发光二极管10大致相同，差异在于：所述发光二极管20的发光二极管芯片22采用覆晶(FlipChip)方式，且通过金属凸块28，如锡球等与第一正电极251及第一负电极252相连接。
请参阅图3，本发明第三实施例提供的一种发光二极管30，与本发明第一实施例提供的发光二极管10大致相同，差异在于：所述发光二极管30的收容孔300开设于基板31内并与发光二极管芯片32相邻近，至少一导热孔37与收容孔310相贯通，辅助元件300为一温度感测器，其无需与发光二极管芯片32形成电性连接。
由于在本实例例中，所述辅助元件300为一温度感测器，因此，通过将至少一导热孔37与收容孔310相贯通并将所述辅助元件300设置于收容孔310内，可更精确地对发光二极管芯片32发光时所发出的热量进行实时监测。
请参阅图4，本发明第三实施例提供的一种发光二极管40，其与本发明第一实施例提供的发光二极管10大致相同，差异在于：发光二极管40的收容孔410为透明封装体43所覆盖，辅助元件400为一光强感测器，发光二极管芯片42与辅助元件400形成电性隔离。
由于在本实施例中，所述辅助元件400为光强感测器，因此，通过利用透明封装体43密封收容孔410，可使所述发光二极管芯片42发出的光顺利到达收容孔410所容纳的辅助元件400，从而便于所述辅助元件400对发光二极管芯片42发出的光的强度进行感测。另外，可以理解的是，为了配合辅助元件400对发光二极管芯片42发出的光的强度进行感测，所述收容孔410内覆盖的保护胶44应设置为透明。
本发明实施例提供的发光二极管10、20、30、40，其通过于基板11、21、31、41上开设收容孔110、210、310、410以分别容纳辅助元件100、200、300、400，一方面，可利用辅助元件100、200、300、400分别扩充发光二极管10、20、30、40的使用功能，另一方面，可避免辅助元件100、200、300、400分别吸收发光二极管芯片12、22、32、42发出的光造成发光二极管10、20、30、40的发光效率降低的现象。
可以理解的是，对于本领域的普通技术人员来说，可以根据本发明的技术构思做出其它各种对应的改变与变形，而所有这些改变与变形都应属于本发明权利要求的保护范围。

Claims (11)

  1. 【权利要求1】一种发光二极管，其包括一基板、一发光二极管芯片及一透明封装体，所述发光二极管芯片设置于所述基板上，所述透明封装体用于密封所述发光二极管芯片，其特征在于，所述基板开设一收容孔以容纳一辅助元件。
  2. 【权利要求2】如权利要求1所述的发光二极管，其特征在于，所述收容孔远离所述透明封装体设置，所述辅助元件为一防静电元件。
  3. 【权利要求3】如权利要求1所述的发光二极管，其特征在于，所述收容孔开设于所述基板内并与所述发光二极管芯片相邻近，所述辅助元件为一温度感测器。
  4. 【权利要求4】如权利要求1所述的发光二极管，其特征在于，所述收容孔为所述透明封装体所覆盖，所述辅助元件为一光强感测器。
  5. 【权利要求5】如权利要求1所述的发光二极管，其特征在于，所述基板包括至少一开设在其上的导热孔，所述导热孔内填充有导热胶。
  6. 【权利要求6】如权利要求1所述的发光二极管，其特征在于，所述基板为陶瓷材料所制成。
  7. 【权利要求7】如权利要求1所述的发光二极管，其特征在于，所述发光二极管芯片采用粘和方式或覆晶方式设置在所述基板上。
  8. 【权利要求8】如权利要求1所述的发光二极管，其特征在于，所述基板包括至少一开设在其上的导电孔，所述导电孔内填充有导电胶。
  9. 【权利要求9】如权利要求2所述的发光二极管，其特征在于，所述防静电元件选自齐纳二极管、肖特基二极管、硅基隧穿二极管或静电保护集成电路。
  10. 【权利要求10】如权利要求2所述的发光二极管，其特征在于，所述发光二极管芯片与所述辅助元件形成电性并联。
  11. 【权利要求11】如权利要求3所述的发光二极管，其特征在于，所述基板包括至少一开设在其上的导热孔，所述导热孔内填充有导热胶，所述至少一导热孔与所述收容孔相贯通。
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