CN101371345A - 高频用半导体器件 - Google Patents

高频用半导体器件 Download PDF

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CN101371345A
CN101371345A CNA2007800021896A CN200780002189A CN101371345A CN 101371345 A CN101371345 A CN 101371345A CN A2007800021896 A CNA2007800021896 A CN A2007800021896A CN 200780002189 A CN200780002189 A CN 200780002189A CN 101371345 A CN101371345 A CN 101371345A
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semiconductor device
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小林正树
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Toshiba Corp
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Abstract

在高频用半导体器件中，具备：在化合物半导体基板(11)上形成的工作区域(12)，在工作区域(12)上形成的栅极电极(13)，在工作区域(12)上夹着栅极电极(13)而交替形成的源极电极(14)及漏极电极(15)，用于连接外部电路的焊盘(18)、(19)，以及一个端部与源极电极(14)或漏极电极(15)在工作区域(12)以外上连接、另一个端部与焊盘(18)、(19)连接的空中桥(20)。

Description

高频用半导体器件
技术领域
本发明涉及例如用于高频下的场效应晶体管等高频用半导体器件。
背景技术
近年，随着倒相电路、开关元件的高功能化，在场效应晶体管(以下将场效应晶体管记载成FET)中要求更好的高频特性、以及可靠性的提高。
因此，可使用例如多指(Multi—Finger)型的FET。在多指型的FET中，多个栅极电极被形成为横穿工作区域。多个栅极电极与平行于工作区域所形成的栅极布线连接。另外，源极电极/漏极电极在工作区域上夹着栅极电极交替地形成。然后，分别通过源极/漏极布线与焊盘连接。这时，栅极布线与源极/漏极布线交叉了，为了将它们绝缘，在栅极布线上形成SiN等钝化膜。
但是，像这样，由于在介电常数高的SiN等钝化膜上直接形成布线，产生寄生电容。特别在高频区域中不能忽视。因此，为了减少该寄生电容，使用间隔着空隙而形成上层布线的空中桥结构(air bridge)(例如，参照专利文献1、2)。
在这样的空中桥结构中的源极/漏极电极，由在工作区域上依次层叠例如Pt/AuGe等欧姆接触、及例如Au/Pt/Ti等金属层而形成。然后，在这些金属层上整个面和形成源极/漏极焊盘的区域、及连接它们的区域上，形成例如Au的单层镀层，而形成空中桥等。
构成空中桥的Au比GaAs基板等化合物半导体基板的热膨胀率大。因此，由于温度从电镀形成温度(例如60℃)变动为通电温度(例如加速评价条件的225℃)、或非通电时的温度(例如常温25℃)，在空中桥中，产生热膨胀、热收缩。而后，由于这样的热膨胀、热收缩，在工作区域上发生压缩应力、牵引应力这样的大的内部应力。因此，存在发生输出特性劣化等不良情况、难以得到良好的可靠性的问题。
专利文献1：(日本)特开平9—8064号公报(图1等)。
专利文献2：(日本)特开2001—15526号公报(图1、【0004】等)。
发明内容
本发明的目的在于提供可抑制输出特性劣化等不良情况的发生、得到良好的可靠性的高频用半导体器件。
根据本发明的一个方式，提供一种高频用半导体器件，其特征在于，具备：在化合物半导体基板上形成的工作区域，在工作区域上形成的栅极电极，在工作区域上夹着栅极电极而交替形成的源极电极及漏极电极，用于连接外部电路的焊盘，以及一个端部与源极电极或漏极电极在工作区域以外上连接、另一个端部与焊盘连接的空中桥。
根据本发明的一个实施方式，在高频用半导体器件中，可防止输出特性劣化等不良情况的发生，得到良好的可靠性。
附图说明
图1是本发明的一个方式涉及的高频用半导体器件即多指型的FET元件的平面图。
图2是图1的沿A—A′的剖面图。
图3是本发明的一个方式涉及的高频用半导体器件即多指型的FET元件的剖面图。
图4是本发明的一个方式涉及的高频用半导体器件即多指型的FET元件的剖面图。
图5是本发明的一个方式涉及的高频用半导体器件即多指型的FET元件的部分剖面图。
图6是本发明的一个方式涉及的高频用半导体器件即多指型的FET元件的平面图。
具体实施方式
以下对本发明的实施方式，参照附图进行说明。
在图1中示出本实施方式的高频用半导体器件即多指型的FET元件的平面图，在图2中示出其沿A—A′的剖面图。如图所示，在化合物半导体基板11上形成工作区域12，在该工作区域12上形成多个栅极电极13。然后，在包括工作区域12上的区域，夹着栅极电极13交替地分别形成多个源极电极14、漏极电极15。源极电极14、漏极电极15由依次层叠例如Pt/AuGe等欧姆接触、及例如Au/Pt/Ti等金属层而构成。栅极电极13通过栅极布线16，与焊接在外部、用于输入输出信号的栅极焊盘17连接。
然后，在各栅极焊盘17两侧，形成源极焊盘18和漏极焊盘19，该漏极焊盘19为夹着工作区域在栅极焊盘17、源极焊盘18的相反侧形成。进而，不与栅极布线16或者SiN层等钝化膜(未图示)相接，形成连接源极电极14和源极焊盘18、连接漏极电极15和漏极焊盘19的空中桥20。空中桥20由例如单层镀金层形成。该空中桥20的终端20a设置成与工作区域12的端部12a上接近。在空中桥20中，与源极电极14及/或漏极电极15的连接部20b配置在工作区域12上以外。
通过这样的结构，在空中桥20中，即使是由于温度的变动、产生由与基板的热膨胀率的差造成的热膨胀、热收缩的情况，也可防止在工作区域12中的压缩应力、牵引应力这样大的内部应力的发生。因此，可防止输出特性劣化等不良情况，可得到良好的可靠性。
在本实施方式中，空中桥20的终端20a形成为与工作区域12的端部12a上接近，但未必需要一致。如图3中所示剖面图，也可以分离距离d。这是因为考虑位置对准精度以不使空中桥20和工作区域12重叠，d≤0.2μm左右即可。可防止由于未对准而与工作区域12重叠所造成的不良情况。但是，因为与芯片尺寸的增大有关，所以优选尽可能接近。
另外，如图4中所示部分剖面图，源极电极14(漏极电极15)的端部、和空中桥20的下表面的端部20c也可以不形成在同一平面上。进而，空中桥20和源极电极14的连接部的面积优选比空中桥的宽度方向上的剖面(B—B′剖面)的面积大。与漏极电极15的连接部分也是一样。这是为了抑制接触电阻和电场集中，防止因过电流造成的布线的熔断。
另外，优选空中桥是一体地通过镀金形成。但是，如图5中所示剖面图，与源极电极14的连接部分也可以由作为隔离的第1层20d和构成空中部分的第2层20e构成。与漏极电极15、源极焊盘18、漏极焊盘19的连接部分也是一样。另外，源极焊盘18、漏极焊盘19整个面也可以与空中桥一体地形成。
另外，在本实施方式中，源极电极14、漏极电极15被分别形成为突出到未形成工作区域12的区域上，但也可以不必两端突出。为了在工作区域12以外设置连接区域，如图6中所示平面图，至少向分别连接源极电极、漏极电极的源极焊盘18、漏极焊盘19侧突出即可。
另外，使用了GaAs作为化合物半导体基板，但并不限定于此，可使用GaN、SiC等化合物半导体基板。也可以使用外延晶片。另外，也可以在各电极的欧姆接触的下层，通过离子注入、高浓度外延层的形成等设置高浓度层。
这样的结构，除了HEMT(高电子迁移率晶体管：High Electron MobilityTransisitor)、还可适用于MESFET(金属半导体场效应晶体管：MetalSemiconductor Field Effect Transistor)、或MOSFET(金属氧化物半导体场效应晶体管：Metal oxide、semiconductor field effect transistor)等FET等中。
而且，本发明并不限于上述的实施方式。除此以外，在不脱离要旨的范围内可实施各种变形。

Claims (8)

1.一种高频用半导体器件，其特征在于，具备：
在化合物半导体基板上形成的工作区域；
在上述工作区域上形成的栅极电极；
在上述工作区域上夹着上述栅极电极而交替形成的源极电极及漏极电极；
用于与外部电路连接的焊盘；以及
一个端部与上述源极电极或上述漏极电极在上述工作区域以外上连接、另一个端部与上述焊盘连接的空中桥。
2.根据权利要求1记载的高频用半导体器件，其中，
上述空中桥具备Au层。
3.根据权利要求2记载的高频用半导体器件，其中，
上述Au层是单层镀层。
4.根据权利要求1记载的高频用半导体器件，其中，
上述空中桥与上述源极电极或上述漏极电极的连接部的终端，与上述工作区域的上述空中桥侧的端部上接近。
5.根据权利要求1记载的高频用半导体器件，其中，
上述空中桥与上述源极电极或上述漏极电极的连接部的终端，与上述工作区域的上述空中桥侧的端部上分离。
6.根据权利要求5记载的高频用半导体器件，其中，
上述空中桥与上述源极电极或上述漏极电极的连接部的终端，与上述工作区域的上述空中桥侧的端部的距离d是d≤0.2μm。
7.根据权利要求1记载的高频用半导体器件，其中，
上述空中桥与上述源极电极或上述漏极电极的连接面积，比上述空中桥的宽度方向上的剖面的面积大。
8.根据权利要求1记载的高频用半导体器件，其中，
上述化合物半导体基板是GaAs基板。
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