CN101351886B - 利用时钟和电源网格标准单元设计asic - Google Patents

利用时钟和电源网格标准单元设计asic Download PDF

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Publication number
CN101351886B
CN101351886B CN2006800499085A CN200680049908A CN101351886B CN 101351886 B CN101351886 B CN 101351886B CN 2006800499085 A CN2006800499085 A CN 2006800499085A CN 200680049908 A CN200680049908 A CN 200680049908A CN 101351886 B CN101351886 B CN 101351886B
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China
Prior art keywords
clock
grid
power supply
design unit
line
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Expired - Fee Related
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CN2006800499085A
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English (en)
Chinese (zh)
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CN101351886A (zh
Inventor
T·麦
B·米勒
S·科尔曼
S·派克
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Examine Vincent Zhi Cai Management Co
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Mosaid Technologies Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)
CN2006800499085A 2005-12-29 2006-12-22 利用时钟和电源网格标准单元设计asic Expired - Fee Related CN101351886B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/322,160 2005-12-29
US11/322,160 US7761831B2 (en) 2005-12-29 2005-12-29 ASIC design using clock and power grid standard cell
PCT/CA2006/002118 WO2007073599A1 (en) 2005-12-29 2006-12-22 Asic design using clock and power grid standard cell

Publications (2)

Publication Number Publication Date
CN101351886A CN101351886A (zh) 2009-01-21
CN101351886B true CN101351886B (zh) 2012-05-09

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CN2006800499085A Expired - Fee Related CN101351886B (zh) 2005-12-29 2006-12-22 利用时钟和电源网格标准单元设计asic

Country Status (7)

Country Link
US (1) US7761831B2 (https=)
EP (1) EP1974382A4 (https=)
JP (1) JP5171639B2 (https=)
KR (1) KR101328208B1 (https=)
CN (1) CN101351886B (https=)
TW (1) TWI444841B (https=)
WO (1) WO2007073599A1 (https=)

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US12159687B2 (en) 2021-07-20 2024-12-03 Changxin Memory Technologies, Inc. Clock circuit, memory and method for manufacturing semiconductor structure

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CN105550459B (zh) * 2015-12-29 2019-03-19 山东海量信息技术研究院 一种asic设计时钟网络提取系统
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12159687B2 (en) 2021-07-20 2024-12-03 Changxin Memory Technologies, Inc. Clock circuit, memory and method for manufacturing semiconductor structure

Also Published As

Publication number Publication date
KR101328208B1 (ko) 2013-11-14
JP2009521811A (ja) 2009-06-04
WO2007073599A1 (en) 2007-07-05
EP1974382A1 (en) 2008-10-01
JP5171639B2 (ja) 2013-03-27
TW200809560A (en) 2008-02-16
US7761831B2 (en) 2010-07-20
KR20080089597A (ko) 2008-10-07
US20070157144A1 (en) 2007-07-05
TWI444841B (zh) 2014-07-11
EP1974382A4 (en) 2010-11-03
CN101351886A (zh) 2009-01-21

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