CN101266999B - GaN dual heterogeneity node field effect transistor structure and its making method - Google Patents
GaN dual heterogeneity node field effect transistor structure and its making method Download PDFInfo
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- CN101266999B CN101266999B CN200710064383A CN200710064383A CN101266999B CN 101266999 B CN101266999 B CN 101266999B CN 200710064383 A CN200710064383 A CN 200710064383A CN 200710064383 A CN200710064383 A CN 200710064383A CN 101266999 B CN101266999 B CN 101266999B
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Abstract
A gallium nitride-based double heterojunction field effect transistor structure comprises a substrate, a low temperature gallium nitride layer or high temperature aluminum nitride layer formed on thesubstrate; a high insulation layer with unintentional-doped or doped gallium nitride; the high insulation layer with unintentional-doped or doped gallium nitride is formed on a low temperature galliumnucleation layer or a high temperature gallium nitride nucleation layer; a first aluminum nitride inserting layer, the first aluminum nitride inserting layer is formed on the high insulation layer with unintentional-doped or doped gallium nitride; a unintentional-doped gallium nitride channel layer, the unintentional-doped gallium nitride channel layer is formed on the first aluminum nitride inserting layer; a second aluminum nitride inserting layer, the second aluminum nitride inserting layer is formed on the unintentional-doped gallium nitride channel layer, an unintentional-doped or n-typedoped Al<SUB>x</SUB>In<SUB>y</SUB>Ga<SUB>z</SUB>N layer, the unintentional-doped or n-type doped Al<SUB>x</SUB>In<SUB>y</SUB>Ga<SUB>z</SUB>N layer is formed on the second aluminum nitride inserting layer.
Description
Technical field
The invention belongs to technical field of semiconductors, be meant a kind of GaN dual heterogeneity node field effect transistor structure that uses two aln inserting layers and preparation method thereof especially, can significantly improve the performance that transports of material two-dimensional electron gas, effectively the restriction channel electrons is leaked to barrier layer and resilient coating, suppresses the current collapse effect and improves raceway groove two-dimensional electron gas mobility.
Background technology
Gallium nitride is as typical case's representative of third generation wide bandgap semiconductor, have good thermal stability and chemical stability, high-breakdown-voltage, high electronics saturation drift velocity and good radiation resistance, be particularly suitable for preparing have high temperature, the HFET of high frequency, high-power and radiation-resisting performance.Gallium nitride radical heterojunction field effect transistor has broad application prospects in fields such as wireless telecommunications, space flight and aviation, radar, hyperthermia radiation environment, oil exploration, automation control, automotive electronics.
The operation principle of gallium nitride radical heterojunction field effect transistor: owing to form two kinds of material energy gap differences of heterojunction, potential well and potential barrier have been formed at gallium nitride and aluminium (indium) gallium nitrogen heterojunction boundary place, because the free electron that polarity effect or modulation doping produce, the gallium nitride layer that is accumulated in non-doping is near in the triangle potential well at interface, form two-dimensional electron gas, owing to make these electronics in the potential well and the ionized impurity apart in the potential barrier, greatly reduce Coulomb scattering, thereby significantly improved the mobility of material.After being developed into device,, under certain Dc bias, can amplify high-frequency microwave signal by the two-dimensional electron gas at gate electrode may command heterojunction boundary place.
Indium gallium nitrogen or gallium nitride raceway groove dual heterogeneity node field effect transistor structure are a kind of novel heterojunction field effect transistor structures that has application prospect, the triangle potential well of AlGaN/GaN single heterojunction structure is become the square potential well of AlGaN/ (In) GaN/AlGaN or AlGaN/InGaN/GaN structure, the conduction band that has increased between potential barrier and raceway groove is poor, improved the potential well degree of depth, can significantly improve the restriction of structure to two-dimensional electron gas, having reduced two-dimensional electron gas leaks to barrier layer and resilient coating from raceway groove, can reduce the low-frequency noise of HFET power device, suppress the current collapse effect, improve the stability and the reliability of HFET.
Before the present invention, in order to improve the barrier height of resilient coating, (indium) gallium nitrogen raceway groove dual heterogeneity node field effect transistor structure is grown in channel layer above the aluminum gallium nitride resilient coating usually, compare with the gallium nitride resilient coating, aluminum gallium nitride and substrate (sapphire, carborundum, silicon) exist bigger lattice mismatch between, being difficult to directly on substrate directly extension goes out high-quality aluminium and sows the nitrogen resilient coating, therefore need be below aluminium be sowed nitrogen layer at first the gallium nitride resilient coating of grow thick as transition zone, cause forming the additional conductive raceway groove easily, influence the performance of device at the interface of aluminum gallium nitride resilient coating and thick gallium nitride layer; Aluminum gallium nitride is a ternary alloy three-partalloy simultaneously, and crystal mass is relatively poor, and interface alloy disorder and roughness scattering meeting have a negative impact to the performance that transports of raceway groove two-dimensional electron gas.Therefore, existing at present two hetero-field effect transistor structures, introducing by the aluminum gallium nitride resilient coating, though improved the barrier height of resilient coating one side, strengthened the restriction of resilient coating to the raceway groove two-dimensional electron gas, but cause epitaxial growth difficulty more simultaneously, under state-of-the-art, be difficult to obtain high-quality (indium) gallium nitrogen raceway groove dual heterogeneity node field effect transistor structure material, this is to cause present dual heterogeneity node field effect transistor structure to fail to give full play to the major reason of this structural advantage, need further take measures dual heterogeneity node field effect transistor structure is carried out further optimal design.
Summary of the invention
First purpose of the present invention provides a kind of GaN dual heterogeneity node field effect transistor, has lower defect concentration and the crystal mass of Geng Gao.
Second purpose of the present invention provides a kind of GaN dual heterogeneity node field effect transistor, can more effectively limit channel electrons to resilient coating, barrier layer and surface leakage.
The 3rd purpose of the present invention provides a kind of GaN dual heterogeneity node field effect transistor, has higher two-dimensional electron gas and transports performance.
The 4th purpose of the present invention is that this structure can also effectively suppress the current collapse effect, improves the stability and the reliability of device;
The 5th purpose of the present invention provides a kind of GaN dual heterogeneity node field effect transistor and manufacture method, has the advantage that technology is reasonable, rate of finished products is high.
For achieving the above object, the invention provides a kind of GaN dual heterogeneity node field effect transistor structure, it is characterized in that, comprising:
One substrate;
One low temperature gallium nitride or high-temperature ammonolysis aluminium lamination, this low temperature gallium nitride or high-temperature ammonolysis aluminium lamination be produced on substrate above;
One non-have a mind to the doping or the doped gallium nitride resistive formation, this is non-have a mind to mix or the doped gallium nitride resistive formation be produced on low temperature gallium nitride or high-temperature ammonolysis aluminium nucleating layer above;
One aluminium nitride first inserts thin layer, this aluminium nitride first insert thin layer be produced on non-have a mind to mix or the doped gallium nitride resistive formation above;
One non-ly has a mind to doped gallium nitride base channel layer, this is non-have a mind to doped gallium nitride base channel layer be produced on aluminium nitride first insert thin layer above;
One aluminium nitride second inserts thin layer, this aluminium nitride second insert thin layer be produced on non-have a mind to doped gallium nitride base channel layer above;
One non-the doping intentionally or n type doped with Al
xIn
yGa
zThe N layer, this Al
xIn
yGa
zThe N layer be produced on aluminium nitride second insert thin layer above.
Wherein said substrate is Sapphire Substrate or carborundum or silicon substrate.
Wherein the thickness of low temperature gallium nitride or high-temperature ammonolysis aluminium lamination is 0.01-0.50 μ m, and the preferred value of low temperature gallium nitride layer is 0.03-0.30 μ m, and the preferred value of high-temperature ammonolysis aluminium lamination is 0.01-0.20 μ m.
Wherein non-thickness of having a mind to doping or doped gallium nitride resistive formation is 1-5 μ m.
The room temperature resistivity of wherein non-doping intentionally or doped gallium nitride resistive formation is greater than 1 * 106 Ω .cm, and preferred value is greater than 1 * 108 Ω .cm.
Wherein the thickness of the aluminium nitride first insertion thin layer is 0.3-5nm.
Wherein said non-doped gallium nitride base channel layer intentionally is a high mobility gallium nitride channel layer, or indium gallium nitrogen channel layer, or the indium nitride channel layer.
Wherein non-thickness of having a mind to doped gallium nitride base channel layer is 0.001-0.5 μ m, and the preferred value of high mobility gallium nitride layer is 0.03-0.5 μ m, and the preferred value of indium gallium nitrogen or nitride indium layer is 0.001-0.2 μ m.
Wherein said non-doped gallium nitride base channel layer intentionally is the non-high mobility gallium nitride of having a mind to mix, and the room temperature mobility is greater than 500cm
2/ Vs, preferred value is greater than 700cm
2/ Vs.
Wherein the thickness of the aluminium nitride second insertion thin layer is 0.3-5nm.
Al wherein
xIn
yGa
zThe N layer is that non-that have a mind to mix or n type mixes, and thickness is 10-50nm, x+y+z=1 wherein, 0＜x≤1,0≤y＜1,0≤z＜1.
The gallium aluminium nitrogen layer of non-that have a mind to mix or the n type doping when wherein the AlxInyGazN layer is y=0, thickness is 10-50nm, and the preferred value scope is 15-35nm, and al composition is between 0.05-0.5.
The invention provides a kind of manufacture method of GaN dual heterogeneity node field effect transistor, it is characterized in that, comprise the steps:
Step 1: select a substrate;
Step 2: growth one deck low temperature gallium nitride or high-temperature ammonolysis aluminium nucleating layer on substrate;
Step 3: growth is non-on low temperature gallium nitride or high-temperature ammonolysis aluminium nucleating layer has a mind to mix or the doped gallium nitride resistive formation;
Step 4: growing aluminum nitride first inserts thin layer on non-doping intentionally or doped gallium nitride resistive formation;
Step 5: insert the non-doped gallium nitride base channel layer intentionally of growth on the thin layer at aluminium nitride first;
Step 6: growing aluminum nitride second inserts thin layer on non-doped gallium nitride base channel layer intentionally;
Step 7: insert the Al non-doping intentionally of growth or that the n type mixes on the thin layer at aluminium nitride second at last
xIn
yGa
zThe N layer.
Wherein said substrate is Sapphire Substrate or carborundum or silicon substrate.
Wherein said method is metal-organic chemical vapor deposition equipment method, molecular beam epitaxy and vapour phase epitaxy, preferentially adopts the metal-organic chemical vapor deposition equipment method.
When wherein said nucleating layer was the low temperature gallium nitride, growth temperature was 500-600 ℃, and growth pressure is 53.34-80.01kPa, and growth thickness is 0.01-0.50 μ m, and preferred value is 0.03-0.30 μ m.
When wherein said nucleating layer was high-temperature ammonolysis aluminium, growth temperature was 800-1200 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 0.01-0.50 μ m, and preferred value is 0.01-0.20 μ m.
Wherein said non-growth temperature of having a mind to doping or doped gallium nitride resistive formation is 900-1100 ℃, and the preferred value scope is 1020-1100 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 1-5 μ m.
Wherein said non-growth rate of having a mind to doping or doped gallium nitride resistive formation is 3-5 μ m/h.
The room temperature resistivity of wherein said non-doping intentionally or doped gallium nitride resistive formation is greater than 1 * 106 Ω .cm, and preferred value is greater than 1 * 108 Ω .cm.
The growth temperature that wherein said aluminium nitride first inserts thin layer is between 850-1150 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 0.8-3nm.
Wherein saidly non-ly have a mind to doped gallium nitride base channel layer when being the high mobility gallium nitride, growth temperature is at 900-1100 ℃, and growth pressure is 40.00-80.00kPa, and growth thickness is 0.001-0.5 μ m, and preferred value is 0.03-0.30 μ m.
The growth rate of the wherein said non-high mobility gallium nitride channel layer of having a mind to mix is 2-3 μ m/h.
The room temperature mobility of the wherein said non-high mobility gallium nitride channel layer of having a mind to mix is greater than 500cm
2/ Vs, preferred value is greater than 700cm
2/ Vs.
Wherein saidly non-ly have a mind to doped gallium nitride base channel layer when being indium gallium nitrogen or indium nitride, growth temperature is at 500-900 ℃, and growth pressure is 6.67-40.00kPa, and growth thickness is 0.001-0.5 μ m, and preferred value is 0.001-0.2 μ m.
The growth temperature that wherein said aluminium nitride second inserts thin layer is between 850-1150 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 0.8-3nm.
Wherein said non-have a mind to doping or n type doped with Al
xIn
yGa
zN layer, growth temperature are between 850-1150 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 10-50nm.
Wherein said non-have a mind to doping or n type doped with Al
xIn
yGa
zThe N layer, the gallium aluminium nitrogen layer of non-that have a mind to mix or the n type doping during for y=0, growth temperature is between 850-1150 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 10-50nm, and the preferred value scope is 15-35nm, al composition is between 0.05-0.5.
The GaN dual heterogeneity node field effect transistor structure of the two aln inserting layers of use of the present invention, sow basic channel layer both direction up and down in nitrogenize, between gallium nitrate based channel layer and aluminium (indium) gallium nitrogen barrier layer, and between gallium nitrate based channel layer and the gallium nitride high resistant resilient coating, introduce aluminium nitride respectively and insert thin layer, form two hetero-field effect transistor structures, by accurate control growing condition, as temperature, pressure, V/III ratio, grow high-quality GaN dual heterogeneity node field effect transistor structure material.Two aluminium nitride insert the barrier height that thin layer can further improve the channel layer both sides, can better two-dimensional electron gas be limited within the channel layer.Specifically, first effect that aluminium nitride inserts thin layer is to utilize binary compound that channel electrons and multi-element compounds aluminium (indium) gallium nitrogen barrier layer are separated, and has reduced electron scattering, has further improved raceway groove two-dimensional electron gas mobility; Another effect that aluminium nitride inserts thin layer is to utilize the characteristics of its energy gap greater than gallium nitride, has effectively limited the leakage of electronics to aluminium (indium) gallium nitrogen barrier layer and gallium nitride resilient coating, can effectively suppress the current collapse effect.In addition, the aluminium nitride of introducing between gallium nitrate based channel layer and gallium nitride high resistant resilient coating first inserts thin layer, compare with the aluminum gallium nitride thick film that the traditional double hetero-field effect transistor is introduced between gallium nitrate based channel layer and gallium nitride high resistant resilient coating, lattice match influence to the material monolithic structure is very little, obtain high-quality pair of hetero-field effect transistor structural material easily, the possibility of having avoided the additional conductive raceway groove to form simultaneously.
Description of drawings
For further specifying content of the present invention, below in conjunction with embodiment the present invention is done a detailed description, wherein:
Fig. 1 is the typical structure schematic diagram of GaN dual heterogeneity node field effect transistor of the present invention;
Fig. 2 is another typical structure schematic diagram of GaN dual heterogeneity node field effect transistor of the present invention;
Fig. 3 is that the electron mobility of GaN dual heterogeneity node field effect transistor structure of the present invention and two-dimensional electron gas are with the variation of temperature curve.
Embodiment
The present invention is a kind of GaN dual heterogeneity node field effect transistor structure that uses two aln inserting layers, the characteristics of this structure are, sow basic channel layer both direction up and down in nitrogenize, between gallium nitrate based channel layer and aluminium (indium) gallium nitrogen barrier layer, and between gallium nitrate based channel layer and the gallium nitride high resistant resilient coating, introduce aluminium nitride respectively and insert thin layer, form two hetero-field effect transistor structures, by accurate control growing condition, as temperature, pressure, V/III ratio, grow high-quality GaN dual heterogeneity node field effect transistor structure material.Two aluminium nitride insert the barrier height that thin layer can further improve the channel layer both sides, can better two-dimensional electron gas be limited within the channel layer, effectively limited the leakage of electronics, can effectively suppress the current collapse effect to aluminium (indium) gallium nitrogen barrier layer and gallium nitride resilient coating.Aluminium nitride is a binary compound simultaneously, and channel electrons and multi-element compounds aluminium (indium) gallium nitrogen barrier layer are separated, and has reduced electron scattering, has further improved raceway groove two-dimensional electron gas mobility.When channel layer of the present invention was the high mobility gallium nitride layer, the crystal mass of channel layer further improved, and for two-dimensional electron gas provides a good passage, can improve raceway groove two-dimensional electron gas mobility more significantly.In addition, the aluminium nitride of introducing between gallium nitrate based channel layer and gallium nitride high resistant resilient coating first inserts thin layer, compare with the aluminum gallium nitride thick film that the traditional double hetero-field effect transistor is introduced between gallium nitrate based channel layer and gallium nitride high resistant resilient coating, lattice match influence to the material monolithic structure is very little, obtain high-quality pair of hetero-field effect transistor structural material easily, the possibility of having avoided the additional conductive raceway groove to form simultaneously.
See also illustrated in figures 1 and 2ly, the structure of a kind of GaN dual heterogeneity node field effect transistor of the present invention is characterized in that, comprising:
One substrate 10, these substrate 10 materials comprise Sapphire Substrate, carborundum and silicon substrate, also comprise other substrates that are fit to the gallium nitride radical heterojunction field effect transistor material epitaxy;
One low temperature gallium nitride or high-temperature ammonolysis aluminium nucleating layer 20, this low temperature gallium nitride or high-temperature ammonolysis aluminium nucleating layer 20 be produced on substrate 10 above, thickness is 0.01-0.50 μ m;
One non-have a mind to the doping or doped gallium nitride resistive formation 30, this is non-have a mind to mix or doped gallium nitride resistive formation 30 be produced on low temperature gallium nitride or high-temperature ammonolysis aluminium nucleating layer 20 above, thickness is 1-5 μ m;
The room temperature resistivity of this non-doping intentionally or doped gallium nitride resistive formation is greater than 1 * 106 Ω .cm, and preferred value is greater than 1 * 108 Ω .cm.
One aluminium nitride first inserts thin layer 40, this aluminium nitride insert thin layer 40 be produced on non-have a mind to mix or doped gallium nitride resistive formation 30 above, thickness is 0.3-5nm.
One non-have a mind to mix high mobility gallium nitride channel layer 50 or non-(indium) gallium nitrogen channel layer 50 ' that have a mind to mix, this is non-have a mind to doped gallium nitride base channel layer be produced on aluminium nitride first insert thin layer 40 above, thickness is 0.001-0.5 μ m;
This is non-has a mind to mix the room temperature mobility of high mobility gallium nitride layer 50 greater than 500cm
2/ Vs, preferred value is greater than 700cm
2/ Vs.
One aluminium nitride second inserts thin layer 60, this aluminium nitride second insert thin layer 60 be produced on non-have a mind to doped gallium nitride base channel layer 50 above, thickness is 0.8-3nm;
-non-has a mind to mix or n type doped with Al
xIn
yGa
zN layer 70, this Al
xIn
yGa
zN layer 70 be produced on aluminium nitride second insert thin layer 60 above, thickness is 10-50nm, x+y+z=1 wherein, 0＜x≤1,0≤y＜1,0≤z＜1.
This aluminium (indium) gallium nitrogen (AlxInyGazN) layer one preferable enforcement structure is the non-aluminum gallium nitride structure (y=0) doping or that the n type mixes of having a mind to, and thickness is 10-50nm, and the preferred value scope is 15-35nm, and al composition is between 0.05-0.5.
As required, can be on aluminium (indium) gallium nitrogen layer regrowth gallium nitride or aluminum gallium nitride or aluminium indium gallium nitrogen block layer, this layer can be non-have a mind to doping, n type or p type, thickness is 1-20nm.
Please consult illustrated in figures 1 and 2ly again, the manufacture method of a kind of GaN dual heterogeneity node field effect transistor of the present invention comprises the steps:
Selection-substrate 10, the material of this substrate 10 comprises Sapphire Substrate, carborundum and silicon substrate, also comprises other substrates that are fit to the gallium nitride radical heterojunction field effect transistor material epitaxy.
Adopt the metal-organic chemical vapor deposition equipment method, growth one deck low temperature gallium nitride or high-temperature ammonolysis aluminium nucleating layer 20 on substrate at first, when described nucleating layer 20 is the low temperature gallium nitride, growth temperature is 500-600 ℃, growth pressure is 53.34-80.01kPa, growth thickness is 0.01-0.50 μ m, and preferred value is 0.03-0.30 μ m; When described nucleating layer 20 was high-temperature ammonolysis aluminium, growth temperature was 800-1200 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 0.01-0.20 μ m;
Growth is non-on low temperature gallium nitride or high-temperature ammonolysis aluminium nucleating layer 20 then has a mind to mix or doped gallium nitride resistive formation 30, growth temperature is between 900-1100 ℃, the preferred value scope is 1020-1100 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 1-5 μ m;
This non-growth rate of having a mind to doping or doped gallium nitride resistive formation 30 is 3-5 μ m/h, and room temperature resistivity is greater than 1 * 106 Ω .cm, and preferred value is greater than 1 * 108 Ω .cm.
This non-doping intentionally or a kind of preferable high resistant generation type of doped gallium nitride resistive formation are involuntary doping high resistant gallium nitride layer, this layer is introduced lattice defect by growth conditionss such as comprehensive and accurate control growing temperature, growth pressure, III-V ratio, growth rate, carrier gas kind and flows, thereby forms the high resistant epitaxial layer of gallium nitride.
Growing aluminum nitride first inserts thin layer 40 on non-doping intentionally or doped gallium nitride resistive formation 30 then, and growth temperature is between 850-1150 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 0.3-5nm.
Change growth conditions, insert the non-high mobility gallium nitride channel layer 50 of having a mind to mix of growth on the thin layer 40 at aluminium nitride first, or non-(indium) gallium nitrogen channel layer 50 ' of having a mind to mix.
This is non-has a mind to mix the growth temperature of high mobility gallium nitride layer 50 between 900-1100 ℃, and growth pressure is 40.00-80.00kPa, and growth thickness is 0.001-0.5 μ m, and preferred value is 0.03-0.30 μ m;
This is non-, and have a mind to the to mix growth rate of high mobility gallium nitride layer 50 is 2-3 μ m/h.
This is non-has a mind to mix the room temperature mobility of high mobility gallium nitride layer 50 greater than 500cm
2/ Vs, preferred value is greater than 700cm
2/ Vs.
These non-high mobility gallium nitride layer 50 high mobilities of having a mind to mix realize that wait by comprehensive regulation growth temperature, growth pressure, III-V ratio, growth rate, carrier gas kind and flow and realize, wherein the growth pressure adjusting is a very important factor.
The growth temperature of this non-doped indium (gallium) nitrogen channel layer 50 ' intentionally is at 500-900 ℃, and growth pressure is 6.67-40.00kPa, and growth thickness is 0.001-0.5 μ m, and preferred value is 0.001-0.2 μ m.
Change growth conditions, at non-have a mind to mix high mobility gallium nitride layer 50 or non-doped indium (gallium) nitrogen channel layer intentionally 50 ' the last growing aluminum nitride second insertion thin layer 60, this aluminium nitride second inserts the growth temperature of thin layer 60 between 850-1150 ℃, growth pressure is 5.33-26.67kPa, and growth thickness is 0.8-3nm.
Insert the Al non-doping intentionally of growth or that the n type mixes on the thin layer 60 at aluminium nitride second at last
xIn
yGa
zN layer 70, growth temperature are between 850-1150 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 10-50nm.
This non-doping intentionally or n type doping A1
xIn
yGa
zN layer 70 comprises the non-aluminum gallium nitride structure (y=0) doping or that the n type mixes of having a mind to, and growth temperature is between 850-1150 ℃, growth pressure is 5.33-26.67kPa, growth thickness is 10-50nm, and the preferred value scope is 15-35nm, and al composition is between 0.05-0.5.
As required, can be on the component rank become aluminium (indium) gallium nitrogen layer 60 regrowth gallium nitride or aluminum gallium nitride or aluminium indium gallium nitrogen block layer, this layer can be non-doping, n type or p type intentionally, growth temperature is between 850-1150 ℃, growth pressure is 5.33-40.00kPa, and thickness is 1-20nm.
The concrete growth temperature of each grown layer of gallium nitride radical heterojunction field effect transistor structure of the present invention, growth pressure and growth thickness are as shown in table 1:
Table 1
The sample that specific embodiment structure shown in Figure 1 is obtained carries out test analysis, wherein sample substrate 10 is a Sapphire Substrate, nucleating layer 20 is the low temperature gallium nitride layer, and high resistant gallium nitride resilient coating 30 is the non-doping of having a mind to, and aluminium (indium) gallium nitrogen layer 70 is the non-gallium aluminium nitrogen layer of having a mind to mix.The test result proof has very high crystal mass and two-dimensional electron gas mobility with the gallium nitride radical heterojunction field effect transistor material that the method growth obtains.Alternating temperature ear test result suddenly proves that the room temperature two-dimensional electron gas mobility of this material is greater than 1900cm
2/ V.s, two-dimensional electron gas is greater than 10 * 1013/cm
2, the structure of being developed simultaneously has extraordinary restriction to channel electrons, two-dimensional electron gas remain unchanged substantially (Fig. 3) in whole Range of measuring temp.The atomic force microscope test result confirms that the surface roughness of this material 5 μ m * 5 μ m samples is 0.241nm.
The present invention has reduced technology difficulty, has reduced processing step, has obtained to have more high mobility and better the GaN dual heterogeneity node field effect transistor structure material of crystal mass; This material structure can significantly improve the performance that transports of material two-dimensional electron gas, more effectively limits channel electrons and leaks to resilient coating and barrier layer, thereby the current collapse effect is had good inhibition effect.Therefore, the present invention can significantly improve the performance of gallium nitrate based high temperature, high frequency, high power device and circuit.
Claims (13)
1. the manufacture method of a GaN dual heterogeneity node field effect transistor is characterized in that, comprises the steps:
Step 1: select a substrate;
Step 2: growth one deck low temperature gallium nitride or high-temperature ammonolysis aluminium nucleating layer on substrate, when this nucleating layer is the low temperature gallium nitride, growth temperature is 500-600 ℃, growth pressure is 53.34-80.01kPa, growth thickness is 0.01-0.50 μ m, and when this nucleating layer was high-temperature ammonolysis aluminium, growth temperature was 800-1200 ℃, growth pressure is 5.33-26.67kPa, and growth thickness is 0.01-0.50 μ m;
Step 3: growth is non-on low temperature gallium nitride or high-temperature ammonolysis aluminium nucleating layer has a mind to mix or the doped gallium nitride resistive formation, this non-growth temperature of having a mind to doping or doped gallium nitride resistive formation is 900-1100 ℃, growth pressure is 5.33-26.67kPa, and growth thickness is 1-5 μ m;
Step 4: growing aluminum nitride first inserts thin layer on non-doping intentionally or doped gallium nitride resistive formation;
Step 5: insert the non-doped gallium nitride base channel layer intentionally of growth on the thin layer at aluminium nitride first;
Step 6: growing aluminum nitride second inserts thin layer on non-doped gallium nitride base channel layer intentionally;
Step 7: insert the Al non-doping intentionally of growth or that the n type mixes on the thin layer at aluminium nitride second at last
xIn
yGa
zThe N layer.
2. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1 is characterized in that, wherein said substrate is Sapphire Substrate or carborundum or silicon substrate.
3. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1 is characterized in that, wherein said method is metal-organic chemical vapor deposition equipment method, molecular beam epitaxy and vapour phase epitaxy.
4. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1 is characterized in that, wherein said non-growth rate of having a mind to doping or doped gallium nitride resistive formation is 3-5 μ m/h.
5. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1 is characterized in that, the room temperature resistivity of wherein said non-doping intentionally or doped gallium nitride resistive formation is greater than 1 * 10
6Ω .cm.
6. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1, it is characterized in that, the growth temperature that wherein said aluminium nitride first inserts thin layer is between 850-1150 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 0.8-3nm.
7. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1, it is characterized in that, wherein saidly non-ly have a mind to doped gallium nitride base channel layer when being the high mobility gallium nitride, growth temperature is at 900-1100 ℃, growth pressure is 40.00-80.00kPa, and growth thickness is 0.001-0.5 μ m.
8. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1 is characterized in that, the growth rate of the wherein said non-high mobility gallium nitride channel layer of having a mind to mix is 2-3 μ m/h.
9. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 7 is characterized in that, the room temperature mobility of the wherein said non-high mobility gallium nitride channel layer of having a mind to mix is greater than 500cm
2/ Vs.
10. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1, it is characterized in that, wherein saidly non-ly have a mind to doped gallium nitride base channel layer when being indium gallium nitrogen or indium nitride, growth temperature is at 500-900 ℃, growth pressure is 6.67-40.00kPa, and growth thickness is 0.001-0.5 μ m.
11. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1, it is characterized in that, the growth temperature that wherein said aluminium nitride second inserts thin layer is between 850-1150 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 0.8-3nm.
12. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1 is characterized in that, wherein said non-have a mind to doping or n type doped with Al
xIn
yGa
zN layer, growth temperature are between 850-1150 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 10-50nm.
13. the manufacture method of GaN dual heterogeneity node field effect transistor according to claim 1 is characterized in that, wherein said non-have a mind to doping or n type doped with Al
xIn
yGa
zThe N layer, the gallium aluminium nitrogen layer of non-that have a mind to mix or the n type doping during for y=0, growth temperature is between 850-1150 ℃, and growth pressure is 5.33-26.67kPa, and growth thickness is 10-50nm, and al composition is between 0.05-0.5.
Priority Applications (1)
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| CN102842613B (en) * | 2012-09-18 | 2016-01-13 | 中国科学院半导体研究所 | Double-heterostructure gallium nitride based transistor structure with high electron mobility and manufacture method |
| CN102931230B (en) * | 2012-11-19 | 2015-11-18 | 中国科学院半导体研究所 | Aluminum gallium nitride does the gallium nitrate based HEMT of double heterojunction and the manufacture method of resistive formation |
| EP3285302B1 (en) * | 2013-02-15 | 2019-09-11 | AZUR SPACE Solar Power GmbH | Layer structure for a group-iii-nitride normally-off transistor |
| CN105390532A (en) * | 2015-10-28 | 2016-03-09 | 大连理工大学 | Unintentionally doped high resistance GaN film with InGaN insertion layer and preparation method thereof |
| CN105405871A (en) * | 2015-10-30 | 2016-03-16 | 江苏能华微电子科技发展有限公司 | Epitaxial wafer for diode and preparation method thereof |
| CN105390533A (en) * | 2015-10-30 | 2016-03-09 | 江苏能华微电子科技发展有限公司 | GaN thin film material and preparation method thereof |
| CN105405872A (en) * | 2015-10-30 | 2016-03-16 | 江苏能华微电子科技发展有限公司 | Epitaxial wafer for triode and preparation method thereof |
| CN105336769A (en) * | 2015-10-30 | 2016-02-17 | 江苏能华微电子科技发展有限公司 | Epitaxial wafer used for triode and preparation method thereof |
| US10128364B2 (en) * | 2016-03-28 | 2018-11-13 | Nxp Usa, Inc. | Semiconductor devices with an enhanced resistivity region and methods of fabrication therefor |
| CN106449748A (en) * | 2016-12-22 | 2017-02-22 | 成都海威华芯科技有限公司 | Epitaxial structure of gallium-nitride-based transistors with high electron mobility |
| CN107134484A (en) * | 2016-12-26 | 2017-09-05 | 四川北斗卫星导航平台有限公司 | GaN chips and preparation method thereof |
| CN109560784B (en) * | 2017-09-27 | 2021-09-24 | 中国科学院半导体研究所 | Lamb wave resonator and preparation method thereof |
| CN113488374B (en) * | 2021-07-06 | 2024-07-30 | 中国科学院半导体研究所 | Gallium nitride preparation method and gallium nitride-based device |
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