CN102427084B - Gallium-nitride-based high electron mobility transistor and manufacturing method - Google Patents
Gallium-nitride-based high electron mobility transistor and manufacturing method Download PDFInfo
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- CN102427084B CN102427084B CN 201110401468 CN201110401468A CN102427084B CN 102427084 B CN102427084 B CN 102427084B CN 201110401468 CN201110401468 CN 201110401468 CN 201110401468 A CN201110401468 A CN 201110401468A CN 102427084 B CN102427084 B CN 102427084B
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Abstract
The invention discloses a gallium-nitride-based high electron mobility transistor structure, which comprises a substrate, a low-temperature gallium nitride nucleating layer manufactured on the substrate, an unintentionally-doped gallium nitride high-resistivity layer manufactured on the low-temperature gallium nitride nucleating layer, an unintentionally-doped high-mobility gallium nitride layer manufactured on the unintentionally-doped gallium nitride high-resistivity layer, an aluminum nitride insert layer manufactured on the unintentionally-doped high-mobility gallium nitride layer, an unintentionally-doped indium-aluminum-nitrogen barrier layer manufactured on the aluminum nitride insert layer, an unintentionally-doped aluminum-gallium-nitrogen barrier layer manufactured on the unintentionally-doped indium-aluminum-nitrogen barrier layer and an unintentionally-doped gallium nitride cap layer manufactured on the unintentionally-doped aluminum-gallium-nitrogen barrier layer.
Description
Technical field
The invention belongs to technical field of semiconductors, refer to a kind of GaN base transistor with high electronic transfer rate and manufacture method especially, barrier layer and high mobility gallium nitride channel layer that this transistor uses aluminum gallium nitride and indium aluminium nitrogen to combine, can significantly improve two-dimensional electron gas surface density and mobility, reduce the lattice defect of material, improve the material surface pattern.
Background technology
Gallium nitride is as typical case's representative of third generation wide bandgap semiconductor, have good thermal stability and chemical stability, high-breakdown-voltage, high electronics saturation drift velocity and good radiation resistance, be particularly suitable for preparing have high temperature, the High Electron Mobility Transistor of high frequency, high power and radioresistance characteristic.GaN base transistor with high electronic transfer rate has broad application prospects in fields such as radio communication, radar, Aero-Space, automotive electronics, automation control, oil exploration, hyperthermia radiation environment.
The principle of High Electron Mobility Transistor is: owing to form the energy gap difference of two kinds of materials of heterojunction, potential barrier and potential well have been formed at the heterojunction boundary place, because the free electron that polarity effect or modulation doping produce, be accumulated in the gallium nitride layer of non-doping near in the triangle potential well at interface, form two-dimensional electron gas, owing to these electronics in the potential well are separated with the ionized impurity space in the potential barrier, greatly reduce Coulomb scattering, thereby significantly improved the mobility of material.After being developed into device, can control the two-dimensional electron gas at heterojunction boundary place by gate electrode, under certain Dc bias, can amplify high-frequency microwave signal.
Two-dimensional electron gas and mobility are the important parameters that characterizes the high electron mobility transistor structure quality of materials, when reducing potential barrier thickness, two-dimensional electron gas and mobility are on the basis of improving the GaN base transistor with high electronic transfer rate operating frequency in the raising raceway groove, strengthen the important behave of output current density and power density.Before the present invention, for two-dimensional electron gas and the mobility that improves the gallium nitride based transistor structure with high electron mobility material, take two kinds of methods usually:
(1) the aluminum gallium nitride barrier layer is carried out the n type and mix, can improve the two-dimensional electron gas surface density in the raceway groove to a certain extent.Can reduce the integrality of material lattice but mix, thereby cause the crystal mass of gallium aluminium nitrogen layer to descend, the interface roughness between gallium nitride and the gallium aluminium nitrogen layer increases, and reduces electron mobility;
(2) adopt high Al component barrier layer AlGaN/GaN HEMT structure, along with barrier layer Al component raises, heterogeneous ligament rank and polarized electric field increase, and can significantly improve the two-dimensional electron gas surface density.But when the Al component was higher, big lattice mismatch can cause crystal mass, the surface and interface degradation of AlGaN barrier layer, and the deep energy level defect that strain induces increases, and scattering is strengthened, and mobility reduces; Simultaneously, when the Al component was too high, Macrolattice mismatch had limited barrier layer thickness, was difficult to produce strong two-dimensional electron gas.Present these two kinds of methods that adopt usually, especially when barrier layer thickness was thinner, it was not desirable especially improving two-dimensional electron gas and mobility, reducing the defect concentration aspect.
Summary of the invention
First purpose of the present invention provides a kind of novel GaN base transistor with high electronic transfer rate, even when barrier layer is thinner, still have higher two-dimensional electron gas surface density, be about the 1.5-2 of traditional aluminum-gallium-nitrogen/gallium nitride transistor with high electron mobility under the same terms doubly.
Second purpose of the present invention provides a kind of novel GaN base transistor with high electronic transfer rate, can have higher output current and output power density when improving operating frequency.
The 3rd purpose of the present invention provides a kind of novel GaN base transistor with high electronic transfer rate, has lower defect concentration and higher reliability and stability.
The 4th purpose of the present invention provides a kind of novel GaN base transistor with high electronic transfer rate, and the triangle potential well of formation is darker, can limit channel electrons more effectively and reveal to resilient coating.
The 5th purpose of the present invention provides uses indium aluminium nitrogen barrier layer structure to reach and gallium nitride layer lattice coupling, thereby significantly reduces aluminum gallium nitride barrier layer stress, lattice defect and improve the method for material surface pattern.
The 6th purpose of the present invention provides a kind of novel gallium nitride based transistor structure with high electron mobility and manufacture method.
The invention provides a kind of gallium nitride based transistor structure with high electron mobility, comprising:
One substrate;
One low temperature gallium nitride nucleating layer, this low temperature gallium nitride nucleating layer is produced on above the substrate;
One non-doped gallium nitride resistive formation intentionally, this non-doped gallium nitride resistive formation intentionally is produced on above the low temperature gallium nitride nucleating layer;
The one non-high mobility gallium nitride layer of having a mind to mix, this non-high mobility gallium nitride layer of having a mind to mix are produced on non-intentionally above the doped gallium nitride resistive formation;
One aln inserting layer, this aln inserting layer are produced on non-ly has a mind to mix above the high mobility gallium nitride layer;
One non-doped indium aluminium nitrogen barrier layer intentionally, this non-doped indium aluminium nitrogen barrier layer intentionally is produced on above the aln inserting layer;
The one non-aluminum gallium nitride barrier layer of having a mind to mix, this non-aluminum gallium nitride barrier layer of having a mind to mix are produced on non-intentionally above the doped indium aluminium nitrogen barrier layer.
One non-ly has a mind to doped gallium nitride block layer, and this is non-has a mind to doped gallium nitride block layer and be produced on and non-ly have a mind to mix above the aluminum gallium nitride barrier layer.
The present invention also provides a kind of manufacture method of GaN base transistor with high electronic transfer rate, comprises the steps:
Step 1: select a substrate;
Step 2: at substrate growth one deck low temperature gallium nitride nucleating layer, growth thickness is 0.01-0.50 μ m;
Step 3: at the non-doped gallium nitride resistive formation intentionally of low temperature gallium nitride nucleating layer growth, growth thickness is 1-5 μ m;
Step 4: at the non-high mobility gallium nitride layer of having a mind to mix of the non-growth of doped gallium nitride resistive formation intentionally, growth thickness is 0-0.15 μ m;
Step 5: growing aluminum nitride insert layer on the non-high mobility gallium nitride layer of having a mind to mix, growth thickness is 0.8-5nm;
Step 6: at the non-doped indium aluminium nitrogen barrier layer intentionally of aln inserting layer growth, thickness is 4-12nm;
Step 7: at the non-aluminum gallium nitride barrier layer of having a mind to mix of the non-growth of doped indium aluminium nitrogen barrier layer intentionally, thickness is 8-22nm;
Step 8: at the non-non-doped gallium nitride intentionally of the aluminum gallium nitride barrier layer growth block layer of having a mind to mix, thickness is 1-5nm.
The present invention adopts unique aluminum gallium nitride and indium aluminium nitrogen barrier layer structure combining, adopt novel high mobility gallium nitride layer as channel layer, this layer is between high resistant gallium nitride resilient coating and indium aluminium nitrogen barrier layer, and between high mobility gallium nitride channel layer and indium aluminium nitrogen barrier layer, introduce the skim aln inserting layer, by accurate control growth conditions, as temperature, pressure, V/III ratio, make indium aluminium nitrogen barrier layer and gallium nitride channel layer lattice coupling, effectively alleviated the stress that lattice mismatch and thermal expansion mismatch are brought, reduced the aluminum gallium nitride barrier layer, the defect concentration of indium aluminium nitrogen barrier layer and gallium nitride channel layer has improved the crystal mass of channel layer.
The present invention adopts unique aluminum gallium nitride barrier layer and indium aluminium nitrogen barrier layer structure combining.The control growth conditions is regulated In
yAl
1-yThe In component is that 0.17, Al component is 0.83 in the N barrier layer, reaches and GaN lattice coupling, has significantly reduced aluminum gallium nitride barrier layer and indium aluminium nitrogen barrier layer lattice defect, has reduced scattering, can effectively improve the two-dimensional electron gas mobility, improves the material surface pattern simultaneously; The Al component is higher, has significantly improved the two-dimensional electron gas surface density of GaN based high electron mobility transistor; Another effect of this structure is to keep bigger can be with rank discontinuous at the heterojunction boundary place, has effectively limited the leakage of channel electrons to barrier layer.Simultaneously, form darker triangle potential well, limited two-dimensional electron gas effectively and in resilient coating, revealed, two-dimensional electron gas has been limited in the raceway groove, improved the channel electrons surface density.High mobility gallium nitride channel layer has significantly improved the mobility of raceway groove two-dimensional electron gas for two-dimensional electron gas provides a good passage.An effect of aln inserting layer is to utilize binary compound that channel electrons and multi-element compounds indium aluminium nitrogen barrier layer are separated, and reduces electron scattering, has further improved raceway groove two-dimensional electron gas mobility; The another one effect of aln inserting layer is to utilize its energy gap greater than the characteristics of gallium nitride, has effectively limited the leakage of electronics to indium aluminium nitrogen barrier layer and surface.
The present invention can obtain the lower and higher gallium nitride based transistor structure with high electron mobility material of two-dimensional electron gas surface density of defect concentration, very is suitable for the making of high frequency, high-power component, has improved the crystal mass of material simultaneously; This material structure can more effectively limit channel electrons to the leakage on resilient coating, barrier layer and surface.
The manufacture method of novel GaN base transistor with high electronic transfer rate of the present invention is to adopt but be not limited to metal-organic chemical vapor deposition equipment method, molecular beam epitaxy and vapour phase epitaxy, preferentially adopts the metal-organic chemical vapor deposition equipment method.
Description of drawings
For further specifying content of the present invention, below in conjunction with accompanying drawing the present invention is done a detailed description, wherein:
Fig. 1 is novel gallium nitride based transistor structure with high electron mobility schematic diagram of the present invention;
Fig. 2 (a) is Al
0.3Ga
0.7N (12nm)/In
0.17Al
0.83N (8nm)/AlN (1nm)/GaN HEMT and Fig. 2 (b) Al
0.3Ga
0.7N (20nm)/AlN (1nm)/GaN HEMT structure can be with and the two-dimensional electron gas distribution map, introduces In as can be seen
0.17Al
0.83N layer heterostructure can be with raising, and the 2DEG surface density improves.
Embodiment
Key of the present invention is to adopt on the structure unique aluminum gallium nitride barrier layer 70 and indium aluminium nitrogen barrier layer 60 structure combining, adopt novel high mobility gallium nitride layer 40 as channel layer, this layer is positioned at high resistant gallium nitride resilient coating 30 and aln inserting layer 50, by accurate control growth conditions, as temperature, pressure, V/III ratio, make indium aluminium nitrogen barrier layer 60 and gallium nitride channel layer 40 lattices coupling, can effectively alleviate the stress that barrier layer lattice mismatch and thermal expansion mismatch are brought, reduce the defect concentration of indium aluminium nitrogen barrier layer 60 and gallium nitride channel layer 40, improve the crystal mass of whole heterogeneous structure material.
The transistorized barrier layer of the present invention adopts unique aluminum gallium nitride barrier layer 70 and indium aluminium nitrogen barrier layer 60 structure combining.The control growth conditions is regulated In
xAl
1-xThe In component is that 0.17, Al component is 0.83 in the N barrier layer 60, reaches and GaN lattice coupling, significantly reduces the barrier layer lattice defect, reduces scattering, can effectively improve the two-dimensional electron gas mobility, improves the material surface pattern simultaneously; In
xAl
1-xThe Al component of N barrier layer 60 is higher, significantly improves the two-dimensional electron gas surface density of GaN based high electron mobility transistor.Another effect of this structure is to keep bigger can be with rank discontinuous at the heterojunction boundary place, effectively limits channel electrons and reveals to barrier layer; Simultaneously, also formed darker triangle potential well at the heterojunction boundary place, prevent that better two-dimensional electron gas from revealing in the high resistant resilient coating 30, be limited in two-dimensional electron gas in the raceway groove effectively, improved the channel electrons surface density, also can improve transistorized reliability and stability thus, the deterioration of suppression device performance under high frequency and high field condition.
In this structure, high mobility gallium nitride channel layer 40 has significantly improved raceway groove two-dimensional electron gas mobility for two-dimensional electron gas provides a good passage.An effect of aln inserting layer 50 is to utilize binary compound that channel electrons and multi-element compounds indium aluminium nitrogen barrier layer 60 are separated, and reduces electron scattering, further improves raceway groove two-dimensional electron gas mobility; The another one effect of aln inserting layer 50 is to utilize its energy gap greater than the characteristics of gallium nitride, effectively limits electronics to the leakage on indium aluminium nitrogen barrier layer 60 and surface.
See also shown in Figure 1ly, the structure of a kind of novel GaN base transistor with high electronic transfer rate of the present invention is characterized in that, comprising:
One substrate 10, this substrate 10 is silicon carbide substrates or Sapphire Substrate or silicon substrate;
The thickness that one low temperature gallium nitride nucleating layer 20, this low temperature gallium nitride nucleating layer 20 are produced on this low temperature gallium nitride nucleating layer 20 above the substrate 10 is 0.01-0.50 μ m, and preferred value is 0.03-0.30 μ m;
One non-doped gallium nitride resistive formation 30 intentionally, this non-doped gallium nitride resistive formation 30 intentionally is produced on above the low temperature gallium nitride nucleating layer 20, and this non-thickness of having a mind to doped gallium nitride resistive formation 30 is 1-5 μ m, and room temperature resistivity is greater than 1 * 10
6Ω cm, preferred value is greater than 1 * 10
8Ω cm;
The one non-high mobility gallium nitride layer 40 of having a mind to mix, this non-high mobility gallium nitride layer 40 of having a mind to mix is produced on non-intentionally above the doped gallium nitride resistive formation 30, this is non-, and have a mind to the to mix thickness of high mobility gallium nitride layer 40 is 0-0.15 μ m, and the room temperature electron mobility is greater than 500cm
2/ Vs, preferred value is greater than 700cm
2/ Vs;
One aln inserting layer 50, this aln inserting layer 50 are produced on non-ly has a mind to mix above the high mobility gallium nitride layer 40, and these aln inserting layer 50 thickness are 0.8-5nm, and preferred value is 1nm;
One non-ly has a mind to doped indium aluminium nitrogen barrier layer 60, and this is non-has a mind to doped indium aluminium nitrogen barrier layer 60 and be produced on above the aln inserting layer 50, and this is non-has a mind to the In that mixes
xAl
1-x N barrier layer 60 thickness between 4-12nm, 0.04≤x≤0.30 wherein, preferred value is 0.17;
The one non-aluminum gallium nitride barrier layer 70 of having a mind to mix, this non-aluminum gallium nitride barrier layer 70 of having a mind to mix are produced on non-ly has a mind to above the doped indium aluminium nitrogen barrier layer 60, and this non-aluminum gallium nitride barrier layer 70 of having a mind to mix is Al
xGa
1-xN, 0.10≤x≤0.35 wherein, thickness is 8-22nm.
One non-ly has a mind to doped gallium nitride block layer 80, and this is non-has a mind to doped gallium nitride block layer 80 and be produced on and non-ly have a mind to mix above the aluminum gallium nitride barrier layer 70, and this is non-, and to have a mind to doped gallium nitride block layer 80 thickness be 1-5nm.
See also Fig. 1, shown in Figure 2, the present invention also provides a kind of manufacture method of novel GaN base transistor with high electronic transfer rate, comprises the steps:
Step 1: select a substrate 10, this substrate 10 is silicon carbide substrates or Sapphire Substrate or silicon substrate;
Step 2: at substrate 10 growth one deck low temperature gallium nitride nucleating layers 20, the growth temperature of this low temperature gallium nitride nucleating layer 20 is 500-600 ℃, and growth pressure is 53.34-80.01kPa, and growth thickness is 0.01-0.50 μ m, and preferred value is 0.03-0.30 μ m;
Step 3: at the non-doped gallium nitride resistive formation 30 intentionally of low temperature gallium nitride nucleating layer 20 growths, this non-growth temperature of having a mind to doped gallium nitride resistive formation 30 is 900-1100 ℃, the preferred value scope is 1020-1100 ℃, growth pressure is 5.33-26.67kPa, growth thickness is 1-5 μ m, growth rate is 3-5 μ m/h, and room temperature resistivity is greater than 1 * 10
6Ω cm, preferred value is greater than 1 * 10
8Ω cm;
Step 4: at the non-high mobility gallium nitride layer 40 of having a mind to mix of non-30 growths of doped gallium nitride resistive formation intentionally, growth thickness is 0-0.15 μ m, this non-high mobility gallium nitride layer 40 of having a mind to mix, this layer is the operation raceway groove of 2DEG, growth temperature is 900-1100 ℃, growth pressure is 40.00-80.00kPa, and growth rate is 2-3 μ m/h, and the room temperature mobility is greater than 500cm
2/ Vs, preferred value is greater than 700cm
2/ Vs;
Step 5: growing aluminum nitride insert layer 50 on the non-high mobility gallium nitride layer 40 of having a mind to mix, growth thickness is 0.8-5nm, preferred value is 1nm, this aln inserting layer 50, this layer can improve mobility and the surface density of 2DEG, improve the combination property of heterogeneous structure material, this layer growth temperature is 850-1150 ℃, and growth pressure is 5.33-26.67kPa;
Step 6: at the non-doped indium aluminium nitrogen barrier layer 60 intentionally of aln inserting layer 50 growths, this In
yAl
1-y N barrier layer 60, this layer and GaN channel layer lattice mate, and can reduce the misfit dislocation of epitaxial material, improve the epitaxial material quality; And the Al component of this layer is higher, can improve raceway groove 2DEG surface density (contrast of Fig. 2 is calculated).This In
yAl
1-yThe indium component of N barrier layer 60 is 0.04-0.30, and preferred value is 0.17, non-doping intentionally, and growth temperature is 760 ℃-860 ℃, and preferred value is 800 ℃-860 ℃, and growth pressure is 5.0-7.5kPa, and growth thickness is 4-12nm;
Step 7: at the non-aluminum gallium nitride barrier layer 70 of having a mind to mix of non-60 growths of doped indium aluminium nitrogen barrier layer intentionally, aluminum gallium nitride barrier layer 70 thickness are 8-22nm, this Al
xGa
1-xN aluminum gallium nitride barrier layer 70, this layer are the non-doping of having a mind to, and growth temperature is 850-1150 ℃, and growth pressure is 5.33-40.00kPa, and the Al component is 0.10-0.35;
Step 8: at the non-non-doped gallium nitride intentionally of the aluminum gallium nitride barrier layer 70 growths block layer 80 of having a mind to mix, the block layer thickness is 1-5nm, and this gallium nitride block layer 80, this layer are the non-doping of having a mind to, growth temperature is 850-1150 ℃, and growth pressure is 5.33-40.00kPa.
This manufacture method preferentially adopts the metal-organic chemical vapor deposition equipment method including, but not limited to metal-organic chemical vapor deposition equipment method, molecular beam epitaxy and vapour phase epitaxy.
The concrete growth temperature of each grown layer of the novel gallium nitride based transistor structure with high electron mobility of the present invention, growth pressure and growth thickness are as shown in table 1:
Table 1: the concrete growth temperature of each grown layer, growth pressure and the growth thickness tables of data of novel gallium nitride based transistor structure with high electron mobility
The present invention can reduce technology difficulty, reduce processing step, acquisition has the more novel gallium nitride based transistor structure with high electron mobility material of fabricating low-defect-density and Geng Gao two-dimensional electron gas surface density, has improved crystal mass, heterojunction boundary quality and the surface topography of material simultaneously; This material structure can more effectively limit channel electrons to resilient coating, barrier layer and surface leakage.Therefore, the present invention can significantly improve the performance of gallium nitrate based high temperature, high frequency, high-power component and circuit.
From Fig. 2 (a) and Fig. 2 (b), introduce In as can be seen
0.17Al
0.83N layer heterostructure can be with raising, and the 2DEG surface density improves.
The above; only be embodiments of the invention; be not that the present invention is done any pro forma restriction; every any simple modification, equivalent variations and modification of above embodiment being done according to the technology of the present invention essence; all still belong within the technical solution of the present invention scope, so protection scope of the present invention is when being as the criterion with claims.
Claims (10)
1. gallium nitride based transistor structure with high electron mobility comprises:
One substrate;
One low temperature gallium nitride nucleating layer, this low temperature gallium nitride nucleating layer is produced on above the substrate;
One non-doped gallium nitride resistive formation intentionally, this non-doped gallium nitride resistive formation intentionally is produced on above the low temperature gallium nitride nucleating layer;
The one non-high mobility gallium nitride layer of having a mind to mix, this non-high mobility gallium nitride layer of having a mind to mix are produced on non-intentionally above the doped gallium nitride resistive formation;
One aln inserting layer, this aln inserting layer are produced on non-ly has a mind to mix above the high mobility gallium nitride layer;
One non-doped indium aluminium nitrogen barrier layer intentionally, this non-doped indium aluminium nitrogen barrier layer intentionally is produced on above the aln inserting layer;
The one non-aluminum gallium nitride barrier layer of having a mind to mix, this non-aluminum gallium nitride barrier layer of having a mind to mix are produced on non-intentionally above the doped indium aluminium nitrogen barrier layer;
One non-ly has a mind to doped gallium nitride block layer, and this is non-has a mind to doped gallium nitride block layer and be produced on and non-ly have a mind to mix above the aluminum gallium nitride barrier layer.
2. gallium nitride based transistor structure with high electron mobility according to claim 1 is characterized in that, wherein non-thickness of having a mind to the doped gallium nitride resistive formation is 1-5 μ m, and room temperature resistivity is greater than 1 * 10
6Ω cm.
3. gallium nitride based transistor structure with high electron mobility according to claim 1, wherein the thickness of the non-high mobility gallium nitride layer of having a mind to mix is 0-0.15 μ m, the room temperature electron mobility is greater than 500cm
2/ Vs.
4. gallium nitride based transistor structure with high electron mobility according to claim 1, wherein non-to have a mind to doped indium aluminium nitrogen barrier layer be In
yAl
1-yN, thickness between 4-12nm, 0.04≤y≤0.30 wherein.
5. gallium nitride based transistor structure with high electron mobility according to claim 1, wherein the non-aluminum gallium nitride barrier layer of having a mind to mix is Al
xGa
1-xN, 0.10≤x≤0.35 wherein, thickness is 8-22nm.
6. the manufacture method of a GaN base transistor with high electronic transfer rate comprises the steps:
Step 1: select a substrate;
Step 2: at substrate growth one deck low temperature gallium nitride nucleating layer, growth thickness is 0.01-0.50 μ m;
Step 3: at the non-doped gallium nitride resistive formation intentionally of low temperature gallium nitride nucleating layer growth, growth thickness is 1-5 μ m;
Step 4: at the non-high mobility gallium nitride layer of having a mind to mix of the non-growth of doped gallium nitride resistive formation intentionally, growth thickness is 0-0.15 μ m;
Step 5: growing aluminum nitride insert layer on the non-high mobility gallium nitride layer of having a mind to mix, growth thickness is 0.8-5nm;
Step 6: at the non-doped indium aluminium nitrogen barrier layer intentionally of aln inserting layer growth, thickness is 4-12nm;
Step 7: at the non-aluminum gallium nitride barrier layer of having a mind to mix of the non-growth of doped indium aluminium nitrogen barrier layer intentionally, thickness is 8-22nm;
Step 8: at the non-non-doped gallium nitride intentionally of the aluminum gallium nitride barrier layer growth block layer of having a mind to mix, thickness is 1-5nm.
7. the manufacture method of GaN base transistor with high electronic transfer rate according to claim 6, wherein non-growth temperature of having a mind to the doped gallium nitride resistive formation is 900-1100 ℃, growth pressure is 5.33-26.67kPa, growth thickness is 1-5 μ m, growth rate is 3-5 μ m/h, and room temperature resistivity is greater than 1 * 10
6Ω cm.
8. the manufacture method of GaN base transistor with high electronic transfer rate according to claim 6, the non-high mobility gallium nitride layer of having a mind to mix wherein, growth temperature is 900-1100 ℃, growth pressure is 40.00-80.00kPa, growth thickness is 0-0.15 μ m, growth rate is 2-3 μ m/h, and the room temperature mobility is greater than 500cm
2/ Vs.
9. the manufacture method of GaN base transistor with high electronic transfer rate according to claim 6, wherein In
yAl
1-yN barrier layer indium component is 0.04-0.30, non-doping intentionally, and growth temperature is 760 ℃-860 ℃, and growth pressure is 5.0-7.5kPa, and growth thickness is 4-12nm.
10. the manufacture method of GaN base transistor with high electronic transfer rate according to claim 6 is wherein at In
yAl
1-yRegrowth Al above the N barrier layer
xGa
1-xN barrier layer, this layer are the non-doping of having a mind to, and growth temperature is 850-1150 ℃, and growth pressure is 5.33-40.00kPa, and thickness is 8-22nm, and al composition is 0.10-0.35.
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| CN102931230B (en) * | 2012-11-19 | 2015-11-18 | 中国科学院半导体研究所 | Aluminum gallium nitride does the gallium nitrate based HEMT of double heterojunction and the manufacture method of resistive formation |
| CN103123934B (en) * | 2013-02-07 | 2015-08-12 | 中国科学院半导体研究所 | The gallium nitride based transistor structure with high electron mobility of tool barrier layer and manufacture method |
| CN103117304A (en) * | 2013-02-20 | 2013-05-22 | 中国科学院半导体研究所 | Gallium nitride field effect transistor structure with composite space layer and manufacture method thereof |
| CN103531615A (en) * | 2013-10-15 | 2014-01-22 | 苏州晶湛半导体有限公司 | Nitride power transistor and manufacturing method thereof |
| CN103617950A (en) * | 2013-12-04 | 2014-03-05 | 中国电子科技集团公司第十三研究所 | Method for implementing InA1N device low-temperature ohmic contact on InGaN cap layer |
| US10804386B2 (en) * | 2016-07-01 | 2020-10-13 | Intel Corporation | Gate stack design for GaN e-mode transistor performance |
| CN106601787B (en) * | 2016-12-01 | 2020-06-26 | 北京大学 | InxAlyGa1-x-yN/GaN heterostructure and epitaxial method thereof |
| WO2022000362A1 (en) * | 2020-07-01 | 2022-01-06 | Innoscience (Zhuhai) Technology Co., Ltd. | Semiconductor device and fabrication method thereof |
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