CN101211543B - Liquid crystal device driving circuit and method - Google Patents
Liquid crystal device driving circuit and method Download PDFInfo
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- CN101211543B CN101211543B CN2007103011671A CN200710301167A CN101211543B CN 101211543 B CN101211543 B CN 101211543B CN 2007103011671 A CN2007103011671 A CN 2007103011671A CN 200710301167 A CN200710301167 A CN 200710301167A CN 101211543 B CN101211543 B CN 101211543B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
- G09G3/3659—Control of matrices with row and column drivers using an active matrix the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0257—Reduction of after-image effects
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Liquid Crystal (AREA)
Abstract
A driving circuit for driving a liquid crystal display device having a plurality of gate lines, data lines and switch elements connected to the gate and data lines includes a data driver for applying a plurality of data signals to the date lines, a gate driver for applying a plurality of gate signals to the gate lines, a timing controller for providing a plurality of control signals to the data and gate drivers, a power supply for generating a power voltage, and a discharging circuit for applying a first signal and a second signal to the gate driver in accordance with the power voltage.
Description
Technical field
Embodiments of the present invention relate to a kind of LCD drive circuits that is used to drive, and more particularly, relate to a kind of be used to drive LCD drive circuits and driving method thereof.Although embodiments of the present invention are applicable to wide in range range of application, they are particularly useful for obtaining to comprise the liquid crystal indicator of discharge circuit and the driving method of this liquid crystal indicator.
Background technology
Liquid crystal display (LCD) device utilizes the optical anisotropy of liquid crystal molecule and polarization property to generate image.Liquid crystal molecule has elongated shape and has the optical anisotropy characteristic, thereby makes liquid crystal molecule to arrange along alignment direction.Liquid crystal molecule also has polarization characteristic, and this makes can change orientation according to the intensity of the electric field that applies.Specifically, can change the arrangement of liquid crystal molecule by the intensity that changes electric field.Therefore, control the transmittance of liquid crystal molecule, and the LCD device is because the change of transmittance and display image by electric field.
Usually, the LCD device comprises liquid crystal board and driving circuit.This liquid crystal board comprises first substrate and second substrate that is spaced apart from each other, and the liquid crystal layer between first substrate and second substrate.First substrate (being commonly referred to array base palte) has thin film transistor (TFT) and pixel electrode, and second substrate (being commonly referred to filter substrate) has color-filter layer and public electrode.Driving circuit electrically-driven liquid crystal plate.Because the LCD device is the device of non-light emitting-type, so the LCD device comprises the light source such as back light unit that is positioned at the LCD panel below.
Fig. 1 is the LCD schematic representation of apparatus of illustration according to prior art.In Fig. 1, the LCD device comprises liquid crystal board 10 and driving circuit 60.Liquid crystal board 10 comprise many select lines GL1 to GLn and many data line DL1 to DLm.Many select lines GL1 to GLn and many data line DL1 to DLm intersect mutually limiting a plurality of pixel regions, and each pixel region includes thin film transistor (TFT) (TFT) T, liquid crystal capacitor Clc and holding capacitor Cst with display image.
When the LCD device was de-energized, TFT also ended.As a result, the data-signal that is stored among liquid crystal capacitor Clc and the holding capacitor Cst exists, and is not released.Because remaining data-signal drives liquid crystal board at short notice unusually,, liquid crystal board do not wish the residual image or the abnormal image that occur so can demonstrating.
Summary of the invention
Therefore, embodiments of the present invention aim to provide a kind of method that is used to drive LCD drive circuits and drives this liquid crystal indicator, and it has eliminated one or more problem that causes owing to the limitation of prior art and shortcoming basically.
The purpose of embodiments of the present invention provides a kind of method that is used to drive LCD drive circuits and drives this liquid crystal indicator, and this liquid crystal indicator comprises the discharge circuit that is used for the remaining data signal.
Another purpose of embodiments of the present invention provides a kind of method that is used to drive LCD drive circuits and drives this liquid crystal indicator, and this driving circuit comprises voltage detecting integrated circuit (IC).
Other feature and advantage of embodiments of the present invention will be set forth in explanation subsequently, and will be partly clear and definite by this explanation, and know by putting into practice the present invention.The purpose of embodiments of the present invention and other advantages can realize by the structure of specifically noting in instructions and claims and accompanying drawing and obtain.
In order to realize these purposes and other advantages, and according to as concrete enforcement and broadly described aim of the present invention, a kind of LCD drive circuits that is used to drive is provided, this liquid crystal indicator has many select liness, many data lines and is connected to a plurality of on-off elements of described select lines and data line, described driving circuit comprises: data driver, and it is used for applying a plurality of data-signals to described data line; Gate driver, it is used for applying a plurality of gating signals to described select lines; Timing controller, it is used for providing a plurality of control signals to described data driver and gate driver; Power supply, it is used to generate supply voltage (power voltage); And discharge circuit, it is used for applying first signal and secondary signal according to described supply voltage to described gate driver.
On the other hand, a kind of method that is used to drive liquid crystal indicator is provided, this liquid crystal indicator has many select liness, many data lines, is connected to a plurality of on-off elements of described select lines and described data line and the gate driver that is used to drive described select lines, and this method may further comprise the steps: generate supply voltage; Detect supply voltage; And when detecting described supply voltage and be lower than reference voltage, applying first signal to gate driver, this first signal is corresponding to making all described on-off element conductings.
On the other hand, a kind of method that is used to drive liquid crystal indicator is provided, this liquid crystal indicator has many select liness, many data lines, is connected to a plurality of on-off elements of described select lines and described data line and the gate driver that is used to drive described select lines, this method may further comprise the steps: during operator scheme, generate supply voltage and enable described on-off element based on this supply voltage successively with row-by-row system; And after this operator scheme, when supply voltage is lower than reference voltage, all on-off elements are synchronously enabled a discharge period.
Should be appreciated that above general introduction and following detailed description all are exemplary and indicative, aim to provide the further explanation to claimed embodiments of the present invention.
Description of drawings
Accompanying drawing is included so that the further understanding to embodiments of the present invention to be provided, and accompanying drawing is merged in and constitutes the part of this instructions, and accompanying drawing shows embodiments of the present invention, and is used from explanation principle of the present invention with instructions one.In these accompanying drawings:
Fig. 1 is the LCD schematic representation of apparatus of illustration according to prior art;
Fig. 2 is the circuit diagram of the discharge loop of the remaining data signal in the LCD device that is illustrated diagrammatically in according to the embodiment of the present invention;
LCD schematic representation of apparatus according to the embodiment of the present invention that Fig. 3 has been an illustration;
Fig. 4 schematically illustration be used for the block diagram of the discharge circuit of LCD device according to the embodiment of the present invention;
Fig. 5 A to 5C respectively schematically illustration be used for first's circuit of discharge circuit of LCD device according to the embodiment of the present invention to the circuit diagram of third part circuit;
Fig. 6 is that schematically illustration is used for block diagram according to the discharge circuit of the LCD device of another embodiment of the present invention;
Fig. 7 A and 7B be respectively schematically illustration be used for according to the first's circuit of the discharge circuit of the LCD device of another embodiment of the present invention and the circuit diagram of second portion circuit;
Fig. 8 is that schematically illustration is used for block diagram according to the discharge circuit of the LCD device of another embodiment of the present invention;
Fig. 9 be schematically illustration be used for circuit diagram according to first's circuit of the discharge circuit of the LCD device of another embodiment of the present invention;
Figure 10 is that schematically illustration is used for circuit diagram according to the partial circuit of the discharge circuit of the LCD device of another embodiment of the present invention;
Figure 11 be schematically illustration be used to drive sequential chart according to a plurality of signals of the LCD device of another embodiment of the present invention.
Embodiment
Describe preferred implementation of the present invention, embodiment shown in the drawings now in detail.
Liquid crystal display according to the embodiment of the present invention (LCD) device comprises the discharge circuit of the problem that is used to solve residual image or abnormal image.Fig. 2 is the circuit diagram of the discharge loop of the remaining data signal in the LCD device that is illustrated diagrammatically in according to the embodiment of the present invention.In Fig. 2, after the power supply of LCD device was closed, the discharge circuit (not shown) applied the conduction level gate voltage to select lines GL during scheduled time slot, and thin film transistor (TFT) (T) conducting.Thereby, remaining data-signal among liquid crystal capacitor Clc and the holding capacitor Cst is discharged.
LCD schematic representation of apparatus according to the embodiment of the present invention that Fig. 3 has been an illustration.In Fig. 3, the LCD device comprises the liquid crystal board 100 of display image and is used for the driving circuit 160 of this liquid crystal board 100.Liquid crystal board 100 comprise many select lines GL1 to GLn and many data line DL1 to DLm.Many select lines GL1 to GLn and many data line DL1 to DLm intersect limiting a plurality of pixel regions, and each pixel region includes thin film transistor (TFT) (TFT) T, liquid crystal capacitor Clc and holding capacitor Cst with display image.
Gate driver 130 is according to the conduction and cut-off operation of controlling the thin film transistor (TFT) (TFT) in the liquid crystal board 100 from the gating control signal of timing controller 120.The conduction level gate voltage that applies single horizontal sync time (1H) to select lines GL1 to GLn successively is to enable select lines GL1 to GLn and the TFT that is connected to select lines GL1 to GLn.When with the corresponding TFT conducting of single select lines, data-signal is applied to DLm by data line DL1 in the pixel of pixel region of liquid crystal board 100.
Data driver 140 is according to the reference voltage of selecting data-signal from the data controlling signal of timing controller 120, and provides selected reference voltage to adjust the anglec of rotation of liquid crystal molecule to liquid crystal board 100.Power supply 150 generates the first source voltage VCC, the second source voltage VDD and the 3rd source voltage GND, and provides this first source voltage VCC, the second source voltage VDD and the 3rd source voltage GND to timing controller 120, data driver 140 and discharge circuit 190.In addition, power supply 150 also generates gating high voltage VGH and gating low-voltage VGL and offers gate driver 130 with conducting and by TFT, and generates common electric voltage Vcom and offer liquid crystal board 100.
Fig. 4 schematically illustration be used for the block diagram of the discharge circuit of LCD device according to the embodiment of the present invention, and Fig. 5 A to 5C respectively schematically illustration be used for first the circuit diagram of the discharge circuit of LCD device according to the embodiment of the present invention to the third part circuit.In Fig. 4, discharge circuit 190 comprises first's circuit 192, second portion circuit 194, third part circuit 196 and the 4th partial circuit 198 and receives the first source voltage VCC, the second source voltage VDD and the 3rd source voltage GND.When the first source voltage VCC was lower than by reference voltage, first's circuit 192 was to (among Fig. 3) gate driver 130 output discharge signal ALL_H.Described can be about 2.5V by reference voltage.
Shown in Fig. 5 A, for example, first's circuit 192 can comprise first voltage detecting integrated circuit (IC) 192a.The first voltage detecting IC 192a can have power input terminal Vps, output terminal Vout and ground terminal Vgd.First's circuit 192 can also comprise the first capacitor C1 and first resistor R 1 that is connected to the first voltage detecting IC 192a.
Referring again to Fig. 4, when the first source voltage VCC was lower than by reference voltage, second portion circuit 194 generated power modulation signal (DPM) and keeps signals DP M_VCC, and this signal is offered the 4th partial circuit 198 as the first variable flash signal V_FLK1.This DPM keeps signals DP M_VCC holding power modulation signal DPM during scheduled time slot, and wherein this power modulation signals DP M is used for Controlling Source voltage.The startup of determination data signals DP M power modulation signal regularly can be about 1.6V.For example, can when power modulation signals DP M has high level voltage, apply source voltage, and when power modulation signals DP M has low level voltage, not apply source voltage.
Shown in Fig. 5 B, second portion circuit 194 can comprise the second voltage detecting IC 194a, the second capacitor C2, second resistor R 2, the 3rd resistor R 3 and the first transistor T1.The second voltage detecting IC 194a can have output terminal Vout, power input terminal Vps and ground terminal Vgd, and the first transistor T1 can have Negative-Positive-Negative (PNP) bi-polar type.Because the output terminal Vout of the second voltage detecting IC 194a is connected to the base stage of the first transistor T1,, the second voltage detecting IC 194a is defined as the first variable flash signal V_FLK1 so controlling the first transistor T1 and by the first transistor T1 DPM is kept signals DP M_VCC.For example, when the first source voltage VCC was lower than by reference voltage, 194 output DPM kept signals DP M_VCC as the first variable flash signal V_FLK1 from the second portion circuit.
Return with reference to Fig. 4, when the first source voltage VCC was higher than by reference voltage, third part circuit 196 generated flash signal FLK and it is offered the 4th partial circuit 198 as the second variable flash signal V_FLK2.So third part circuit 196 receives flash signal FLK and gating shift clock signal GSC and control provides flash signal FLK as the second variable flash signal V_FLK2.Flash signal FLK is used for preventing the scintillation of liquid crystal board.For example, can reduce the rear portion (rear portion) of strobe pulse according to flash signal FLK, so that have high level voltage, and has low level voltage at the rear portion of the weak point of this single period in front portion (front portion) with the length of gating shift clock corresponding single period of signal GSC.The result, when source voltage VCC is higher than by reference voltage, third part circuit 196 provides flash signal FLK from (Fig. 3's) timing controller 120 as the second variable flash signal V_FLK2 to the 4th partial circuit 198, and when source voltage VCC is lower than by reference voltage, do not provide this flash signal FLK to the 4th partial circuit 198.Alternatively, can substitute flash signal FLK provides gating shift clock signal GSC as the described second variable flash signal V_FLK2.
Shown in Fig. 5 C, third part circuit 196 can comprise that tertiary voltage detects IC 196a, the 3rd capacitor C3, the 4th resistor R 4 to the 8th resistor R 8 and transistor seconds T2.Tertiary voltage detects IC 196a can have output terminal Vout, power input terminal Vps and ground terminal Vgd, and transistor seconds T2 can have negative-just-negative (NPN) bi-polar type.Because tertiary voltage detects the base stage that the output terminal Vout of IC 196a is connected to transistor seconds T2, so tertiary voltage detects IC 196a control transistor seconds T2 and flash signal FLK is defined as the second variable flash signal V_FLK2.For example, when the first source voltage VCC is higher than by reference voltage, export flash signal FLK as the second variable flash signal V_FLK2 from third part circuit 196.In addition, when the first source voltage VCC is lower than by reference voltage, do not export flash signal FLK as the second variable flash signal V_FLK2 from third part circuit 196.But second portion circuit 194 output DPM keep signals DP M_VCC as the first variable flash signal V_FLK1.
Return with reference to Fig. 4, the 4th partial circuit 198 as power block (power block) is kept signal VGH_M according to the first variable flash signal V_FLK1 and the second variable flash signal V_FLK2 generation discharge, and provides it to (Fig. 3's) gate driver 130.Therefore, when the first source voltage VCC is higher than by reference voltage and the energising of LCD device, the 4th partial circuit 198 utilizes flash signal FLK to modulate gating signal and keeps signal VGH_M to generate discharge, and signal VGH_M is kept in this discharge offer (Fig. 3's) gate driver 130, so that the LCD device carries out work under the situation that is not having flicker.When the first source voltage VCC is lower than by reference voltage and the outage of LCD device, the 4th partial circuit 198 utilizes DPM to keep signals DP M_VCC and modulates gating signal, offer (Fig. 3's) gate driver 130 to generate to discharge to keep signal VGH_M and signal VGH_M is kept in this discharge, to be identified for the described scheduled time slot of discharge signal ALL_H.Although not shown, at least two among first to the tertiary voltage detection IC 192a, 194a and the 196a can be formed single IC.
Fig. 6 is that schematic illustration is used for the block diagram according to the discharge circuit of the LCD device of another embodiment of the present invention, and Fig. 7 A and 7B be respectively schematically illustration be used for circuit diagram according to first and second partial circuits of the discharge circuit of the LCD device of another embodiment of the present invention.In Fig. 6, discharge circuit 290 comprises first's circuit 292, second portion circuit 294, third part circuit 298 and receives the first source voltage VCC, the second source voltage VDD and the 3rd source voltage GND.When the first source voltage VCC was lower than by reference voltage, first's circuit 292 was to gate driver (not shown) output discharge signal ALL_H.Described can be about 2.5V by reference voltage.In addition, when this source voltage VCC is higher than by reference voltage, second portion circuit 294 provides flash signal FLK from the timing controller (not shown) as variable flash signal V_FLK to third part circuit 298, and when this source voltage VCC was lower than by reference voltage, second portion circuit 294 provided DPM to keep signals DP M_VCC as variable flash signal V_FLK to third part circuit 298.With (among Fig. 4) described the 4th partial circuit 198 similarly, keep signal VGH_M as the third part circuit 298 of power block according to should variable flash signal V_FLK generating to discharge, and provide it to (Fig. 3's) gate driver 130.
Shown in Fig. 7 A, for example, first's circuit 292 can comprise first voltage detecting integrated circuit (IC) 292a.The first voltage detecting IC 292a can have power input terminal Vps, output terminal Vout and ground terminal Vgd.First's circuit 292 can also comprise the first capacitor C11 and first resistor R 11 that is connected to the first voltage detecting IC 292a.
Shown in Fig. 7 B, for example, second portion circuit 294 comprises voltage detecting IC 294a, the second capacitor C12, second resistor R, 12 to the 4th resistor R 14 and the first transistor T11 and transistor seconds T12.Voltage detecting IC 294a has output terminal Vout, power input terminal Vps and ground terminal Vgd.In addition, the first transistor T11 can have negative-just-negative (NPN) bi-polar type and transistor seconds T12 can have Negative-Positive-Negative (PNP) bi-polar type.The base stage of the first transistor T11 is connected to the output terminal Vout of voltage detecting IC 294a by the 3rd resistor R 13, and flash signal FLK is inputed to the collector of the first transistor T11 by second resistor R 12.In addition, the base stage of transistor seconds T12 is connected to the lead-out terminal of voltage detecting IC 294a by the 3rd resistor R 13, and DPM is kept the emitter that signals DP M_VCC inputs to transistor seconds T12.Flash signal FLK alternately exported by the collector of the emitter of the first transistor T11 and transistor seconds T12 and DPM keeps signals DP M_VCC as variable flash signal V_FLK.Therefore, the emitter of the collector of the first transistor T11 and transistor seconds T12 can be connected to (Fig. 3's) timing controller 120, and the collector of the emitter of the first transistor T11 and transistor seconds T12 can be connected to (Fig. 6's) third part circuit 298.
According to the first source voltage VCC can be from the output terminal Vout output high level voltage of voltage detecting IC 292a and low level voltage.In table 1, illustrated according to the value of the variable flash signal V_FLK of first's circuit 292 of the first source voltage VCC and the state of the first transistor T11 and transistor seconds T12.
[table 1]
| VCC | T11 | T12 | V_FLK |
| Conducting | Conducting | End | FLK |
| End | End | Conducting | DPM_VCC |
In table 1, the first source voltage VCC is higher than by reference voltage when conducting state, and the first source voltage VCC is lower than by reference voltage when cut-off state.Under the conducting state of the first source voltage VCC, the first transistor T11 conducting and transistor seconds T12 ends.Under the cut-off state of the first source voltage VCC, the first transistor T11 ends and transistor seconds T12 conducting.As a result, first's circuit 292 is exporting flash signal FLK under the conducting state of the first source voltage VCC and exporting DPM and keep signals DP M_VCC under the cut-off state of this first source voltage VCC, as variable flash signal V_FLK.Therefore, the first's circuit 292 that has single voltage detecting IC 292a among Fig. 6 have with Fig. 4 in the first's circuit 192 with first voltage detecting IC 192a, have the second portion circuit 194 of the second voltage detecting IC 194a and have first and third part circuit 196 identical functions that tertiary voltage detects the 196a of IC 196a.
Fig. 8 is that schematically illustration is used for block diagram according to the discharge circuit of the LCD device of another embodiment of the present invention.Although not shown in Fig. 8, this LCD device comprises liquid crystal board and such as the components of drive circuit of timing controller, gate driver, data driver and power supply.In Fig. 8, discharge circuit 390 comprises first's circuit 392 and second portion circuit 398, and receives the first source voltage VCC, the second source voltage VDD and the 3rd source voltage GND.When the first source voltage VCC was lower than by reference voltage, first's circuit 392 was to gate driver (not shown) output discharge signal ALL_H.Described can be about 2.5V by reference voltage.In addition, when this source voltage VCC is higher than by reference voltage, first's circuit 392 provides flash signal FLK from the timing controller (not shown) as variable flash signal V_FLK to second portion circuit 398, and when this source voltage VCC was lower than by reference voltage, first's circuit 392 provided DPM to keep signals DP M_VCC as variable flash signal V_FLK to second portion circuit 398.With (among Fig. 4) the 4th partial circuit 198 similarly, keep signal VGH_M as the second portion circuit 398 of power block according to should variable flash signal V_FLK generating to discharge, and provide it to (Fig. 3's) gate driver 130.
Fig. 9 is that schematically illustration is used for circuit diagram according to first's circuit of the discharge circuit of the LCD device of another embodiment of the present invention.As shown in Figure 9, first's circuit 392 comprises voltage detecting integrated circuit (IC) 392a, the first capacitor C21, first resistor R, 21 to the 3rd resistor R 23 and the first transistor T21 and transistor seconds T22.Voltage detecting IC 392a has output terminal Vout, power input terminal Vps and ground terminal Vgd.In addition, the first transistor T21 can have negative-just-negative (NPN) bi-polar type and transistor seconds T22 can have Negative-Positive-Negative (PNP) bi-polar type.The base stage of the first transistor T21 is connected to the output terminal Vout of voltage detecting IC 392a by second resistor R 22, and flash signal FLK is inputed to the collector of the first transistor T21 by first resistor R 21.In addition, the base stage of transistor seconds T22 is connected to the lead-out terminal of voltage detecting IC 392a by second resistor R 22, and DPM is kept the emitter that signals DP M_VCC inputs to transistor seconds T22.Flash signal FLK alternately exported by the collector of the emitter of the first transistor T21 and transistor seconds T22 and DPM keeps signals DP M_VCC as variable flash signal V_FLK.Therefore, the emitter of the collector of the first transistor T21 and transistor seconds T22 can be connected to (Fig. 3's) timing controller 120, and the collector of the emitter of the first transistor T21 and transistor seconds T22 can be connected to (Fig. 8's) second portion circuit 398.
Can be according to the first source voltage VCC from the output terminal Vout output high level voltage of voltage detecting IC 392a and low level voltage.In table 2, illustrated according to the value of the variable flash signal V_FLK of first's circuit 392 of the first source voltage VCC and the state of the first transistor T21 and transistor seconds T22.
[table 2]
| VCC | T21 | T22 | ?V_FLK |
| Conducting | Conducting | End | ?FLK |
| End | End | Conducting | ?DPM_VCC |
In table 2, the first source voltage VCC is higher than by reference voltage when conducting state, and the first source voltage VCC is lower than by reference voltage when cut-off state.Under the conducting state of the first source voltage VCC, the first transistor T21 conducting and transistor seconds T22 ends.Under the cut-off state of the first source voltage VCC, the first transistor T21 ends and transistor seconds T22 conducting.As a result, first's circuit 392 is exporting flash signal FLK under the conducting state of the first source voltage VCC and exporting DPM and keep signals DP M_VCC under the cut-off state of the first source voltage VCC, as variable flash signal V_FLK.Therefore, the first's circuit 392 among Fig. 8 with single voltage detecting IC 392a have with Fig. 4 in the first's circuit 192 with first voltage detecting IC 192a, have the second portion circuit 194 of the second voltage detecting IC 194a and have third part circuit 196 identical functions that tertiary voltage detects IC 196a.
Figure 10 is that schematically illustration is used for circuit diagram according to the partial circuit of the discharge circuit of the LCD device of another embodiment of the present invention.As shown in figure 10, first's circuit 492 has first's circuit 392 similar elements with Fig. 9.Therefore, first's circuit 492 comprises voltage detecting integrated circuit (IC) 492a, the first capacitor C31, first resistor R, 31 to the 4th resistor R 34 and the first transistor T31 and transistor seconds T32.Voltage detecting IC 492a has output terminal Vout, power input terminal Vps and ground terminal Vgd.In addition, the first transistor T31 can have negative-just-negative (NPN) bi-polar type and transistor seconds T32 can have Negative-Positive-Negative (PNP) bi-polar type.
In first's circuit 492, respectively will (among Fig. 3) flash signal FLK of timing controller 120 by first resistor R 31 and the 4th resistor R 34 and at least one among the gating shift clock signal GSC be input to the collector of the first transistor T31.Therefore, when the first source voltage VCC was higher than by reference voltage, at least one among the first transistor T31 input flash signal FLK and the gating shift clock signal GSC was as variable flash signal V_FLK.As a result, the first transistor T31 and transistor seconds T32 alternately export flash signal FLK and DPM keeps signals DP M_VCC to second portion circuit (not shown), as variable flash signal V_FLK.
Figure 11 be schematically illustration be used to drive sequential chart according to a plurality of signals of the LCD device of another embodiment of the present invention.In Figure 11, after enabling to follow the gating shift clock signal GSC of scheduled delay, when gating signal has gating high voltage VGH and gating shift clock signal GSC synchronously enable many select lines GL1 successively to GLn.Gating output enable signal GOE divides gating signal at many select lines GL1 to GLn.When the LCD device cut off the power supply, (among Fig. 8) first source voltage VCC became and is lower than by reference voltage, and (among Fig. 8) discharge circuit 390 outputs have the scheduled time slot of the about 3ms of discharge signal ALL_H of low level voltage.By reference voltage can be about 2.5V.As a result, the low level voltage with discharge signal ALL_H synchronously enables whole many select lines GL1 to GLn.Thereby, make in the LCD panel all TFT all conducting so that pixel is fully discharged.
When the first source voltage VCC is higher than when reference voltage (conducting state), uses among flash signal FLK synchronized with each other and the gating shift clock signal GSC at least one to generate discharge and keep signal VGH_M.In addition, when the first source voltage VCC is lower than when reference voltage (cut-off state), uses and determine that discharge keeps signals DP M_VCC with the DPM of scheduled time slot and generate to discharge and keep signal VGH_M.Therefore, in LCD device according to the embodiment of the present invention, thereby prevented the demonstration of abnormal image owing to pixel being discharged at LCD device outage back discharge circuit.In addition, because discharge circuit comprises single voltage detecting IC, so simplified the driving circuit of LCD device and reduced the manufacturing cost of LCD device.
It will be apparent to those skilled in the art that can be under the situation that does not break away from the spirit or scope of the present invention, to the liquid crystal indicator of embodiments of the present invention and and driving method make various modifications and variations.Therefore, embodiments of the present invention will contain fall into appended claims and equivalent thereof scope in to modification of the present invention and modification.
The application requires the korean patent application No.10-2006-0138514 that submits in Korea S on Dec 29th, 2006 and the right of priority of the korean patent application No.10-2007-0045036 that submits in Korea S on May 9th, 2007, by reference it is incorporated into this.
Claims (20)
1. one kind is used to drive LCD drive circuits, and this liquid crystal indicator has many select liness, many data lines and is connected to a plurality of on-off elements of described select lines and data line, and described driving circuit comprises:
Data driver is used for applying a plurality of data-signals to described data line;
Gate driver is used for applying a plurality of gating signals to described select lines;
Timing controller is used for providing a plurality of control signals to described data driver and gate driver;
Power supply is used to generate supply voltage; And
Discharge circuit is used for applying first signal and secondary signal according to described supply voltage to described gate driver,
Wherein, when described discharge circuit detects described supply voltage and is lower than a reference voltage, apply described first signal, and described first signal is corresponding to making all described on-off element conductings to described gate driver,
Wherein, when described discharge circuit detected described supply voltage and is lower than a reference voltage, described secondary signal was corresponding to keeping signal, and
When described discharge circuit detected described supply voltage and is higher than described reference voltage, described secondary signal was corresponding with in flash signal and the gating shift clock signal at least one.
2. driving circuit according to claim 1, wherein, the described signal of keeping comprises the power modulation signal that is used to control plurality of source voltages therein one scheduled time slot.
3. driving circuit according to claim 2 wherein, is describedly kept startup that signal determines described a plurality of data-signals regularly.
4. driving circuit according to claim 1, wherein, described discharge circuit comprises:
First's circuit is used for a described supply voltage and a reference voltage are compared, and exports described first signal when described supply voltage is lower than described reference voltage;
The second portion circuit is used for described supply voltage and described reference voltage are compared, and provides one to keep signal in response to described timing controller when described supply voltage is lower than described reference voltage;
The third part circuit is used for described supply voltage and described reference voltage are compared, and provides a control signal in response to described timing controller when described supply voltage is higher than described reference voltage;
The 4th partial circuit is used for receiving described of keeping signal and described control signal.
5. driving circuit according to claim 4, wherein, described first circuit comprises first capacitor and the first voltage detecting integrated circuit, described second portion circuit comprises second capacitor, the first transistor and the second voltage detecting integrated circuit, and described third part circuit comprises that the 3rd capacitor, transistor seconds and tertiary voltage detect integrated circuit.
6. driving circuit according to claim 4, wherein, described control signal is based on from one in the gating shift clock signal of described timing controller and the flash signal.
7. driving circuit according to claim 1, wherein, described discharge circuit comprises:
First's circuit is used for a described supply voltage and a reference voltage are compared, and exports described first signal when described supply voltage is lower than described reference voltage;
The second portion circuit, be used for described supply voltage and described reference voltage are compared, when described supply voltage is lower than described reference voltage, provide one to keep signal, and when described supply voltage is higher than described reference voltage, provide a control signal in response to described timing controller in response to described timing controller; And
The third part circuit, it is used for receiving described of keeping signal and described control signal from described second portion circuit.
8. driving circuit according to claim 7, wherein, described first circuit comprises first capacitor and the first voltage detecting integrated circuit, and described second portion circuit comprises second capacitor, the first transistor, transistor seconds and the second voltage detecting integrated circuit.
9. driving circuit according to claim 7, wherein, described control signal is based on from one in the gating shift clock signal of described timing controller and the flash signal.
10. driving circuit according to claim 1, wherein, described discharge circuit comprises:
First's circuit, be used for a described supply voltage and a reference voltage are compared, when being lower than described reference voltage, exports described supply voltage described first signal, when described supply voltage is lower than described reference voltage, keep signal, and when described supply voltage is higher than described reference voltage, provide a control signal in response to described timing controller in response to described timing controller; And
The second portion circuit is used for receiving described of keeping signal and described control signal from described first circuit.
11. driving circuit according to claim 10, wherein, described first circuit comprises capacitor, the described the first transistor of signal, the transistor seconds of the described control signal of output and the voltage detecting integrated circuit of controlling described the first transistor and transistor seconds kept of output.
12. driving circuit according to claim 11, wherein, described the first transistor comprises the Negative-Positive-Negative bipolar transistor, and that described transistor seconds comprises is negative-and just-negative bipolar transistor.
13. driving circuit according to claim 10, wherein, described control signal is based on from one in the gating shift clock signal of described timing controller and the flash signal.
14. method that is used to drive liquid crystal indicator, this liquid crystal indicator has many select liness, many data lines, is connected to a plurality of on-off elements of described select lines and data line, and the gate driver that is used to drive described select lines, this method may further comprise the steps:
Generate supply voltage;
Detect described supply voltage; And
When detecting described supply voltage and be lower than a reference voltage, apply first signal to described gate driver, described first signal is corresponding to making all described on-off element conductings,
Apply secondary signal to described gate driver;
Wherein, when detecting described supply voltage and be lower than described reference voltage, described secondary signal is kept signal corresponding to one, and when detecting described supply voltage and be higher than described reference voltage, described secondary signal is corresponding to a control signal.
15. method according to claim 14 wherein, applies the described described step of keeping signal and may further comprise the steps: the power modulation signal that will be used to control plurality of source voltages therein applies a scheduled time slot.
16. method according to claim 14, wherein, the described step that applies described first signal and secondary signal is based on single voltage detecting integrated circuit.
17. method according to claim 14, wherein, the described step that applies described first signal is based on the first voltage detecting integrated circuit, and the described step that applies described secondary signal is based on the second voltage detecting integrated circuit.
18. method according to claim 14, wherein, the described step that applies described first signal is based on the first voltage detecting integrated circuit, and the described step that applies described secondary signal is based on the second voltage detecting integrated circuit and tertiary voltage detects integrated circuit.
19. method according to claim 14, wherein, described control signal is based on from one in the gating shift clock signal of timing controller and the flash signal.
20. method that is used to drive liquid crystal indicator, this liquid crystal indicator has many select liness, many data lines, is connected to a plurality of on-off elements of described select lines and data line, and the gate driver that is used to drive described select lines, said method comprising the steps of:
During operator scheme, generate a supply voltage and enable described a plurality of on-off element successively in line by line mode based on this supply voltage,
After this operator scheme, when described supply voltage is lower than a reference voltage, synchronously enable the described one discharge period of a plurality of on-off element,
During operator scheme, apply a control signal to described gate driver, described control signal is based in gating shift clock signal and the flash signal, and
During the discharge period, apply one to described gate driver and keep signal.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020060138514 | 2006-12-29 | ||
| KR20060138514 | 2006-12-29 | ||
| KR10-2006-0138514 | 2006-12-29 | ||
| KR1020070045036 | 2007-05-09 | ||
| KR10-2007-0045036 | 2007-05-09 | ||
| KR20070045036A KR101480313B1 (en) | 2006-12-29 | 2007-05-09 | Liquid crystal display |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101211543A CN101211543A (en) | 2008-07-02 |
| CN101211543B true CN101211543B (en) | 2011-01-12 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007103011671A Active CN101211543B (en) | 2006-12-29 | 2007-12-26 | Liquid crystal device driving circuit and method |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP5226288B2 (en) |
| KR (1) | KR101480313B1 (en) |
| CN (1) | CN101211543B (en) |
| TW (1) | TWI374431B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101537412B1 (en) * | 2008-12-26 | 2015-07-17 | 엘지디스플레이 주식회사 | Liquid crystal display and driving method thereof |
| CN103123770B (en) * | 2011-11-18 | 2017-04-12 | 联咏科技股份有限公司 | Power management circuit and gate electrode pulse modulation circuit thereof |
| KR101473843B1 (en) | 2012-04-25 | 2014-12-17 | 엘지디스플레이 주식회사 | Liquid crystal display |
| KR102113737B1 (en) * | 2013-12-31 | 2020-05-21 | 엘지디스플레이 주식회사 | Liquid crystal display device And a method of driving the same |
| JP2015197484A (en) * | 2014-03-31 | 2015-11-09 | シャープ株式会社 | Liquid crystal display device and manufacturing method of liquid crystal display device |
| KR102168790B1 (en) * | 2014-09-15 | 2020-10-23 | 엘지디스플레이 주식회사 | Display device and power supply |
| KR102148488B1 (en) * | 2014-09-22 | 2020-08-27 | 엘지디스플레이 주식회사 | Power Supply Circuit of Display Device |
| KR102235400B1 (en) * | 2014-09-25 | 2021-04-02 | 엘지디스플레이 주식회사 | Display device and the method for driving the same |
| KR102450256B1 (en) * | 2015-09-30 | 2022-09-30 | 엘지디스플레이 주식회사 | Liquid Crystal Display |
| TWI562126B (en) * | 2015-09-30 | 2016-12-11 | Hon Hai Prec Ind Co Ltd | Liquid crystal display device and discharge control method thereof |
| CN105513529A (en) * | 2016-02-23 | 2016-04-20 | 深圳市华星光电技术有限公司 | Display panel drive circuit and quality test method thereof |
| KR102460990B1 (en) * | 2018-08-29 | 2022-10-31 | 엘지디스플레이 주식회사 | Driving voltage supply circuit, display panel and device |
| CN113066447B (en) * | 2020-01-02 | 2022-06-21 | 深圳富泰宏精密工业有限公司 | Electronic device and display screen control method |
| CN114708840B (en) * | 2022-03-31 | 2023-10-24 | 福州京东方光电科技有限公司 | Display driving method, driving circuit and display device |
| CN114822402B (en) * | 2022-06-30 | 2022-09-20 | 惠科股份有限公司 | Drive circuit, display module and display device |
| CN115933237B (en) * | 2022-12-16 | 2024-07-09 | 业成科技（成都）有限公司 | Display device and method of operating the same |
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Also Published As
| Publication number | Publication date |
|---|---|
| TW200828252A (en) | 2008-07-01 |
| KR101480313B1 (en) | 2015-01-08 |
| JP2008165226A (en) | 2008-07-17 |
| CN101211543A (en) | 2008-07-02 |
| JP5226288B2 (en) | 2013-07-03 |
| TWI374431B (en) | 2012-10-11 |
| KR20080063020A (en) | 2008-07-03 |
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