KR102168790B1 - Display device and power supply - Google Patents

Abstract

The present embodiments relate to a display device that maintains a power sequence of driving voltages or minimizes respective times of the power sequence without adding components when implementing a power sequence, and a power supply thereof.

Description

DISPLAY DEVICE AND POWER SUPPLY

The present invention relates to a display device and a power supply thereof.

As the information society develops, demands for display devices for displaying images are increasing in various forms, and liquid crystal display devices (LCDs), plasma display devices, and organic light-emitting display devices ( Various types of display devices such as OLED: Organic Light Emitting Display Device) are being used.

The display device includes a plurality of power supply circuits that supply power. When the power is turned on or turned off, the power sequence of driving voltages provided by the power supply circuits is formed.

When implementing such a power sequence, it is necessary to maintain the power sequence of driving voltages without adding components, or to minimize each time of the power sequence, but the existing display device does not provide a function for this.

It is an object of the present embodiments to provide a display device and a power supply thereof that maintain a power sequence of driving voltages or minimize each time of the power sequence without adding components when implementing a power sequence.

In one embodiment, in a power supply unit that supplies a high potential power voltage for driving a display panel and a logic power voltage for driving a circuit, the high potential power voltage maintained in the first voltage block is applied to the second voltage block when the power is turned off. A power supply unit including a connection circuit unit that transmits the maintained logic power voltage and a voltage detection unit that controls the operation of the connection circuit unit by providing a control signal to the connection circuit unit when the power is turned off.

In another embodiment, a display panel, a timing controller for controlling the display panel, a high potential power voltage for driving the display panel, and a logic power voltage for driving the timing controller are supplied, and a high potential maintained in the first voltage block when the power is turned off. It provides a display device including a power supply for transferring the power voltage to the logic power voltage maintained in the second voltage block.

In another embodiment, a display panel, a timing controller for controlling the display panel, a high potential power voltage for driving the display panel, and a logic power voltage for driving the timing controller are supplied. A control board including a power supply unit for transferring the above power voltage to the logic power voltage maintained in the second voltage block, a control unit providing video data and timing signals to the timing controller, and an external power circuit providing driving power to the power supply unit It provides a display device including a system board including a.

According to the embodiments described above, there is an effect of maintaining the power sequence of driving voltages or minimizing the respective times of the power sequence without adding components when implementing the power sequence.

1 is a schematic system configuration diagram of a display device 100 according to exemplary embodiments.
2 is a configuration diagram of components of the display device according to the present exemplary embodiments.
3 shows a power sequence applied to the display device according to the present embodiments.
4 illustrates some configurations of an external power circuit and a power supply unit according to an embodiment.
5 is a timing diagram illustrating a termination operation of the display device.
6 shows a power sequence of an external power circuit and a power supply unit according to an embodiment.
8 illustrates some configurations of an external power circuit and a power supply unit according to another embodiment.
9 shows a timing diagram at the end of operation of the display device.
10 is a circuit diagram of a discharge circuit added to a general display device.
FIG. 11 shows a fall time of the high potential power supply voltage EVDD operated by the discharge circuit shown in FIG. 10.

Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. In adding reference numerals to elements of each drawing, the same elements may have the same numerals as possible even if they are indicated on different drawings. In addition, in describing the present invention, when it is determined that a detailed description of a related known configuration or function may obscure the subject matter of the present invention, a detailed description thereof may be omitted.

In addition, in describing the constituent elements of the present invention, terms such as first, second, A, B, (a), (b) may be used. These terms are only for distinguishing the component from other components, and the nature, order, order, or number of the component is not limited by the term. When a component is described as being "connected", "coupled" or "connected" to another component, the component may be directly connected or connected to that other component, but other components between each component It is to be understood that is "interposed", or that each component may be "connected", "coupled" or "connected" through other components.

1 is a schematic system configuration diagram of a display device 100 according to exemplary embodiments. 2 is a configuration diagram of components of the display device according to the present exemplary embodiments. 3 shows a power sequence applied to the display device according to the present embodiments.

Referring to FIGS. 1 and 2, the display device 100 according to the present exemplary embodiments includes a display panel 110 in which a plurality of data lines and a plurality of gate lines are formed to form a plurality of pixels, and a display A plurality of drivers 120 and 130 for driving the panel 110, a timing controller 140 for controlling the drivers 120 and 130, and a power supply unit 150 for supplying power are included.

Power supplied from the power supply unit 150 may be applied to the display panel 110 through the data driver 120, and for power monitoring, a bypass is performed on the film Flim on which the data driver 120 is formed. ) And can be authorized.

The plurality of drivers 120 and 130 includes at least one data driver 120 for driving a plurality of data lines and at least one gate driver 130 for driving a plurality of gate lines.

Each data driver 120 may be implemented as an integrated circuit, and a bonding pad of the display panel 110 may be performed using a tape automated bonding (TAB) method or a chip-on-glass (COG) method. Pad), or may be formed directly on the display panel 110, or may be integrated and formed on the display panel 110 in some cases.

1 is an example in which each data driver 120 is implemented in a COF (Chip On Film) type formed on a film. One side and the other side of each data driver 120 are the display panel 110 and the source board. It is an exemplary diagram showing a case of bonding to (180a or 180b), respectively.

Each gate driver 130 may be implemented as an integrated circuit, and may be implemented as a bonding pad of the display panel 110 in a tape automated bonding (TAB) method or a chip-on-glass (COG) method. Bonding Pad), or implemented in a GIP (Gate In Panel) type, may be directly formed on the display panel 110, or may be integrated and formed on the display panel 110 in some cases.

Meanwhile, the plurality of gate drivers 130 may be located only on one side of the display panel 110 as shown in FIG. 1, or may be dividedly located on both sides of the display panel 110, depending on the driving method.

Referring to FIG. 1, the timing controller 140 and the power supply unit 150 may be disposed on a control board 160 (also referred to as a “control printed circuit board”).

Referring to FIG. 1, the source boards 180a and 180b and the control board 160 are connected through a flexible printed circuit (FPC), 170a and 170b, and the timing controller 140 and the power supply unit 150 and the data driver It enables signal transmission between 120.

Signal transmission between the timing controller 140 and the power supply unit 150 and the gate driver 120 includes a specific data driver 120 or a film on which the specific data driver 120 is formed, and a signal wiring formed on the display panel 110. Through, it can be done.

The timing controller 140 starts scanning according to the timing implemented in each frame, converts the image data input from the interface according to the data signal format used by the data driver 120 to convert the converted image data (Data). It prints and controls the data drive at the appropriate time according to the scan.

The timing controller 140 provides various control signals such as a data control signal (DCS) and a gate control signal (GCS) in order to control the data driver 120 and the gate driver 130. Can be printed.

The gate driver 130 sequentially drives the plurality of gate lines by sequentially supplying scan signals of an on voltage or an off voltage to a plurality of gate lines under the control of the timing controller 140. .

The data driver 120 stores the input image data in a memory (not shown) under the control of the timing controller 140, and when a specific gate line is opened, the image data Data is stored in an analog form. A plurality of data lines are driven by converting it to a data voltage Vdata and supplying it to a plurality of data lines.

The display device 100 briefly illustrated in FIG. 1 is, for example, a liquid crystal display device (LCD), a plasma display device, and an organic light emitting display device (OLED). ), etc.

Circuit elements such as transistors and capacitors are formed in each pixel or display element formed in the above-described display panel 110. For example, when the display panel 110 is an organic light emitting display panel, circuit elements such as an organic light emitting diode, two or more transistors and one or more capacitors, and a compensation circuit are formed in each pixel.

When the power of the display device is turned on, the system board 175 generates at least one of a driving input voltage Vin, a logic power voltage VDD, and a high potential power voltage EVDD, so that the user connector 170 It is input to the power supply unit 150 through. The system board 175 includes a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), a data enable signal (DE), a dot clock (CLK), etc., together with RGB video data input from a broadcast reception circuit or an external video source. The timing signal of is generated through, for example, an LVDS interface or a TMDS interface transmission circuit, and the signals are supplied to the timing controller 140 through the user connector 170. The system board 175 includes a control unit 180 including a graphic processing circuit such as a scaler that interpolates the resolution of RGB video data input from a broadcast reception circuit or an external video source according to the resolution of the liquid crystal display panel and performs signal interpolation, It includes an external power circuit 190 for generating driving power to be supplied to the power supply unit 150.

As shown in FIGS. 1 and 2, the external power circuit 190 located on the system board 175 is at least one of a driving input voltage Vin, a logic power voltage VDD, and a high potential power voltage EVDD. After generating the driving power, the driving power may be supplied to the power supply unit 150 of the control board 160 through a user connector 170. For example, after the external power supply circuit 190 generates a logic power supply voltage (VDD) and a high potential power supply voltage (EVDD), the logic power supply voltage (VDD) and a high potential power supply voltage ( EVDD) is supplied to the power supply unit 150 of the control board 160, the power supply unit 150 supplies the logic power voltage VDD to the timing controller 140 and the like, and the timing controller 140 and the display panel 110 A high-potential power supply voltage EVDD is supplied to a pixel or display device of. For another example, after the external power circuit 190 generates the driving input voltage Vin, the driving input voltage Vin is transmitted to the power supply unit 150 of the control board 160 through a user connector 170. When supplied, the power supply unit 150 generates a logic power voltage VDD and a high potential power voltage EVDD using the driving input voltage Vin, and then applies the logic power voltage VDD to the timing controller 140 or the like. Then, the high potential power voltage EVDD is supplied to the timing controller 140 and the pixel or display device of the display panel 110.

The logic power supply voltage VDD is input to circuits such as the reset circuit 18, the timing controller 140, the data driver 120, and the gate driver 130 to drive the circuits. Next, the high potential power voltage EVDD is supplied to each pixel of the timing controller 140 and the display panel 110 to start normal driving. 2 illustrates that the reset circuit 155 is configured separately from the power supply unit 150, the reset circuit 155 may be configured in the power supply unit 150. Hereinafter, the logic power supply voltage VDD is exemplarily described as 12V and the high potential power supply voltage EVDD is 24V, but the present invention is not limited thereto.

When the high potential power voltage EVDD is applied, the reset circuit 155 generates a reset signal RST in response to the input high potential power voltage EVDD, and transmits the reset signal RST to the timing controller 140. Enter.

The display device 100 includes drivers 120 and 130 of the display panel 110, a timing controller 140, and the like. These various circuits are initialized and terminated according to a certain power sequence.

When an example of the initialization operation of the display device 100 is described, when the power of the display device 100 is turned on, for example, a logic power voltage VDD and a high potential power supply from the external power circuit 175 of the system board 175 are described. A voltage EVDD is generated, and the logic power voltage VDD and the high potential power voltage EVDD are input to the power supply unit 150 through a user connector 170. Or as another example, after the external power circuit 190 generates the driving input voltage Vin, the driving input voltage Vin is supplied to the power supply unit 150 of the control board 160 through a user connector 170. Then, the power supply unit 150 generates a logic power voltage VDD and a high potential power voltage EVDD by using the driving input voltage Vin.

Then, the reset circuit 1555 outputs the reset signal RST after the high potential power voltage EVDD is input, and the timing controller 140 starts a normal operation in response to the reset signal RST.

This power sequence control method sequentially generates driving power in the order of VDD -> EVDD -> RST. As shown in Fig. 3, the specific power sequence is T1 (logic power voltage (VDD) rise time (10%->90%)), T2 (video input signal minimum delay time), and T3 (logic power supply). High potential power supply voltage (EVDD) input minimum delay time after voltage (VDD) input), T4 (high potential power supply voltage (EVDD) rise time (10%->90%), T5 (black data display time)), T6 (high power It may be composed of the minimum retention time of the image input signal after the above power voltage EVDD is turned off) and T7 (the minimum retention time from 10% or less of the logic power voltage VDD to the next turn-on time), which constitutes the power sequence. Each time can be standardized according to the criteria shown in Table 1 below.

parameter Minimum value Maximum value unit T1 One 60 ms T2 20 ms T3 5.2 sec T4 5 60 ms T5 5.3 sec T6 30 ms T7 5 sec

When the power of the display device 100 is turned on due to the initial operation of the display device 100, the logic power voltage VDD may be used from a point when it rises to 90%, and the high potential power voltage EVDD is 90%. It can be used from the point of rising to. Meanwhile, according to the on signal of the high potential power voltage (EVDD) (the high value of the EVDD On signal), the high potential power voltage (EVDD) starts to rise, and the off signal of the high potential power voltage (EVDD) (the low value of the EVDD On signal) ), the high-potential power supply voltage (EVDD) may start to fall. For example, when the power of the display device 100 is turned on by a remote controller, an on signal of the high potential power voltage (EVDD) (high value of the EVDD On signal) is generated, and the power of the display device 100 is turned on by the remote control. When turned on, an off signal (low value of the EVDD On signal) of the high potential power supply voltage EVDD is generated.

At this time, T6 is the minimum holding time of the image input signal after the high potential power voltage (EVDD) is turned off, and T7 is the minimum holding time from 10% or less of the logic power voltage (VDD) to the next turn-on time, and the display device 100 described below. ) Is the power sequence associated with the end operation.

As an example of the termination operation of the display device 100, when the power of the display device 100 is turned off, for example, when the AC power of the system board 175 is forcibly unplugged (hereinafter referred to as'AC off mode') ) Or when turned off by a remote controller (hereinafter referred to as “remote controller off mode”) when the high-potential power supply voltage (EVDD) is turned off and does not satisfy the minimum retention time of the video input signal, T6 (ex: 30ms) Screen transients (Garbage Display) may occur, and electrical damage to pixels or display devices may occur. Therefore, in order to satisfy the minimum retention time of the image input signal T6 after the high potential power supply voltage EVDD is turned off, as shown in FIG. 3, the logic power supply voltage VDD must be maintained for a little longer than the high potential power supply voltage EVDD. do.

In the following embodiments, in order to satisfy the minimum retention time of the image input signal T6 after the high potential power voltage EVDD is turned off, as shown in FIG. 3, the logic power voltage VDD is slightly higher than the high potential power voltage EVDD. Configurations for effectively converting the electrical energy of the high-potential power supply voltage EVDD to the electrical energy of the logic power supply voltage VDD are described.

4 illustrates some configurations of an external power circuit and a power supply unit according to an embodiment. 5 is a timing diagram illustrating a termination operation of the display device. 6 shows a power sequence of an external power circuit and a power supply unit according to an embodiment.

As shown in FIG. 4, the external power circuit 190 included in the system board 175 is connected to an external AC power source to apply an external AC voltage, and the external AC voltage is applied to a required voltage or current (for example, a high potential power supply voltage). (EVDD), a power conversion unit 192 that converts to a logic power supply voltage (VDD)), detects the AC voltage input to the input terminal of the external power circuit 190, and when the AC voltage falls, the state is transmitted to the power supply unit 150. A first voltage block 194 that is connected to the AC detection unit 193 for notifying, the power conversion unit 192 and the first wiring L1 and maintains a first voltage, for example, a high potential power supply voltage EVDD, power A second voltage block 196 connected to the conversion unit 192 through a second wiring L2 and maintaining a second voltage, for example, a logic power voltage VDD may be included. The first voltage block 194 and the second voltage block 196 are configured to maintain a first voltage and a second voltage, for example, one or more capacitors 195 and 197, for example, an electrolytic capacitor. It may include, but is not limited thereto.

The power supply unit 150 included in the control board 160 is connected to the first wiring L1 supplying the high potential power voltage EVDD output from the power conversion unit 192 and A voltage detection unit 152 for detecting a voltage, a first wiring L1 supplying a high potential power voltage EVDD output from the power conversion unit 192 and a logic power voltage output from the power conversion unit 192 ( A connection circuit unit that connects to the second wiring L2 supplying VDD and transfers the electric energy stored in the first voltage block 192 to the second voltage block 194 when power is off, for example, in the remote controller off mode. 154).

When the first voltage block 192 and the second voltage block 194 include capacitors 195 and 197 to maintain the first voltage and the second voltage, the connection circuit unit 154 is connected to the first wiring L1 A circuit that connects the second wiring L2 and transfers the electric energy charged in the first voltage block 192 to the second voltage block 194. The connection circuit unit 154 may be composed of a step up/down converter or a bypass circuit composed of a switch element (FET, BJT) and an inductor, but is not limited thereto. Does not.

As shown in FIG. 5, the AC detection unit 193 detects the AC voltage input to the input terminal of the external power circuit 190 and informs the AC detection signal to the voltage detection unit 152 of the power supply unit 150 when the AC voltage falls. , The voltage detection unit 152 receives an AC detection signal from the AC detection unit 193 or a control signal, for example, an On/Off signal for controlling an operation according to a result of detecting the high potential power supply voltage (EVDD). 154). Meanwhile, the voltage detector 152 may also supply an On/Off signal to the timing controller 140.

In the above example, it has been described that the AC detection unit 193 detects the AC voltage and supplies the AC detection signal to the voltage detection unit 152 and the voltage detection unit 152 applies the On signal to the connection circuit unit 154. When the supply is stopped, the supply of the high-potential power voltage (EVDD) is also stopped, so the voltage detector 152 detects the interruption of the supply of the high-potential power voltage (EVDD) and transmits a control signal, for example, an On signal to the connection circuit unit 154. You can also deliver.

As shown in FIG. 6, when the power of the display device 100 is turned off by the remote controller in the remote controller off mode operation, the external power supply circuit 190 uses the first voltage block 194 to provide a high potential power supply voltage (EVDD). Stop supply of The voltage detection unit 152 detects interruption of the supply of the high potential power voltage EVDD and transmits a control signal, for example, an On signal to the connection circuit unit 154. The connection circuit part 154 connects the first wire L1 and the second wire L2 according to the On signal of the voltage detector 152 to provide a high-potential power charged in the capacitor 195 of the first voltage block 194. The voltage EVDD is transferred to the capacitor 197 of the second voltage block 196 as a logic power voltage VDD.

As shown in FIG. 7, in the AC off mode operation, when the plug is forcibly unplugged, the AC detection unit 193 drops the AC detection signal to a low value, and the voltage detection unit 152 applies an On signal to the connection circuit unit 154. The connection circuit part 154 connects the first wire L1 and the second wire L2 according to the On signal of the voltage detector 152 to provide a high-potential power charged in the capacitor 195 of the first voltage block 194. The voltage EVDD is transferred to the capacitor 197 of the second voltage block 196 as a logic power voltage VDD.

When the power is turned off, such as in the remote controller off mode or AC off mode, the connection circuit unit 154 transfers the high potential power voltage EVDD charged in the first voltage block 194 to the second voltage block 196 to the logic power supply voltage VDD. The high-potential power supply voltage (EVDD) always drops before the logic power supply voltage (VDD), and T6 can be stably secured. In addition, T7, which is held relatively long in consideration of the discharge time of the high-potential power supply voltage (EVDD), is also set short to minimize the delay time required to turn the power of the display device 100 from turn-off to turn-on again. can do.

8 illustrates some configurations of an external power circuit and a power supply unit according to another embodiment. 9 shows a timing diagram at the end of operation of the display device.

As shown in FIG. 8, the external power circuit 190 included in the system board 175 according to another embodiment is connected to an external AC power source to apply an external AC voltage, and the external AC voltage is applied to a required voltage or current (eg : The power conversion unit 192 that converts into an input driving voltage (Vin)), an AC that detects the AC voltage input to the input terminal of the external power circuit 190 and informs the power supply unit 150 of its state when the AC voltage falls A detection unit 193 may be included.

The power supply unit 150 included in the control board 160 according to another embodiment receives the input driving voltage Vin from the power conversion unit 192 of the external power circuit 190 and receives a required voltage or current (for example, a high voltage). A power conversion unit 152a for converting the above power voltage EVDD and logic power voltage VDD may be additionally included. The power supply unit 150 included in the control board 160 according to another embodiment is connected to the first wiring L1 supplying the high potential power voltage EVDD output from the power conversion unit 152a, and The voltage detection unit 152 that detects the voltage of the voltage EVDD, the first wiring L1 supplying the high potential power voltage EVDD output from the power conversion unit 152a and the power conversion unit 152a The electrical energy stored in the first voltage block 154a is converted into the second voltage block 156 when the power is turned off, for example, in the remote controller off mode, connected to the second wiring L2 supplying the logic power voltage VDD. It may include a connection circuit unit 154 to transmit.

In addition, the power supply unit 150 included in the control board 160 is connected to the power conversion unit 152a through the first wiring L1 and maintains a high potential power supply voltage EVDD. A second voltage block 156 connected to the conversion unit 152a through a second wiring and maintaining the logic power voltage VDD may be included. The first voltage block 154a and the second voltage block 156 may include, for example, one or more capacitors 155a and 157, such as an electrolytic capacitor, but are not limited thereto.

As shown in FIG. 9, the AC detection unit 193 detects the AC voltage input to the input terminal of the external power supply circuit 190 and informs the AC detection signal to the voltage detection unit 152 of the power supply unit 150 when the AC voltage falls. , The voltage detection unit 152 receives an AC detection signal from the AC voltage detection unit 193 or supplies an On signal to the connection circuit unit 154 according to a result of detecting the EVDD voltage.

As shown in FIG. 5, the AC detection unit 193 detects the AC voltage input to the input terminal of the external power circuit 190 and informs the AC detection signal to the voltage detection unit 152 of the power supply unit 150 when the AC voltage falls. , The voltage detection unit 152 receives an AC detection signal from the AC detection unit 193 or supplies an On/Off signal to the connection circuit unit 154 according to a result of detecting the high potential power voltage EVDD. Meanwhile, the voltage detector 152 may also supply an On/Off signal to the timing controller 140.

In an off mode such as a remote controller off mode or an AC off mode, the connection circuit unit 154 removes the high potential power voltage EVDD charged in the capacitor 195 of the first voltage block 154a included in the power supply unit 150. Since the logic power voltage VDD is transferred to the capacitor 197 of the two voltage block 196, the high potential power voltage EVDD always drops before the logic power voltage VDD, and T6 can be stably secured. In addition, T7, which is held relatively long in consideration of the discharge time of the high-potential power supply voltage (EVDD), is also set short to minimize the delay time required to turn the power of the display device 100 from turn-off to turn-on again. can do.

The external power circuit 190 according to the exemplary embodiment described with reference to FIG. 4 includes a first voltage block 194 and a second voltage block 196, and a power supply unit according to another exemplary embodiment described with reference to FIG. 150) has been described as including the first voltage block 154a and the second voltage block 156, but only one of the first voltage block and the second voltage block is included in the external power circuit unit 190, and the other is the power supply unit ( 150). The system board 175 and the control board include the first voltage block and the second voltage block in the external power circuit 190 or in the power supply unit 150 according to the size of the components of the first voltage block and the second voltage block. (170) can be configured appropriately.

10 is a circuit diagram of a discharge circuit added to a general display device. FIG. 11 shows a fall time of the high potential power supply voltage EVDD operated by the discharge circuit shown in FIG. 10.

In general, the external power circuit of the system board or the power supply of the control board is the external power circuit 190 of the system board 175 or the power supply of the control board 160 according to the embodiments described with reference to FIGS. 4 and 8. Like 150, the AC detection unit 192, the voltage detection unit 152, and the connection circuit unit 154 are not included. In addition, in general, a relatively large electrolytic capacitor (Electrolytic Capacitor) maintains the logic power voltage (VDD) of the second voltage block for a longer time than the high potential power voltage (EVDD) of the first voltage block included in the external power circuit of the system board. Capacitor) capacity is being used. In addition, a circuit that detects a falling voltage of the high-potential power supply voltage EVDD of the first voltage block is included to stably secure T6 in the normal remote controller off mode. In addition, in order to match T6 even in the AC off mode, as shown in FIG. 10, a discharge resistor (R) is added in parallel with the capacitor (C) that maintains the high potential power supply voltage (EVDD) in the first voltage block, or a resistance (R). By adding a discharge circuit composed of a switch (FET, BJT), the falling time of the high potential power supply voltage EVDD is minimized as shown in FIG. 11.

In the general display device to which the discharge circuit described with reference to FIG. 10 is added, the capacitance of the electrolytic capacitor of the first voltage block is increased to satisfy T6, thereby increasing the area and price of the PCB. In addition, the fall times of the high-potential power voltage EVDD and the logic power voltage VDD vary according to the image condition at the power-off time, so that T6 is not satisfied. Accordingly, there is a possibility of occurrence of a garbage display on the screen.

In addition, when a discharge resistor (R) is added in parallel with the capacitor (C) that maintains the high potential power voltage (EVDD) in the first voltage block, the electric energy charged in the electrolytic capacitor (C) is discharged to the resistor (R) as heat. Therefore, the energy conversion efficiency is lowered and the resistance value of the resistor cannot be lowered, resulting in a longer discharging time. On the other hand, when a discharge circuit composed of a resistor (R) and a switch (FET, BJT) is added in the first voltage block, the circuit area is complicated and the PCB area increases, thereby increasing the price.

However, unlike general display devices, the external power circuit 190 of the system board 175 or the power supply 150 of the control board 160 according to the embodiments described with reference to FIGS. 4 and 8 Since the high-potential power supply voltage (EVDD) is transferred to the logic power supply voltage (VDD) without adding or discharging circuits, the area and price of the PCB do not increase, and the energy conversion efficiency does not decrease, such as discharging as heat to the resistor. It is stable and can be set short T7.

As a result, according to the above-described implementations, there is an effect of maintaining the power sequence of driving voltages or minimizing the respective times of the power sequence without adding components when implementing the power sequence.

The description above and the accompanying drawings are merely illustrative of the technical idea of the present invention, and those of ordinary skill in the technical field to which the present invention pertains, combinations of configurations without departing from the essential characteristics of the present invention Various modifications and variations, such as separation, substitution, and alteration, will be possible. Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but to explain the technical idea, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the following claims, and all technical ideas within the scope equivalent thereto should be interpreted as being included in the scope of the present invention.

100: display device 110: display panel
120: data driver 130: gate driver
140: timing controller 150: power supply
152: voltage detection unit 154: connection circuit unit
154a, 194: first voltage block 156, 196: second voltage block
160: control board 170a, 170b: FPC (Flexible Printed Circuit)
180a, 180b: source board 190: external power circuit
192, 152a: power conversion unit

Claims (12)

A power supply unit that supplies a high potential power voltage for driving a display panel and a logic power voltage for driving a circuit,
A connection circuit unit for transferring the high potential power voltage maintained in the first voltage block to the logic power voltage maintained in the second voltage block when power is turned off; And
A power supply unit comprising a voltage detector configured to control an operation of the connection circuit unit by providing a control signal to the connection circuit unit when the power is turned off. The method of claim 1,
The power supply unit includes at least one of the first voltage block maintaining the high potential power voltage and the second voltage block maintaining the logic power voltage. The method of claim 1,
And the voltage detector provides a control signal to the connection circuit when the power is turned off due to a supply interruption of one of the high potential power voltage and the AC power voltage. Display panel;
A timing controller controlling the display panel; And
The logic power supply which supplies a high potential power voltage for driving the display panel and a logic power voltage for driving the timing controller, and maintains the high potential power voltage maintained in the first voltage block in the second voltage block when power is turned off. A display device including a power supply that transmits a voltage. The method of claim 4,
The power supply unit includes: a connection circuit unit for transferring the high potential power voltage maintained in the first voltage block to the logic power voltage maintained in the second voltage block when the power is turned off; And a voltage detector configured to control an operation of the connection circuit part by providing a control signal to the connection circuit part when the power is turned off. The method of claim 4,
The power supply unit includes at least one of the first voltage block maintaining the high potential power voltage and the second voltage block maintaining the logic power voltage. The method of claim 5,
And the voltage detection unit provides a control signal to the connection circuit when the power is turned off due to a supply interruption of one of the high-potential power voltage and the AC power voltage. Display panel;
A timing controller for controlling the display panel, a high potential power voltage for driving the display panel, and a logic power voltage for driving the timing controller are supplied, and when power is turned off, the high potential power voltage maintained in the first voltage block is removed. A control board including a power supply for transmitting the logic power voltage maintained in the two voltage block; And
A display device including a system board including a control unit providing video data and a timing signal to the timing controller and an external power circuit providing driving power to the power supply unit. The method of claim 8,
The power supply unit transfers the high potential power voltage maintained in the first voltage block to the logic power voltage maintained in the second voltage block when the power is turned off, and a control signal to the connection circuit unit when the power is turned off. A display device comprising a voltage detection unit configured to control the operation of the connection circuit unit. The method of claim 8,
The power supply unit includes at least one of the first voltage block maintaining the high potential power voltage and the second voltage block maintaining the logic power voltage. The method of claim 9,
And the voltage detection unit provides a control signal to the connection circuit when the power is turned off due to a supply interruption of one of the high-potential power voltage and the AC power voltage. The method of claim 11,
The external power circuit further includes an AC detection unit for providing an AC detection signal to the connection circuit unit according to interruption of the supply of the AC power voltage.

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