CN101174602A - 高电流半导体功率器件小外形集成电路封装 - Google Patents

高电流半导体功率器件小外形集成电路封装 Download PDF

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CN101174602A
CN101174602A CNA2007101474382A CN200710147438A CN101174602A CN 101174602 A CN101174602 A CN 101174602A CN A2007101474382 A CNA2007101474382 A CN A2007101474382A CN 200710147438 A CN200710147438 A CN 200710147438A CN 101174602 A CN101174602 A CN 101174602A
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lead
encapsulation
lead frame
bonding
grid
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CN101174602B (zh
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孙明
张晓天
施磊
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Alpha and Omega Semiconductor Ltd
Alpha and Omega Semiconductor Inc
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Abstract

本发明公开了一种高电流半导体功率小外形集成电路封装。该封装包括由具有大于8mil厚度的单规格材料形成的相对厚的引线框，所述引线框具有多个引线和第一引线框区，该第一引线框区包括焊接到其上的芯片；一对设置在与芯片顶表面同一平面上的引线键合区域；将芯片连接到多个引线上的铝制大直径键合导线；和密封芯片，键合导线和引线框的至少一部分的树脂体。

Description

高电流半导体功率器件小外形集成电路封装
技术领域
本发明涉及半导体器件，更具体地涉及高电流半导体器件小外形集成电路封装。
背景技术
功率半导体封装已随着印刷电路板技术的发展而从通孔向表面安装封装发展。表面安装封装总体包括引线框，半导体器件被安装在该引线框上。半导体器件和引线框的一部分通常用树脂材料密封。在有引线的封装中，引线终端在树脂体外延伸，并包括用于提供从半导体器件到引线终端的导线键合连接的键合区。
在半导体器件封装中重点考虑的问题包括高热耗散，低寄生电感，半导体器件和周围电路之间的低电阻，热循环和热冲击/热疲劳方面的良好可靠性，以及对电路板空间的最小消耗。
常规的功率半导体封装包括8到32引线脚的Small Outline IntegratedCircuit(SOIC)(小外形集成电路)封装。在高电流应用中，常规的SOIC封装由于引线框厚度和封装底部密封使其热性能不佳。另外，在常规上半导体芯片用诸如银浆的热性能不佳的材料附贴到SOIC封装的引线框上。
由于SOIC封装的引线脚不匹配印刷电路板上的TO 252(DPAK封装)焊接区图形，因此常规的SOIC封装在很多应用场合中的使用受到进一步限制。此外，常规的SOIC封装具有易于变形的引线框，导致较低的装配率以及相对小的导线键合区域，相对小的导线键合区域限制了能够用于减小封装电阻的键合导线的数量。
发明内容
本发明要解决的技术问题是提供高电流半导体功率器件SOIC封装，该新颖的SOIC封装能够用于各种高电流的应用场合，并且在很多应用场合中用于替代TO 252器件。
为达到上述目的，本发明提供了高电流半导体SOIC封装，该封装包括由具有大于8mil(密耳)厚度的单规格材料形成的相对厚的引线框，所述引线框具有多个引线和第一引线框区，该第一引线框区包括焊接到其上的芯片；一对设置在与芯片顶表面同一平面上的引线键合区域；将芯片连接到多个引线上的铝制大直径键合导线；和密封芯片，键合导线和引线框的至少一部分的树脂体。
作为本发明的进一步改进，具有平整引线的包容电子器件的高电流半导体功率器件SOIC封装还包括由具有大于8mil厚度的单规格材料形成的相对厚的引线框，所述引线框包括多个引线和引线框区，该引线框区具有焊接到其上的电子器件；一对设置在与电子器件的顶表面同一平面上的引线键合区域；将电子器件连接到多个引线上的具有直至20mil厚度的铝制键合导线；和密封电子器件，键合导线和引线框的至少一部分的树脂体。
本发明总体提供一种高电流半导体功率器件SOIC封装，该高电流半导体功率器件SOIC封装具有由单规格材料形成的引线框，该单规格材料具有大于常规的8到10mil的厚度。其优点是，较厚的引线框有利于大直径铝制键合导线的键合。铝制键合导线的使用显著降低封装电阻，优于常规的金导线配置。键合导线可具有直至20mil的直径。通过促进热量侧向流出漏极引线，较厚的引线框材料进一步提供经改进的封装热性能。甚至在引线框区的底部暴露的情况下也能获得这样的效果。进一步，源极键合区域和栅极键合区域可以设置在与芯片高度基本相同的高度。在该方式下，可以使用短长度的键合导线，从而减小电阻和电感。
该高电流半导体功率器件SOIC封装进一步包括能够匹配TO 252焊接区图形的向外延伸的漏极，源极和栅极引线。因此，本发明的高电流半导体功率器件SOIC封装在很多高电流应用场合下能够用于替代DPAK封装。
附图说明
图1是根据本发明的高电流半导体功率器件SOIC封装的实施例的顶视图；
图1A是根据本发明的图1的高电流半导体功率器件SOIC封装的截面图；
图1B是根据本发明的图1的高电流半导体功率器件SOIC封装的底视图；
图2是根据本发明的矩阵引线框的顶视图；
图2A是根据本发明的一个引线框及其支撑的放大图；
图3是根据本发明的经表面安装到TO 252焊接区图形上的高电流半导体功率器件SOIC封装的透视图；以及
图4是经表面安装到TO 252焊接区图形上的DPAK器件的透视图。
具体实施方式
结合图1至图4具体说明实施本发明的最佳模式。该叙述并不意在起到限制的作用，而仅是为了说明本发明的总体原理的目的，因为本发明的范围将由附后的权利要求进行最好的定义。
本发明总体提供一种高电流半导体功率器件SOIC封装，该高电流半导体功率器件SOIC封装具有由单规格材料形成的引线框，该单规格材料具有大于常规的8到10mil的厚度。其优点是，较厚的引线框有利于大直径铝制键合导线的键合。铝制键合导线的使用显著降低封装电阻，优于常规的金导线配置。键合导线可具有直至20mil的直径。通过促进热量侧向流出漏极引线，较厚的引线框材料进一步提供经改进的封装热性能。甚至在引线框区的底部暴露的情况下也能获得这样的效果。进一步，源极键合区域和栅极键合区域可以设置在与芯片高度基本相同的高度。在该方式下，可以使用短长度的键合导线，从而减小电阻和电感。
该高电流半导体功率器件SOIC封装进一步包括能够匹配TO 252焊接区图形的向外延伸的漏极，源极和栅极引线。因此，本发明的高电流半导体功率器件SOIC封装在很多高电流应用场合下能够用于替代DPAK封装。
参考图1，图1A和图1B，图中显示高电流半导体功率器件SOIC封装被总体标以100。较厚的单规格材料引线框130包括芯片101被连接到其上的引线框区152。芯片101最好通过焊料层170焊接到引线框区152，以便有利于使用铝制大直径键合导线。引线框130的一部分可以被模制在树脂体108中。
引线框130包括源极引线116，栅极引线112和漏极引线126。源极引线116可以被熔融并延伸到树脂体108外。源极引线116的外面部分进一步包括侧向延伸部分116a以及第一和第二部分116b和116c，该第一和第二部分116b和116c以互相相隔的关系从侧向延伸部分116a垂直延伸。内部源极键合区域118通过键合导线110连接到芯片的源极触点。内部源极键合区域118基本上延伸经熔融的源极引线116的全长，以提供最大数量的键合导线110，从而减小导通电阻和电感。漏极引线126可以连接到引线框区152并且包括侧向延伸部分126a以及第一和第二部分126b和126c，该第一和第二部分126b和126c以互相相隔的关系从侧向延伸部分126a垂直延伸。栅极引线112可以连接到栅触点区域120，该栅触点区域120转而可以通过键合导线106连接到栅极区127。栅极引线112进一步包括侧向延伸部分112a和从侧向延伸部分112a垂直延伸的部分112b。源极锁孔114和漏极锁孔124可以分别形成在源极引线116和漏极引线126中。锁定切口128形成在漏极引线126中。
通过具体参考图1A，引线框130由具有大于常规的8到10mil厚度的单规格材料形成。其优点是，较厚的引线框130有利于铝制大直径键合导线110和106和/或较大数量的这样的键合导线的键合。铝制大直径键合导线的使用显著降低封装电感和电阻，优于常规的金导线配置。另外，铝制大直径键合导线的使用使封装100能够被用于高电流应用场合。键合导线110和106可具有直至20mil的直径。通过促进热量侧向流出漏极引线，较厚的引线框材料进一步提供经改进的封装热性能。
继续参考图1A，源极键合区域118和栅极键合区域120(图中未显示)基本上设置在与芯片101的顶表面102同一个平面上。在该方式下，所使用的键合导线110和106的短长度能够减小电阻和电感。引线框130的底部180在封装100的底部暴露。
引线框130进一步包括一对侧芯片杆190。该侧芯片杆190用于加强矩阵引线框200(图2和图2A)的机械性能，并使厚引线框130能够以高密度矩阵引线框200的形式制造，从而提高装配率和降低封装成本。侧芯片杆190进一步提供对引线框130更大的模制粘附力和降低潮气对芯片101的暴露。
图3显示包括漏极区域310，源极区域320和栅极区域330的TO 252焊接区图形300。所显示的根据本发明的高电流半导体功率SOIC器件100被表面安装到该焊接区图形300上，漏极引线126安装到漏极区域310，包括部分116c和部分116a的一部分的源极引线116的一部分安装到源极区域320，包括部分112a和112b的栅极引线112安装到栅极区域330。当安装到源极区域320时，源极部分116c与栅极部分112b一起向SOIC器件100提供更小的电阻率和更好的热耗散性能。另外，源极部分116c和栅极部分112b提供SOIC器件100对TO 252焊接区图形330的匹配。
用于比较的目的，在图4中，DPAC封装400被显示安装到焊接区图形300上。
本发明的高电流半导体功率SOIC器件可以用于很多高电流应用场合以替代TO 252(DPAK)器件。由单规格材料形成的相对厚的引线框导致更高的装配率并容许提高键合导线的数量，经提高数量的键合导线能被用于减小封装电阻。
很明显，上述实施例可以以许多方式变化而不背离本发明的范围。另外，特定实施例的各个方面可能包含不涉及同一实施例的其他方面的专利方面的主题内容。进一步，不同实施例的各个方面可以组合到一起。因此，本发明的范围将由附后的权利要求及其法定的等效内容确定。

Claims (15)

1.一种高电流半导体功率小外形集成电路封装，其特征在于，该封装包括：由具有大于8密尔mil厚度的单规格材料形成的相对厚的引线框，该引线框具有多个引线和第一引线框区，该第一引线框区包括焊接到其上的芯片；
一对设置在与芯片顶表面同一平面上的引线键合区域；
将芯片连接到多个引线上的铝制大直径键合导线；和
密封芯片，键合导线和引线框的至少一部分的树脂体。
2.如权利要求1所述的封装，其特征在于，其中所述封装具有可安装到TO252焊接区图形上的引线脚。
3.如权利要求1所述的封装，其特征在于，其中所述引线框区通过封装的底表面暴露。
4.如权利要求1所述的封装，其特征在于，其中所述芯片包括集成电路。
5.如权利要求4所述的封装，其特征在于，其中多个引线中的至少一个引线通过无导线焊接连接到所述集成电路终端。
6.如权利要求4所述的封装，其特征在于，其中所述集成电路包括FET场效应晶体管器件。
7.如权利要求6所述的封装，其特征在于，其中多个引线包括分别连接到FET器件的源极区域，栅极区域和漏极区域的源极引线，栅极引线和漏极引线，源极引线包括侧向延伸部分以及以互相相隔的关系从侧向延伸部分垂直延伸的第一和第二部分，栅极引线包括侧向延伸部分以及从侧向延伸部分垂直延伸的部分，源极引线侧向延伸部分以及第一和第二部分，以及栅极引线侧向延伸部分和从该侧向延伸部分垂直延伸的部分暴露于所述树脂体外。
8.如权利要求7所述的封装，其特征在于，其中所述源极引线包括经熔融的固体片。
9.如权利要求7所述的封装，其特征在于，其中源极引线和栅极引线设置成在半导体封装的与漏极引线相对的一侧互相相邻。
10.如权利要求7所述的封装，其特征在于，其中源极引线连接到设置在所述树脂体内部的源极键合区域，栅极引线连接到设置在所述树脂体内部的栅极键合区域，源极键合区域和栅极键合区域设置在与FET器件的顶表面同一个平面上，以及键合导线相对短并且将源极引线连接到源极键合区域以及将栅极引线连接到栅极键合区域。
11.如权利要求7所述的封装，其特征在于，其中漏极引线包括用于夹紧模具的切口。
12.如权利要求7所述的封装，其特征在于，其中漏极引线包括在回流焊接期间用于定位所述封装的切口。
13.如权利要求1所述的封装，其特征在于，其中键合导线具有直至20mil的厚度。
14.如权利要求1所述的封装，其特征在于，其中引线框进一步包括一对侧芯片杆。
15.一种具有平整引线的包容电子器件的高电流半导体功率器件小外形集成电路封装，其特征在于，该封装包括：
由具有大于8mil厚度的单规格材料形成的相对厚的引线框，该引线框包括多个引线和引线框区，该引线框区具有焊接到其上的电子器件；
一对设置在与电子器件的顶表面同一平面上的引线键合区域；
将电子器件连接到多个引线上的具有直至20mil厚度的铝制键合导线；和
密封电子器件，键合导线和引线框的至少一部分的树脂体。
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