CN101136328A - 半导体器件的栅极及其形成方法 - Google Patents
半导体器件的栅极及其形成方法 Download PDFInfo
- Publication number
- CN101136328A CN101136328A CNA2007101420984A CN200710142098A CN101136328A CN 101136328 A CN101136328 A CN 101136328A CN A2007101420984 A CNA2007101420984 A CN A2007101420984A CN 200710142098 A CN200710142098 A CN 200710142098A CN 101136328 A CN101136328 A CN 101136328A
- Authority
- CN
- China
- Prior art keywords
- layer
- tisin
- tin
- tin layer
- plasma treatment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 21
- 239000004065 semiconductor Substances 0.000 title claims abstract description 11
- 229910008482 TiSiN Inorganic materials 0.000 claims abstract description 29
- QRXWMOHMRWLFEY-UHFFFAOYSA-N isoniazide Chemical compound NNC(=O)C1=CC=NC=C1 QRXWMOHMRWLFEY-UHFFFAOYSA-N 0.000 claims abstract description 29
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 21
- 229920005591 polysilicon Polymers 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 36
- 238000009832 plasma treatment Methods 0.000 claims description 15
- 238000005979 thermal decomposition reaction Methods 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- ZLOKVAIRQVQRGC-UHFFFAOYSA-N CN(C)[Ti] Chemical compound CN(C)[Ti] ZLOKVAIRQVQRGC-UHFFFAOYSA-N 0.000 claims 2
- 238000007664 blowing Methods 0.000 claims 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 13
- 229910052731 fluorine Inorganic materials 0.000 description 13
- 239000011737 fluorine Substances 0.000 description 13
- 229910021332 silicide Inorganic materials 0.000 description 7
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 7
- 238000009792 diffusion process Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 239000007789 gas Substances 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000005507 spraying Methods 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000005546 reactive sputtering Methods 0.000 description 3
- 230000007850 degeneration Effects 0.000 description 2
- 125000002147 dimethylamino group Chemical group [H]C([H])([H])N(*)C([H])([H])[H] 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- MNWRORMXBIWXCI-UHFFFAOYSA-N tetrakis(dimethylamido)titanium Chemical compound CN(C)[Ti](N(C)C)(N(C)C)N(C)C MNWRORMXBIWXCI-UHFFFAOYSA-N 0.000 description 2
- QDGMSMUNXGCWRA-UHFFFAOYSA-N C[Ti](C)N Chemical compound C[Ti](C)N QDGMSMUNXGCWRA-UHFFFAOYSA-N 0.000 description 1
- 229910018557 Si O Inorganic materials 0.000 description 1
- 150000001768 cations Chemical class 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- SLPJGDQJLTYWCI-UHFFFAOYSA-N dimethyl-(4,5,6,7-tetrabromo-1h-benzoimidazol-2-yl)-amine Chemical group BrC1=C(Br)C(Br)=C2NC(N(C)C)=NC2=C1Br SLPJGDQJLTYWCI-UHFFFAOYSA-N 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4941—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a barrier layer between the silicon and the metal or metal silicide upper layer, e.g. Silicide/TiN/Polysilicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
一种形成半导体器件的栅极的方法包括以下步骤的至少其中之一：在晶圆衬底上方形成栅氧化物层。在栅氧化物层上方形成多晶硅层。在多晶硅层上方形成TiSiN层。在TiSiN层上方形成WSix层。
Description
技术领域
本发明涉及在金属氧化物硅半导体器件中使用的多晶硅-硅化物结构的栅极以及形成栅极的方法。
背景技术
在金属氧化物硅(MOS)半导体器件中，栅极可具有多晶硅．硅化物结构(polycide structure)。多晶硅一硅化物结构可以通过在栅氧化物层上和/或上方依次叠层掺杂多晶硅(例如，多晶硅层)和硅化物之后进行曝光和刻蚀工艺成行构图。硅化物层可以形成为使栅极的电阻率和线电阻最小。
硅化物层中使用的材料町包括硅化钨(WSix)。硅化物层可通过使用WE6和SiH4或WF6和SiH4Cl作为反应气体的化学气相沉积而形成。在WSix形成反应期间由反应气体WE6可以生成氟(F)。氟(F)可沿着多晶硅的晶界渗入至下方栅氧化物层。渗入的氟(F)可破坏在栅氧化物层(Si02)和硅衬底的界面处的Si-O结合和/或可以增加栅氧化物层的厚度。渗入的氟(F)可引起多个器件特性问题，诸如阈值电压的迁移或饱和电流的减少。
一种方法通过反应性溅射(reactive sputtering)可以形成在约150
到约1500
范围内的TiN层作为WSix层和多晶硅层之间的抗扩散膜。TiN层可具有柱状结构。通过反应性溅射形成TiN层可能具有下述缺点：TiN层具有柱状结构并且柱之间的界面可作为氟(F)的扩散通道，从而限制防止氟(F))扩散的效果。
发明内容
本发明实施方式涉及一种具有多晶硅-硅化物结构的栅极的金属氧化物硅(MOS)半导体器件及形成栅极的方法。实施方式提供了形成多晶硅．硅化物栅极结构的方法，其中非晶态TiSiN层形成在多晶硅层和WSix之间以防止氟扩散。
在实施方式中，一种形成半导体器件的栅极的方法包括以下步骤的至少其中之一：在晶圆衬底上方形成栅氧化物层。在栅氧化物层上方形成多晶硅层。在多晶硅层上方形成TiSiN层。在TiSiN层上方形成WSix层。
在实施方式中，半导体器件的栅极可具有叠层结构，其中栅氧化物层、多晶硅层和WSix层顺序层迭在晶圆衬底上方，并具有在多晶硅层和WSix层之间形成的TiSiN层。
附图说明
图1A到图1E示出了根据本发明实施方式形成半导体器件的栅极的方法；
图2A到图2B为根据本发明实施方式在SiH4喷射之前和之后TiN层的微组织中的变化的透射电子显微镜(TEM)照片。
具体实施方式
如图1A所示，根据本发明实施方式，栅氧化物层2可形成在硅晶圆1上方。多晶硅层3可形成在栅氧化物层2上方。如图1B所示，TiN层4可形成在多晶硅层3上方。TiN层4可由引入至腔室并在晶圆上方热分解的四二甲基氨基钛(Tetra Dimethyl Amino Titanium缩写为DMAT)形成。在实施方式中，晶圆可保持在约300℃和约500℃之间的温度范围以及腔室内的工作压力可维持在约1托到约10托的范围。根据实施方式，TiN层4可具有非晶态结构(amorphous structure)。TiN层可包括由TDMAT(四二甲基氨基钛)生成的碳、氧或其它类似材料，其可产生高的电阻率。
如图1C所示，为了去除杂质(例如，碳和/或氧)，根据实施方式可在TiN层4上执行等离子体处理以形成等离子体处理的TiN层7。等离子体处理可使用H2/N2气体等离子体5。在等离子体处理中，形成H2/N2气体等离子体并且将负偏压施加在晶圆上，从而正离子6(例如等离子体内的H+和N+)射入到TiN层4中。入射的离子可以具有高动能。由于这些离子与TiN层碰撞，由此降低TiN层内的杂质数量(例如，碳和/或氧)，这可降低TiN层的电阻率。在实施方式中，为了产生并维持等离子体所施加的功率可在约500W和约1000W之间。
在实施方式中，由于等离子体处理工艺，非晶态微组织(micro tissue)可改变为具有微晶界的结晶TiN。在实施方式中，TiN层可通过金属有机化学气相沉积(MOCVD)形成。在实施方式中，TDMAT的热分解工艺和H2/N2等离子体处理可重复多次。TiN层的厚度可根据执行热分解工艺和等离子体处理的次数增加。例如，当热分解/等离子体处理执行一次时，TiN层可具有约30
的厚度，而如果热分解工艺和等离子体处理执行两次，则厚度可为60
。根据实施方式，TiN层的厚度可为约30
和约500之间。
如图1D所示，根据实施方式，SiH4气体8喷射在等离子体处理的TiN层7上而形成TiSiN层9。根据实施方式，晶圆可维持在约300℃和约500℃之间的温度。根据实施方式，SiH4气体可以以约10sccm和约5000sccm的流速喷射约20到360秒。如果腔室内的工作压力太低，则不能有效地生成TiSiN。如果腔室内的工作压力太高，则可能生成不期望的颗粒。相应地，腔室的压力可维持在约0.1托和约10托之间。
在TiSiN层9形成期间，根据实施方式，整个TiN层7可转化成TiSiN层(例如，基于SiH4的喷射条件)。在实施方式中，可以仅部分TiN层7转化成TiSiN(例如，上部分)。TiSiN层9可具有约30
和约500
之间的厚度。在实施方式中，TiSiN层9的厚度可与SiH4喷射之前TiN层7的厚度基本上相同。根据实施方式，TiSiN层9可具有无晶界的非晶态结构。根据实施方式，无晶界的非晶态结构可防止将要形成的氟(F)的扩散通道和/或使将要形成的氟(F)的扩散通道最小(例如，TiSiN层9可具有相对好的防止扩散能力)。
图2A和图2B为根据实施方式在SiH4喷射之前和之后的MOCVD TiN的TEM照片。图2A为SiH4喷射之前微晶TiN的照片。图2B为在SiH4喷射之后TiN的上部分上的非晶态TiSiN(黑色部分)的照片。
如图1E所示，根据实施方式，WSix10可通过使用WF6和SiH4气体的CVD方法沉积。
在实施方式中，可以在多晶硅层上方形成TiSiN层，可以防止在沉积WSix时产生的氟(F)渗入栅氧化物层中，和/或使在沉积WSix时产生的氟(F)渗入栅氧化物层中最小。因此，根据实施方式，可以防止由于氟(F)而造成的栅氧化物的退化，和/或使由于氟(F)而造成的栅氧化物的退化最小。
对于本领域的技术人员显然可在公开的实施方式中进行各种修改和变型。因此，所公开的实施方式意在覆盖落入所附权利要求及其等同物范围内的显而易见的修改和变型。
Claims (14)
1.一种方法，包括：
在晶圆衬底上方形成栅氧化物层；
在所述栅氧化物层上方形成多晶硅层；
在所述多晶硅层上方形成TiSiN层；以及
在所述TiSiN层上方形成WSix层。
2.根据权利要求1所述的方法，其特征在于，所述方法为在半导体器件中形成栅极的方法。
3.根据权利要求1所述的方法，其特征在于，所述TiSiN层为非晶态层。
4.根据权利要求1所述的方法，其特征在于，所述形成TiSiN层的步骤包括形成TiN层。
5.根据权利要求4所述的方法，其特征在于，所述形成TiN层的步骤包括热分解四二甲基氨基钛源。
6.根据权利要求4所述的方法，其特征在于，所述形成TiSiN层的步骤包括在TiN层上执行等离子体处理以形成等离子体处理的TiN层。
7.根据权利要求6所述的方法，其特征在于，所述形成TiSiN层的步骤包括将SiH4气体喷射至等离子体处理的TiN层上。
8.一种装置包括：
在晶圆衬底上方形成的栅氧化物层；
在所述栅氧化物层上方形成的多晶硅层；
在所述多晶硅层上方形成的TiSiN层；以及
在所述TiSiN层上方形成的WSix层。
9.根据权利要求8所述的装置，其特征在于，所述装置包括半导体器件中的栅极。
10.根据权利要求8所述的装置，其特征在于，所述TiSiN层为非晶态层。
11.根据权利要求8所述的装置，其特征在于，所述TiSiN层由TiN层形成。
12.根据权利要求11所述的装置，其特征在于，所述TiN层通过热分解四二甲基氨基钛源形成。
13.根据权利要求11所述的装置，其特征在于，所述TiSiN层是通过在所述TiN层上执行等离子体处理以形成等离子体处理的TiN层的。
14.根据权利要求13所述的装置，其特征在于，所述TiSiN层是通过将SiH4气体喷射至等离子体处理的TiN层上而形成的。
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2006-0082226 | 2006-08-29 | ||
| KR1020060082226 | 2006-08-29 | ||
| KR1020060082226A KR100800647B1 (ko) | 2006-08-29 | 2006-08-29 | 반도체 소자의 게이트 전극 형성 방법 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101136328A true CN101136328A (zh) | 2008-03-05 |
| CN101136328B CN101136328B (zh) | 2010-11-17 |
Family
ID=39150305
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007101420984A Expired - Fee Related CN101136328B (zh) | 2006-08-29 | 2007-08-27 | 半导体器件的栅极及其形成方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20080054381A1 (zh) |
| KR (1) | KR100800647B1 (zh) |
| CN (1) | CN101136328B (zh) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102023257B (zh) * | 2009-09-15 | 2013-05-01 | 中芯国际集成电路制造(上海)有限公司 | 用于检测淹没式等离子枪工作状况的半导体器件及方法 |
| CN103137672A (zh) * | 2011-11-25 | 2013-06-05 | 上海华虹Nec电子有限公司 | 兼容自对准孔和表面沟道的金-氧-半场效应管的栅极膜结构及其制造方法 |
| CN107093581A (zh) * | 2016-02-17 | 2017-08-25 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制作方法和电子装置 |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8847300B2 (en) | 2009-05-08 | 2014-09-30 | SK Hynix Inc. | Semiconductor device and method for fabricating the same |
| US20150061042A1 (en) * | 2013-09-03 | 2015-03-05 | United Microelectronics Corp. | Metal gate structure and method of fabricating the same |
| CN106409677B (zh) * | 2015-07-30 | 2020-03-10 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及其形成方法 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5364803A (en) * | 1993-06-24 | 1994-11-15 | United Microelectronics Corporation | Method of preventing fluorine-induced gate oxide degradation in WSix polycide structure |
| US6891269B1 (en) * | 1995-07-05 | 2005-05-10 | Fujitsu Limited | Embedded electroconductive layer structure |
| TW379371B (en) * | 1997-12-09 | 2000-01-11 | Chen Chung Jou | A manufacturing method of tungsten silicide-polysilicon gate structures |
| KR100315036B1 (ko) * | 1999-11-04 | 2001-11-24 | 박종섭 | 반도체 소자의 게이트 전극 형성 방법 |
| KR20020063206A (ko) * | 1999-12-09 | 2002-08-01 | 동경 엘렉트론 주식회사 | 티탄실리콘나이트라이드막의 성막방법,티탄실리콘나이트라이드막으로 이루어진 확산방지막,반도체장치 및 그 제조방법, 및티탄실리콘나이트라이드막의 성막장치 |
| US6596643B2 (en) * | 2001-05-07 | 2003-07-22 | Applied Materials, Inc. | CVD TiSiN barrier for copper integration |
| KR100557548B1 (ko) * | 2003-03-11 | 2006-03-03 | 주식회사 하이닉스반도체 | 반도체소자의 형성방법 |
| KR100469913B1 (ko) * | 2003-04-02 | 2005-02-02 | 주식회사 하이닉스반도체 | 반도체소자의 제조방법 |
| US20050037613A1 (en) * | 2003-08-14 | 2005-02-17 | Stephan Grunow | Diffusion barrier for copper lines in integrated circuits |
-
2006
- 2006-08-29 KR KR1020060082226A patent/KR100800647B1/ko not_active IP Right Cessation
-
2007
- 2007-08-24 US US11/844,737 patent/US20080054381A1/en not_active Abandoned
- 2007-08-27 CN CN2007101420984A patent/CN101136328B/zh not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102023257B (zh) * | 2009-09-15 | 2013-05-01 | 中芯国际集成电路制造(上海)有限公司 | 用于检测淹没式等离子枪工作状况的半导体器件及方法 |
| CN103137672A (zh) * | 2011-11-25 | 2013-06-05 | 上海华虹Nec电子有限公司 | 兼容自对准孔和表面沟道的金-氧-半场效应管的栅极膜结构及其制造方法 |
| CN107093581A (zh) * | 2016-02-17 | 2017-08-25 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制作方法和电子装置 |
| CN107093581B (zh) * | 2016-02-17 | 2020-05-15 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制作方法和电子装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100800647B1 (ko) | 2008-02-01 |
| CN101136328B (zh) | 2010-11-17 |
| US20080054381A1 (en) | 2008-03-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100524630C (zh) | 用于半导体制造的栅极掺杂物激活方法 | |
| US6309713B1 (en) | Deposition of tungsten nitride by plasma enhanced chemical vapor deposition | |
| US7084504B2 (en) | Boron incorporated diffusion barrier material | |
| US7452810B2 (en) | Method of forming a barrier layer of a semiconductor device | |
| CN101136328B (zh) | 半导体器件的栅极及其形成方法 | |
| US20010046765A1 (en) | Method for producing a barrier layer in an electronic component and method for producing an electronic component with a barrier layer | |
| JP3358328B2 (ja) | 高融点金属膜の成膜方法 | |
| CN101154576A (zh) | 形成具有低电阻的钨多金属栅极的方法 | |
| CN107408600B (zh) | 用于太阳能电池的发射极层的沉积方法 | |
| JP2002016248A (ja) | 半導体装置の製造方法 | |
| US20060292862A1 (en) | Method for forming barrier metal of semiconductor device | |
| CN1945843B (zh) | 半导体器件以及半导体器件的制造方法 | |
| JP3332909B2 (ja) | ゲート電極構造体、その形成方法及び電極構造体の形成方法 | |
| US20020033533A1 (en) | Interconnect structure for use in an integrated circuit | |
| JPH07297136A (ja) | 半導体装置の製造方法 | |
| KR100528446B1 (ko) | 반도체 소자의 콘택 형성방법 | |
| JPH01160009A (ja) | 半導体装置の製造方法 | |
| JPH08316336A (ja) | 半導体装置および半導体装置の製造方法 | |
| JP3750285B2 (ja) | 半導体装置の保護回路 | |
| US20090170311A1 (en) | Method for fabricating contact in semiconductor device | |
| KR20040053459A (ko) | 반도체 소자의 장벽 금속층 형성 방법 | |
| KR101161660B1 (ko) | 반도체 소자의 제조방법 | |
| KR20020027693A (ko) | 메탈콘택의 형성 방법 | |
| JPH05315285A (ja) | 半導体装置及びその製造方法 | |
| JPH03248562A (ja) | 半導体装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20101117 Termination date: 20130827 |