CN101079409A - 互连结构及其制造方法 - Google Patents
互连结构及其制造方法 Download PDFInfo
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
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- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
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- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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Abstract
本发明公开了增强在化学蚀刻的介质材料和贵金属衬里之间的粘附的互连结构及其制造方法。根据本发明,化学蚀刻介质材料经历修改介质材料的化学特性的处理步骤以使处理的表面具有疏水性。处理步骤在沉积贵金属衬里之前执行并辅助增强化学蚀刻的介质材料和贵金属衬里之间的粘附。
Description
技术领域
本发明涉及半导体结构及其制造方法。更具体地说,本发明涉及具有增强贵金属衬里和邻近的介质材料之间的粘附的互连结构。通过表面处理化学蚀刻介质材料以形成疏水表面提供增强的粘附性。在介质材料上的该疏水表面又增强了用于随后设置的贵金属衬里的介质材料的粘附强度。
背景技术
通常,半导体器件包括形成在半导体衬底上形成的集成电路(IC)的多个电路。一般布线信号通路的复杂网络以连接分布在衬底的表面上的电路元件。经过器件的这些信号的有效布线需要形成多级或多层的方案,例如,单或双镶嵌布线结构。布线结构典型地包括铜,Cu,因为与铝,Al基互连相比,Cu基互连在复杂半导体芯片上的大量晶体管之间提供较高速度的信号传输。
在典型的互连结构中,金属过孔与半导体衬底垂直,金属线与半导体衬底平行。在今天的IC生产芯片中,通过在具有小于4.0的介电常数的介质材料中嵌入金属线和金属过孔(例如,导电特征)实现了信号速度的进一步提高和在邻近金属线中信号(众所周知的“串扰”)的减小。
在现在的互连结构中,将等离子体气相沉积(PVD)的TaN层和PVDCu籽晶层分别用作Cu扩散阻挡和镀覆籽晶,用于先进的互连应用。然而,随着临界尺寸的减小,希望PVD基沉积技术将遇到保形和覆盖问题。这些又会导致在镀覆中的填充问题,例如引起可靠性问题和成品率降低的中间和边缘空隙。
解决该问题的一种方式是减小PVD材料的总厚度,并利用用作扩散阻挡和镀覆籽晶的单层衬里材料。解决上述问题的另一种方式是使用与常规的PVD技术相比产生较好的台阶覆盖和保形的化学气相沉积(CVD)或原子层沉积(ALD)。CVD或ALD钌,Ru,和铱,Ir,对于先进的互连应用具有取代现在PVD基阻挡/镀覆籽晶的潜力。参见,例如,M.Lane等人的“Liner Materials for Direct Electrodeposition of Cu”,Appl.Phys.Letters,83,n12,2330(2003)和M.Lane等人的“Interfacial Relationshipsin Microelectronic Devices”,Mat.Res.Soc.Symp.Proc.,766,153(2003)。
使用CVD或ALD Ru,Ir或其它类似贵金属还具有优势,因为Cu和其它类似金属导体具有与贵金属,例如,Ru很好的粘附性。而且,贵金属Cu系统是热力学稳定的并显示基本上是不融和的。此外,贵金属,例如Ru不能轻易地氧化并具有相当低的体电阻率。该贵金属的低电阻率是其实现直接电镀Cu的重要特征。
尽管上述优势可以通过使用贵金属衬里获得,最近的试验结果显示贵金属衬里和介质界面之间较差的粘附。贵金属,例如Ru,与C和O微弱地接合,是在介质表面上直接沉积贵金属的重要的问题。因为较差的贵金属/介质粘附问题,晶片剥离问题在Cu电镀和化学机械抛光(CVD)时变得明显。
通过上述描述,需要提供一种增强贵金属衬里和邻近的介质材料之间的粘附的互连结构。
发明内容
本发明提供了互连结构及其制造方法,其中增强了化学蚀刻的介质材料和贵金属衬里之间的粘附,实现了在先进的互连技术中结合贵金属衬里。本发明的互连结构及其制造方法还因为提供了更多的导电特征而提供了比常规互连结构更好的电性能。
本发明的另一个优点是本发明的互连结构使用单薄膜层(即,贵金属衬里)作为扩散阻挡/镀覆籽晶层,取代了常规互连结构技术中要求的常规扩散阻挡和镀覆籽晶层。这样,由于使用贵金属扩散阻挡取代扩散阻挡层和镀覆籽晶层而提供了较低成本的互连结构。
概括地说,本申请的互连结构包括:
介质材料,在其中包括至少一个开口,其中所述至少一个开口内的所述介质材料的表面部分是疏水的;
贵金属衬里,在所述至少一个开口内;以及
互连导电材料,在所述贵金属扩散衬里上。
所述至少一个开口包括线区域,过孔区域和其组合。本发明中使用了单和双镶嵌互连结构。本发明还使用了闭过孔底部结构,开过孔底部结构和固定(anchored)过空底部结构。
除了上述互连结构,本发明还提供了制造该结构的方法。概括地说,本发明的方法包括以下步骤:
在介质材料中形成至少一个开口;
处理至少在所述至少一个开口内的所述介质材料的暴露表面以使所述暴露表面疏水;
在所述至少一个开口内形成贵金属衬里;以及
在所述至少一个开口内的所述贵金属衬里上形成互连导电材料。
根据本发明,处理步骤包括硅烷化,UV硬化,或其组合。
附图说明
图1是(通过截面图)示出在介质材料中提供至少一个开口的经过本发明方法的早期阶段的初始互连结构的图示。
图2是(通过截面图)示出在形成修改的介质表面层后的图1的结构的图示。
图3是(通过截面图)示出在所述修改的介质表面层上形成贵金属衬里后的图2的结构的图示。
图4是(通过截面图)示出在沉积互连导体材料后的图3的结构的图示。
图5是(通过截面图)示出在平面化后的图4的结构的图示。
具体实施方式
本发明提供了在介质材料和贵金属衬里之间具有增强的粘附的互连结构及其制造方法,现在将通过参考结合本申请的下述描述和附图更加详细地描述本发明。下面详细描述的本申请的附图是为了示例的目的,因此并没有按比例示出。
为了更好地理解本发明,在下面的描述中提供了许多具体说明,例如具体结构,元件,材料,尺寸,处理步骤和技术。然而,本领域的技术人员将意识到本发明没有这些具体说明也可以实践。在其它示例中,为了不使本发明晦涩,没有详细描述公知结构或处理步骤。
可以理解当作为层,区域或衬底的元件被称为“在其它元件上”或“在其它元件上面”时,其直接在其它元件上或还存在中间元件。相反,当元件被称为“直接在其它元件上”或“直接在其它元件上面”时,没有中间元件存在。还可以理解当元件被称为“在其它元件下”或“在其它元件下面”时,其可以直接在其它元件下或下面,或存在中间元件。相反,当元件被称为“直接在其它元件下”或“直接在其它元件下面”时,则不存在中间元件。
本发明的处理流程以提供图1中示出的初始互连结构10开始。具体地说,图1中示出的初始互连结构10包括多层互连,其包括下互连层12和上互连层16,它们可选地,但一般不必需地,通过介质覆层14分开。位于包括一个或多个半导体器件的半导体衬底上的下互连层12,包括具有通过阻挡层22与第一介质材料18分开的至少一个导体特征(例如,导体区域)20的第一介质材料18。上互连层16包括在其中具有至少一个开口的第二介质材料24。
具体地说,图1中示出了两个开口;参考标号26表示用于单镶嵌结构的线开口,而参考标号28A和28B表示分别用于双镶嵌结构的过孔开口和线开口。尽管图1示出了分开的线开口和用于过孔和线的开口,本发明仍包含只存在线开口的情况或存在用于组合的过孔和线的开口的情况。
图1中示出的初始互连结构10利用本领域中众所周知的标准互连工艺形成。例如,初始互连结构10可以通过首先将第一介质材料18施加到衬底(未示出)的表面形成。未示出的衬底包括半导体材料,绝缘材料,导电材料或其组合。当衬底由半导体材料构成时,可以使用任意半导体,例如Si,SiGe,SiGeC,SiC,Ge合金,GaAs,InAs,InP和其它III/V或II/VI化合物半导体。除了这些列出的半导体材料的类型,本发明还包含半导体衬底是层状半导体,例如Si/SiGe,Si/SiC,绝缘体上硅(SOI)或绝缘体上硅锗(SGOI)的情况。
当衬底是绝缘材料时,绝缘材料可以是有机绝缘体,无机绝缘体和其包括多层的组合。当衬底是导电材料时,衬底包括,例如,多晶Si,单质金属,单质金属的合金,金属硅化物,金属氮化物和其包括多层的组合。当衬底包括半导体材料时,可以在其上形成一个和多个半导体器件,例如,互补金属氧化物半导体(CMOS)器件。
下互连层12的第一介质材料18包括含有无机介质或有机介质的任何层内或层间介质。第一介质材料18是多孔或非多孔的。用于第一介质材料18的适合的介质的一些实例包括,但不限于:SiO2,倍半硅氧烷,包括Si,C,O和H原子的C掺杂氧化物(例如,有机硅酸盐),热固性聚芳基醚,或其多层。本申请中使用的术语“聚芳基”表示芳基部分或通过键,稠环,或例如氧,硫,砜,亚砜,羰基等的惰性链接团链接在一起的惰性替代的芳基部分。
第一介质材料18典型地具有约4.0或更小的介电常数,更典型地具有约2.8或更小的介电常数。这里涉及的所有的介电常数都相对于真空。与具有高于4.0的介电常数的介质材料相比这些介质通常具有较低的寄生串扰。第一介质材料18的厚度根据使用的介质材料和下互连层12内介质的具体数量而改变。典型地,对于一般的互连结构,第一介质材料18具有从约200到约450nm的厚度。
下互连层12还具有嵌入(即,位于其中)第一介质材料18的至少一个导电特征20。导电特征20包括通过阻挡层22与第一介质材料18分开的导电区域。导电特征20通过光刻(即,将光致抗蚀剂施加到第一介质材料18的表面,将光致抗蚀剂暴露到要求的辐射图形,并利用常规抗蚀剂显影剂显影暴露的抗蚀剂),在第一介质材料18中蚀刻(干蚀刻和湿蚀刻)开口并用阻挡层22填充蚀刻的区域,随后用导电材料形成导电区域。通过沉积工艺,例如,原子层沉积(ALD),化学气相沉积(CVD),等离子体增强化学气相沉积(PECVD),溅射,化学溶液沉积,或镀覆形成包括Ta,TaN,Ti,TiN,Ru,RuN,W,WN或用作阻挡的任意其它材料的阻挡层22以防止导电材料穿过其中扩散。
在一些实施例中,这里没有具体示出,第一介质材料18包括具有减小的疏水性的修改的介质表面层,其在形成下互连层12的阻挡层22之前形成。如果存在,修改的介质表面层位于阻挡层22和第一介质材料18之间,该修改的表面层利用硅烷化,UV硬化或其组合形成。在介质材料上提供疏水表面层的该介质表面处理技术将在下文中详细描述。
阻挡层22的厚度根据沉积工艺的具体方法以及使用的材料而改变。典型地,阻挡层22具有从约4到约40nm的厚度,从约7到约20nm的厚度更加典型。
在形成阻挡层22之后,用形成导电区域的导电材料填充第一介质材料18内的开口的保留区域。在形成导电区域中使用的导电材料包括,例如,多晶Si,导电金属,包括至少一种导电金属的合金,导电金属硅化物或其组合。优选地,在形成导电区域中使用的导电材料是导电金属,例如Cu,W或Al,本发明更优选Cu或Cu合金(例如,AlCu)。导电材料利用常规沉积工艺包括,但不限于:CVD,PECVD,溅射,化学溶液沉积或镀覆填充在第一介质材料18中的保留开口中。在这些沉积后,使用常规平面化工艺例如,化学机械抛光(CMP)提供阻挡层22和导电特征20都具有与第一介质材料18的上表面基本上共面的上表面的结构。
在形成至少一个导电特征20后,利用常规沉积工艺,例如,CVD,PECVD,化学溶液沉积或蒸发,在下互连层12的表面上可选地,但一般不必需地形成介质覆层14。介质覆层14包括任意合适的介质覆盖材料,例如,SiC,Si4NH3,SiO2,碳掺杂氧化物,氮和氢掺杂硅碳化物SiC(N,H)或其多层。覆层14的厚度根据用于形成其的技术以及层的材料构成而改变。典型地,覆层14具有从约15到约55nm的厚度,从约25到约45nm的厚度更加典型。
接着,上互连层16通过将第二介质材料24施加到如果存在的可选覆层14的上暴露表面上,或第一介质材料18的表面上。第二介质材料24包括与下互连层12的第一介质材料18相同或不同,优选相同的介质材料。用于第一介质材料18的工艺技术和厚度范围在此也适用于第二介质材料24。接着,如上所述,利用光刻,和蚀刻在第二介质材料24中形成至少一个开口。蚀刻包括干蚀刻工艺,湿化学蚀刻工艺或其组合。术语“干蚀刻”在这里用于表示蚀刻技术,例如反应离子蚀刻,粒子束蚀刻,等离子体蚀刻或激光烧蚀。
在图1中,示出了两个开口;参考标号26表示用于单镶嵌结构的线开口,而参考标号28A和28B分别表示用于双镶嵌结构的过孔开口和线开口。再次强调本发明的预期结构只包括开口26或开口28A和28B。
在实例中,当形成过孔开口28A和线开口28B时,蚀刻步骤还除去部分在导电特征20上面的介质覆层14。
现在参考示出形成修改的介质表面层30后图1的结构的图2。如所示,修改的介质表面层30位于第二介质材料24的暴露的表面上。根据本发明,修改的介质表面层30是疏水介质表面,其增强了随后形成的贵金属衬里的粘附强度。注意到现有工艺互连结构中的介质材料具有亲水表面。
修改的介质表面层30利用硅烷化,UV硬化或其组合形成。
在使用硅烷化时,在本发明中使用在本领域公知的硅烷化试剂。本发明中使用的一种硅烷化试剂是具有通式(R2N)xSiR′y的化合物,其中x和y是分别从1到3和3到1的整数,R和R′,是氢,烷基,烷氧基,芳基,烯丙基部分或乙烯基部分中的任何一个。
对于本申请,硅烷化在旋涂,液体,汽体(在炉中或在CVD室中)或超临界CO2媒介中执行,例如,如美国专利申请公开No.2005/0106762中所详细描述。
对于各种情况,本发明的重要目的是解决没有大气湿度的总的硅烷化试剂,因为存在的任意湿度会减小硅烷化反应的功效。还有,退火后的硅烷化或硅烷化后的退火或高温(大于200℃)硅烷化的组合优选硅烷化自身,由于导致在介质膜中硅烷醇含量的最大减小。
在液体媒质中使用硅烷化试剂时,它们优选地在具有低表面张力的任意非极性有机溶剂中溶解,以有效地穿透孔。该溶剂的实例包括,但不限于:己烷,庚烷,二甲苯,碳酸丙烯等。对于有效硅烷化重要的氨基硅烷的浓度可以低至溶液的1重量%,或硅烷化试剂可以其不稀释液体形式使用。对于最有效硅烷化的要求范围为在溶液中从2%到10%。溶液可以在介质膜上旋涂或在湿化学槽中使用,其中具有在介质中限定的互连特征的晶片浸入的时间范围从1分钟到一小时或更多。硅烷化的温度可以是室温(20-30℃)或更高。硅烷化后,晶片在纯溶剂中清洗并随后在热板或在炉中烘烤至高达450℃高温。在使用退火时,退火温度典型地约200℃或更高,退火温度从约200℃到约350℃更加典型。
当在本发明中使用UV硬化时,在常规UV硬化工具中使用UV硬化并随后使结构经历从约200℃到约450℃的衬底温度下的UV暴露步骤。利用产生从约150到约500nm,优选地从约190到约250nm波长的光的源执行UV暴光步骤以照射表面,特别是介质材料的暴露表面。UV暴光步骤持续的时间范围从约0.5到约100分钟。UV暴光可以在环境气体,例如惰性气体,包括,例如,He,Ar,Xe,N2或其混合物例如形成气体H2/O2中执行。可选地,化学活性气体可以加到惰性气体中。可选地在本发明中使用的化学活性气体的实例包括:H2,CH4,三甲基硅烷,乙烯或具有公式HSiRR1R2的硅烷衍生物,其中R,R1,R2可以相同或不同,并从包括甲基,乙基,丙基,乙烯基,烯丙基,甲氧基和乙氧基的组中选择。
修改的介质表面层30的厚度根据使用的初始介质材料以及使用的准确处理步骤而改变。典型地,修改的介质材料表面层30具有从约0.5到约8nm的厚度,从约2到约4nm的厚度更典型。
图3示出在修改的介质表面层30的暴露的表面上形成贵金属衬里32后形成的结构。贵金属衬里32由来自元素周期表VIIIA族的金属或金属合金组成。合适的VIIIA族元素的实例包括,但不限于:Ru,Ta,Ir,Rh,Pt和其合金,例如,RuTa。在一些优选实施例中,Ru或RuTa用作贵金属衬里。注意到本申请的贵金属衬里32用作扩散阻挡,在一些实施例中,还用作镀覆籽晶层。
贵金属衬里32通过常规沉积工艺包括,例如,化学气相沉积(CVD),等离子体增强化学气相沉积(PECVD),原子层沉积(ALD),镀覆,溅射和物理气相沉积(PVD)形成。贵金属衬里32的厚度根据多个因素变化,包括贵金属衬里32的构成材料和在形成其使用的技术。典型地,贵金属衬里32具有从约0.5到约10nm的厚度,小于6nm的厚度更典型。
图4示出在用互连导电材料34填充在第二介质材料24内的至少一个开口后图3的结构。互连导电材料34包括与在导电特征20中存在的相同或不同的导电材料。优选地,使用Cu,Al,W或其合金,Cu或AlCu更优选。互连导电材料34利用上述提到的在提供导电特征20中使用的一种沉积工艺形成。
图5示出在执行常规平面化工艺,例如,研磨,化学机械抛光(CMP)或其组合后图4的结构。注意到在图5中,第二介质材料24的上表面,修改的介质层30,贵金属衬里32和互连导电材料34基本上是共面的。
还注意到图5中示出的结构表示闭过孔底部结构。在本发明的其它实施例中,提供了开过孔底部结构。在开过孔结构中,互连导电材料34与至少一个导电特征20的表面直接连接。利用离子轰击或其它类似方向性蚀刻工艺从过孔28A的底部除去贵金属衬里32形成开过孔底部结构。本发明还预期固定过孔底部结构。利用选择性蚀刻工艺首先在导电特征20中蚀刻凹槽形成固定过孔底部结构。选择性蚀刻典型地在执行上述介质表面修改后发生。在形成贵金属衬里后,通过方向性蚀刻工艺典型地从过孔和凹槽的底部除去贵金属衬里。随后如上所述形成导电材料34。
尽管通过其优选实施例具体地示出和描述了本发明,本领域的技术人员可以理解在不脱离本发明的精神和范围的前提下可以在形式和细节上进行上述和其它修改。因此,本发明旨在落入所附权利要求书的范围内,而不限于描述和示出的具体形式和细节。
Claims (20)
1.一种互连结构,包括:
介质材料,在其中包括至少一个开口,其中所述至少一个开口内的所述介质材料的表面部分是疏水的;
贵金属衬里,在所述至少一个开口内;以及
互连导电材料,在所述贵金属扩散衬里上。
2.根据权利要求1的互连结构,其中所述介质材料具有约4.0或更小的介电常数。
3.根据权利要求2的互连结构,其中所述介质材料包括SiO2,倍半硅氧烷,包括Si,C,O和H原子的C掺杂氧化物,或热固性聚芳基醚。
4.根据权利要求1的互连结构,其中所述至少一个开口是线开口,线开口和过孔开口的结合,或其组合。
5.根据权利要求1的互连结构,其中所述介质材料位于包括至少一个导电特征的互连层上,所述至少一个导电特征嵌入具有约4.0或更小的介电常数的介质内。
6.根据权利要求1的互连结构,其中所述贵金属衬里包括Ru,Ta,Ir,Pt或其合金。
7.根据权利要求1的互连结构,其中所述互连导电材料包括多晶硅,导电金属,包括至少一种导电金属的合金,导电金属硅化物或其组合。
8.根据权利要求1的互连结构,其中所述贵金属衬里包括含Ru材料,所述互连导电材料包括含Cu材料。
9.根据权利要求1的互连结构,其中所述贵金属衬里存在于所述至少一个开口的底部中。
10.根据权利要求1的互连结构,其中所述贵金属衬里在所述衬里的底部不存在,所述互连导电材料与嵌入下互连层的下面的导电特征直接接触。
11.一种互连结构,包括:
介质材料,在其中包括至少一个开口,其中所述至少一个开口内的所述介质材料的表面部分是疏水的;
含Ru衬里,在所述至少一个开口内;以及
含Cu互连导电材料,在所述含Ru贵金属衬里上。
12.一种形成互连结构的方法,包括以下步骤:
在介质材料中形成至少一个开口;
处理至少在所述至少一个开口内的所述介质材料的暴露表面以使所述暴露表面疏水;
在所述至少一个开口内形成贵金属衬里;以及
在所述至少一个开口内的所述贵金属衬里上形成互连导电材料。
13.根据权利要求12的方法,其中所述处理包括硅烷化,UV硬化,或其组合。
14.根据权利要求13的方法,其中所述处理包括硅烷化,所述硅烷化包括硅烷化试剂,所述硅烷化试剂在选自旋涂,液体,汽体和超临界CO2的媒介中施加到所述介质材料的所述暴露表面。
15.根据权利要求14的方法,其中所述硅烷化试剂包括具有通式(R2N)xSiR′y的化合物,其中x和y是分别从1到3和3到1的整数,R和R′是氢,烷基,烷氧基,芳基,烯丙基部分或乙烯基部分中的任何一个。
16.根据权利要求14的方法,其中所述硅烷化包括在硅烷化之前或之后执行的退火步骤。
17.根据权利要求14的方法,其中所述硅烷化在大于200℃的温度下执行。
18.根据权利要求13的方法,其中所述处理包括UV硬化,所述UV硬化在从约200℃到约450℃的衬底温度下执行。
19.根据权利要求18的方法,其中所述UV硬化利用生成从约150到约500nm波长的光的源执行。
20.根据权利要求18的方法,其中所述UV硬化在惰性气体中执行,所述惰性气体可选地包括选自如下的化学活性气体:H2,CH4,三甲基硅烷,乙烯或具有公式HSiRR1R2的硅烷衍生物,其中R,R1,R2相同或不同,并包括甲基,乙基,丙基,乙烯基,烯丙基,甲氧基和乙氧基中的一种。
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101911264B (zh) * | 2008-03-19 | 2012-07-04 | 日矿金属株式会社 | 在基材上形成有阻挡层兼种子层的电子构件 |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4675258B2 (ja) * | 2006-02-22 | 2011-04-20 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法および半導体装置 |
US7446058B2 (en) * | 2006-05-25 | 2008-11-04 | International Business Machines Corporation | Adhesion enhancement for metal/dielectric interface |
JP4555320B2 (ja) * | 2007-06-15 | 2010-09-29 | 東京エレクトロン株式会社 | 低誘電率絶縁膜のダメージ回復方法及び半導体装置の製造方法 |
JP2009164198A (ja) * | 2007-12-28 | 2009-07-23 | Panasonic Corp | 半導体装置の製造方法 |
CN101911265B (zh) * | 2008-03-19 | 2012-07-04 | 日矿金属株式会社 | 在基材上形成有阻挡层兼种子层的电子构件 |
US8236684B2 (en) * | 2008-06-27 | 2012-08-07 | Applied Materials, Inc. | Prevention and reduction of solvent and solution penetration into porous dielectrics using a thin barrier layer |
JP5396837B2 (ja) * | 2008-06-27 | 2014-01-22 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
DE102008035815A1 (de) * | 2008-07-31 | 2010-02-04 | Advanced Micro Devices, Inc., Sunnyvale | Verbessern der strukturellen Integrität und Definieren kritischer Abmessungen von Metallisierungssystemen von Halbleiterbauelementen unter Anwendung von ALD-Techniken |
WO2010016958A1 (en) * | 2008-08-07 | 2010-02-11 | International Business Machines Corporation | Interconnect structure with metal cap self-aligned to a surface of an embedded conductive material |
US20100084766A1 (en) * | 2008-10-08 | 2010-04-08 | International Business Machines Corporation | Surface repair structure and process for interconnect applications |
KR101060619B1 (ko) * | 2009-02-09 | 2011-08-31 | 주식회사 하이닉스반도체 | 반도체 장치의 소자분리막 제조방법 및 이를 이용한 비휘발성 메모리 장치 제조방법 |
DE102009010845B4 (de) * | 2009-02-27 | 2016-10-13 | Advanced Micro Devices, Inc. | Verfahren zur Herstellung eines Mikrostrukturbauelements mit einer Metallisierungsstruktur mit selbstjustierten Luftspalten und wieder aufgefüllten Luftspaltausschließungszonen |
US8999734B2 (en) | 2009-03-10 | 2015-04-07 | American Air Liquide, Inc. | Cyclic amino compounds for low-k silylation |
US8242019B2 (en) * | 2009-03-31 | 2012-08-14 | Tokyo Electron Limited | Selective deposition of metal-containing cap layers for semiconductor devices |
US7928570B2 (en) * | 2009-04-16 | 2011-04-19 | International Business Machines Corporation | Interconnect structure |
US8288271B2 (en) * | 2009-11-02 | 2012-10-16 | International Business Machines Corporation | Method for reworking antireflective coating over semiconductor substrate |
US8178439B2 (en) | 2010-03-30 | 2012-05-15 | Tokyo Electron Limited | Surface cleaning and selective deposition of metal-containing cap layers for semiconductor devices |
JP2011216597A (ja) * | 2010-03-31 | 2011-10-27 | Fujitsu Semiconductor Ltd | 半導体装置の製造方法及び成膜装置 |
US8592304B2 (en) * | 2010-04-08 | 2013-11-26 | United Microelectronics Corp. | Method for filling metal |
US8586472B2 (en) | 2010-07-14 | 2013-11-19 | Infineon Technologies Ag | Conductive lines and pads and method of manufacturing thereof |
US20120086101A1 (en) * | 2010-10-06 | 2012-04-12 | International Business Machines Corporation | Integrated circuit and interconnect, and method of fabricating same |
JP5976776B2 (ja) * | 2011-04-08 | 2016-08-24 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | Uv処理、化学処理、および堆積のための装置および方法 |
US8492170B2 (en) * | 2011-04-25 | 2013-07-23 | Applied Materials, Inc. | UV assisted silylation for recovery and pore sealing of damaged low K films |
WO2012166133A1 (en) | 2011-06-01 | 2012-12-06 | Hewlett-Packard Development Company, L.P. | Managing printer dry time |
US9018089B2 (en) * | 2011-08-30 | 2015-04-28 | International Business Machines Corporation | Multiple step anneal method and semiconductor formed by multiple step anneal |
JP5717681B2 (ja) | 2012-03-23 | 2015-05-13 | 株式会社東芝 | 膜の形成方法及び半導体装置 |
TW201403711A (zh) * | 2012-07-02 | 2014-01-16 | Applied Materials Inc | 利用氣相化學暴露之低k介電質損傷修復 |
US9659869B2 (en) * | 2012-09-28 | 2017-05-23 | Intel Corporation | Forming barrier walls, capping, or alloys /compounds within metal lines |
US9076848B2 (en) | 2013-03-12 | 2015-07-07 | International Business Machines Corporation | Semiconductor device channels |
US9099471B2 (en) | 2013-03-12 | 2015-08-04 | International Business Machines Corporation | Semiconductor device channels |
US9111935B2 (en) | 2013-03-12 | 2015-08-18 | International Business Machines Corporation | Multiple-patterned semiconductor device channels |
EP3126061B1 (en) * | 2014-04-04 | 2020-06-03 | HP Indigo B.V. | Fluid application |
US10008408B2 (en) * | 2016-06-15 | 2018-06-26 | Globalfoundries Inc. | Devices and methods of forming asymmetric line/space with barrierless metallization |
US10074559B1 (en) | 2017-03-07 | 2018-09-11 | Applied Materials, Inc. | Selective poreseal deposition prevention and residue removal using SAM |
US10847410B2 (en) | 2018-09-13 | 2020-11-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Ruthenium-containing semiconductor structure and method of manufacturing the same |
US10832950B2 (en) | 2019-02-07 | 2020-11-10 | International Business Machines Corporation | Interconnect with high quality ultra-low-k dielectric |
US10927451B2 (en) | 2019-02-08 | 2021-02-23 | Applied Materials, Inc. | Methods and apparatus for patterning substrates using asymmetric physical vapor deposition |
US11495532B2 (en) | 2020-02-27 | 2022-11-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Techniques to inhibit delamination from flowable gap-fill dielectric |
US20220100088A1 (en) * | 2020-09-30 | 2022-03-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | In-Situ Deposition and Densification Treatment for Metal-Comprising Resist Layer |
WO2023162264A1 (ja) * | 2022-02-28 | 2023-08-31 | 株式会社レゾナック | 半導体装置の製造方法、及び半導体装置 |
WO2023195322A1 (ja) * | 2022-04-06 | 2023-10-12 | Hdマイクロシステムズ株式会社 | 半導体装置の製造方法、ハイブリッドボンディング絶縁膜形成材料及び半導体装置 |
Family Cites Families (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60177110A (ja) | 1984-02-24 | 1985-09-11 | Mazda Motor Corp | 多孔質鉄系焼結部材表面の封孔方法 |
US5133840A (en) | 1990-05-15 | 1992-07-28 | International Business Machines Corporation | Surface midification of a polyimide |
WO1992007968A1 (en) | 1990-10-26 | 1992-05-14 | International Business Machines Corporation | STRUCTURE AND METHOD OF MAKING ALPHA-Ta IN THIN FILMS |
US5221449A (en) | 1990-10-26 | 1993-06-22 | International Business Machines Corporation | Method of making Alpha-Ta thin films |
US5900443A (en) | 1993-11-16 | 1999-05-04 | Stinnett; Regan W. | Polymer surface treatment with particle beams |
EP0751566A3 (en) | 1995-06-30 | 1997-02-26 | Ibm | Metal thin film barrier for electrical connections |
US5930669A (en) | 1997-04-03 | 1999-07-27 | International Business Machines Corporation | Continuous highly conductive metal wiring structures and method for fabricating the same |
US6800928B1 (en) | 1997-05-28 | 2004-10-05 | Texas Instruments Incorporated | Porous integrated circuit dielectric with decreased surface porosity |
US6312793B1 (en) * | 1999-05-26 | 2001-11-06 | International Business Machines Corporation | Multiphase low dielectric constant material |
US6921722B2 (en) | 2000-05-30 | 2005-07-26 | Ebara Corporation | Coating, modification and etching of substrate surface with particle beam irradiation of the same |
US6348407B1 (en) * | 2001-03-15 | 2002-02-19 | Chartered Semiconductor Manufacturing Inc. | Method to improve adhesion of organic dielectrics in dual damascene interconnects |
JP2002353308A (ja) * | 2001-05-28 | 2002-12-06 | Toshiba Corp | 半導体装置及びその製造方法 |
US6677251B1 (en) | 2002-07-29 | 2004-01-13 | Taiwan Semiconductor Manufacturing Co., Ltd | Method for forming a hydrophilic surface on low-k dielectric insulating layers for improved adhesion |
US6861355B2 (en) | 2002-08-29 | 2005-03-01 | Micron Technology, Inc. | Metal plating using seed film |
JP4225765B2 (ja) * | 2002-10-31 | 2009-02-18 | 日揮触媒化成株式会社 | 低誘電率非晶質シリカ系被膜の形成方法および該方法より得られる低誘電率非晶質シリカ系被膜 |
US6838300B2 (en) | 2003-02-04 | 2005-01-04 | Texas Instruments Incorporated | Chemical treatment of low-k dielectric films |
JP4050631B2 (ja) * | 2003-02-21 | 2008-02-20 | 株式会社ルネサステクノロジ | 電子デバイスの製造方法 |
US7098149B2 (en) | 2003-03-04 | 2006-08-29 | Air Products And Chemicals, Inc. | Mechanical enhancement of dense and porous organosilicate materials by UV exposure |
TWI240959B (en) | 2003-03-04 | 2005-10-01 | Air Prod & Chem | Mechanical enhancement of dense and porous organosilicate materials by UV exposure |
US20040229453A1 (en) | 2003-05-15 | 2004-11-18 | Jsr Micro, Inc. | Methods of pore sealing and metal encapsulation in porous low k interconnect |
US7179758B2 (en) | 2003-09-03 | 2007-02-20 | International Business Machines Corporation | Recovery of hydrophobicity of low-k and ultra low-k organosilicate films used as inter metal dielectrics |
JP2005167081A (ja) * | 2003-12-04 | 2005-06-23 | Renesas Technology Corp | 半導体装置およびその製造方法 |
US7125793B2 (en) | 2003-12-23 | 2006-10-24 | Intel Corporation | Method for forming an opening for an interconnect structure in a dielectric layer having a photosensitive material |
US7088003B2 (en) * | 2004-02-19 | 2006-08-08 | International Business Machines Corporation | Structures and methods for integration of ultralow-k dielectrics with improved reliability |
JP2006016684A (ja) * | 2004-07-05 | 2006-01-19 | Ebara Corp | 配線形成方法及び配線形成装置 |
JP2006124410A (ja) * | 2004-09-30 | 2006-05-18 | Jsr Corp | 表面疎水化用組成物、表面疎水化方法、半導体装置およびその製造方法 |
CN101048857B (zh) | 2004-10-27 | 2010-10-13 | 国际商业机器公司 | 用作金属间电介质的低k和超低k有机硅酸盐膜的疏水性的恢复 |
US7351656B2 (en) * | 2005-01-21 | 2008-04-01 | Kabushiki Kaihsa Toshiba | Semiconductor device having oxidized metal film and manufacture method of the same |
US7135402B2 (en) * | 2005-02-01 | 2006-11-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Sealing pores of low-k dielectrics using CxHy |
US7253105B2 (en) * | 2005-02-22 | 2007-08-07 | International Business Machines Corporation | Reliable BEOL integration process with direct CMP of porous SiCOH dielectric |
JP4849219B2 (ja) * | 2006-03-23 | 2012-01-11 | Jsr株式会社 | 表面疎水化用組成物、表面疎水化方法、および半導体装置 |
US20070232062A1 (en) * | 2006-03-31 | 2007-10-04 | Takeshi Nogami | Damascene interconnection having porous low k layer followed by a nonporous low k layer |
US7446058B2 (en) * | 2006-05-25 | 2008-11-04 | International Business Machines Corporation | Adhesion enhancement for metal/dielectric interface |
JP2008004621A (ja) * | 2006-06-20 | 2008-01-10 | Toshiba Corp | Cu膜CMP用スラリー、研磨方法および半導体装置の製造方法 |
-
2006
- 2006-05-25 US US11/440,984 patent/US7446058B2/en not_active Expired - Fee Related
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- 2007-05-07 TW TW096116150A patent/TW200802712A/zh unknown
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- 2008-10-03 US US12/245,133 patent/US7795740B2/en active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101911264B (zh) * | 2008-03-19 | 2012-07-04 | 日矿金属株式会社 | 在基材上形成有阻挡层兼种子层的电子构件 |
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