CN100481556C - 一种存储元件及其制造方法 - Google Patents
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Abstract
一种具有改良热绝缘的存储元件。该存储单元包括第一电极元件，其具有上表面；形成在该第一电极元件上的绝缘堆栈，其具有第一、第二与第三绝缘构件，三者均大致为平坦且具有形成在其中并延伸穿过的中央凹洞，其中该第二绝缘构件从该凹洞内凹；相变元件，大致为T型，具有延伸进入凹洞以接触到第一电极元件并接触到第一与第三绝缘构件的基底部分、以及延伸在第三绝缘构件上并与其接触的横条部分，其中相变元件的基底部分、第二绝缘构件的内凹部分以及第一与第三绝缘构件的表面限定热绝缘空洞；以及第二电极，其接触到相变构件。
Description
相关申请
本案在2005年11月21日申请美国临时性专利申请，该申请案的申请案号为60/739,079，发明名称为“Improved ThermalIsolation for an Active-Sidewall Phase Change Memory Cell”。该系列申请作为本申请案的参考。
联合研究合约的当事人
纽约国际商业机械公司、台湾旺宏国际股份有限公司及德国英飞凌技术公司(Infineon Technologies A.G.)为联合研究合约的当事人。
技术领域
本发明一般涉及存储元件，并尤其涉及使用相变元件以储存信息的存储元件。
背景技术
以相变为基础的存储材料广泛地运用于读写光盘中，且这些材料也逐渐使用在计算机存储元件中。这些材料包括至少两种固态相，包括如大体上为非晶态的固态相，以及大体上为结晶态的固态相。激光脉冲用于读写光盘中，以在二种相间切换，并读取该种材料在相变后的光学性质，并且在计算机存储元件中以同样方法使用电脉冲。
如硫属化物及类似材料的这些相变存储材料，可通过施加其幅度适合于集成电路中的电流，而引起晶相转变。一般来讲，非晶态的特征是其电阻高于结晶态，该电阻值可轻易测量得到而用于作为指示。这种特性则引发使用可编程电阻材料以形成非易失性存储器电路等兴趣，此电路可用于随机存取读写。
从非晶态转变到结晶态一般是低电流步骤。从结晶态转变到非晶态(以下称为重置(reset))一般是高电流步骤，其包括短暂的高电流密度脉冲以融化或破坏结晶结构，此后该相变材料快速冷却，抑制相变的过程，使得至少部分相变结构得以维持在非晶态。在理想状态下，使得相变材料从结晶态转变到非晶态的重置电流幅度应越低越好。可通过减小存储器中的相变材料元件的尺寸以及减少电极与该相变材料的接触面积来实现降低重置所需的重置电流幅度，因此可针对该相变材料元件施加较小的绝对电流值而实现较高的电流密度。
该领域发展的一种方法是致力于在集成电路结构上形成微小孔洞，并使用微量可编程的电阻材料填充这些微小孔洞。致力于这些微小孔洞的专利包括：在1997年11月11日公告的美国专利第5,687,112号“Multibit Single Cell Memory Element HavingTapered Contact”，发明人为Ovshinky；在1998年8月4日公告的美国专利第5,789,277号“Method of Making Chalogenide[sic]Memory Device”，发明人为Zahorik等；在2000年11月21日公告的美国专利第6,150,253号“Controllable OvonicPhase-Change Semiconductor Memory Device and Methods ofFabricating the Same”，发明人为Doan等；在1999年7月6日公告的美国专利第5,920,788号“Chalcogenide Memory Cell witha Plurality of Chalcogenide Electrodes”，发明人为Reinberg。
已知相变存储器与结构将产生的特殊问题在于其所产生的散热效应。一般来讲，现有技术是教导如何使用金属电极于相变存储元件的两侧，而电极的尺寸大约等于相变构件。这些电极将作为散热装置，金属的高导热性会快速地将热量导离相变材料。由于相变现象为加热的结果，因此散热效应会导致需要更大的电流以产生理想的相变现象。
解决这种热流问题的一种方法，可见美国专利第6,815,704号“Self Aligned Air-Gap thermal Insulation for Nano-scaleInsulated Chalcogenide Electronics(NICE)RAM”，其中使用一种方式来隔离该存储单元。该结构及其制造过程太复杂且仍无法获得存储元件中的最小电流。
因此，优选是可提供一种存储单元结构，其具有小尺寸以及低重置电流，同时其结构可解决导热性问题，同时能提供一种用于制造这种结构的方法且能够满足用于制造大尺寸存储元件时的严格工艺变量规格。优选是提供一种制造过程以及结构，其可兼容于制造同一集成电路的外围电路。
发明内容
本发明的重要目的之一是提供一种具有改良热隔离的存储元件。该存储单元包括具有上表面的第一电极元件；形成在第一电极元件上的绝缘堆，包括第一、第二与第三绝缘构件，均为平坦形状且该第一、第二和第三绝缘构件中形成贯穿的凹洞，其中第二绝缘构件相对于该第一和第三绝缘构件由该空洞处内凹；相变元件，大致为T型且具有基底部分，其延伸进入该空洞以接触到第一电极元件，并接触到第一与第三绝缘构件，不与该第二绝缘构件接触，其中该相变元件的基底部分、第二绝缘构件的内凹部分以及第一与第三绝缘构件限定了热绝缘空洞；以及接触到相变元件的第二电极。
本发明还提供了一种用来制造存储元件的方法，包括下列步骤：形成第一电极元件，其形状为平板状；在该第一电极元件上形成绝缘堆栈，其包括第一、第二与第三绝缘层；蚀刻空洞穿过该绝缘堆栈；选择性蚀刻该第二绝缘层以在该空洞的侧边形成内凹部分；沉积相变存储元件，延伸进入该空洞以接触到该第三与第一绝缘层及该第一电极元件，其中该相变存储元件与该第二绝缘层限定热绝缘空洞在该第三与第一绝缘层之间；以及沉积第二电极构件，其接触该相变存储元件。
以下详细说明本发明的结构与方法。本发明内容说明章节目的并非在于限定本发明。本发明由权利要求所限定。所有本发明的实施例、特征、目的及优点等将可通过下列说明、权利要求及附图获得充分了解。
附图说明
图1是剖面图，说明实施例中的相变存储元件，其使用了真空室热隔离元件；
图1a说明图1所示相变存储元件中的电流路径；
图2a-2f是说明图1所示相变存储元件的替代实施例；
图3a-3f是说明图1所示相变存储元件的制造方法。
【主要元件符号说明】
10 存储元件
12 衬底
14 下电极
15 上阶壁
16 相变元件
17 底凸缘
18 中间介电层
20 颈部
21 空洞
22 真空隔离室
24 上介电层
26 上电极
27 高温区域
具体实施方式
下面参照图1-3说明各实施例。可以了解的是，本发明中所述的实施例以及特征仅用于举例以及说明，而非用于限制本发明的范围。本发明的范围由权利要求所界定。
本发明涉及存储元件以及存储单元。如本文中所提及，以及如该领域中所周知，存储单元是电路元件，其设计为维持电荷或状态而指定单数据位的逻辑电平。举例来讲，存储单元所组成的阵列是提供计算机所使用的随机存取存储器。在特定的存储单元中，存储元件的功能实际上是维持其中的电荷或状态。举例来讲，在已知动态随机存取存储单元中，电容指定了该单元的逻辑电平，其完全充电状态指定为逻辑“1”状态(或高电平)，而完全放电状态则指定为逻辑“0”状态(或低电平)。
在本发明实施例中，存储元件10如图1所示。如图所示，为简洁起见，存储元件10为单个单元。实际上每个元件为存储单元的一部份，而每个存储单元则为较大存储阵列的一部份，如下所详述。本发明将先描述存储元件的结构，接着叙述用于制造该结构的方法。
该存储元件形成在衬底12上，该衬底优选为介电填充材料，例如二氧化硅。衬底材料围绕并延伸到下电极14之上，包括位于下电极之上的上阶壁15。该下电极优选由例如钨等耐火金属而形成在氧化物层中。其它适合的耐火金属包括钛、钼、铝、钽、铜、铂、铱、镧、镍、钌以及这些材料的氧化物和氮化物。举例来讲，如氮化钛、氧化钌或氧化镍等材料为已知有效的耐火金属。
在下电极之上且与下电极接触的是相变元件16，其大致为T字型，其垂直部分接触到下电极，并从下电极开始垂直延伸穿越位于下电极之上的衬底的上阶壁15。上电极26形成在相变元件的横条部分上。
相变元件可由一类优选包括以硫属化物材料为基础的材料所构成。硫属化物包括下列四元素中的任一种：氧(O)、硫(S)、硒(Se)以及碲(Te)，形成元素周期表上第VI族的部分。硫属化物包括将硫属元素与更为正电性的元素或自由基结合而得。硫属化合物合金包括将硫属化合物与其它物质如过渡金属等结合。硫属化合物合金通常包括一个以上选自元素周期表第六栏的元素，例如锗(Ge)以及锡(Sn)。通常，硫属化合物合金包括下列元素中一个以上的复合物：锑(Sb)、镓(Ga)、铟(In)以及银(Ag)。技术文件中描述了许多以相变为基础的存储材料，包括下列合金：镓/锑、铟/锑、铟/硒、锑/碲、锗/碲、锗/锑/碲、铟/锑/碲、镓/硒/碲、锡/锑/碲、铟/锑/锗、银/铟/锑/碲、锗/锡/锑/碲、锗/锑/硒/碲以及碲/锗/锑/硫。在锗/锑/碲合金家族中，可以尝试大范围的合金成分。该成分可由下列特征式表示：TeaGebSb100-(a+b)。
一位研究员描述了最有用的合金为，在沉积材料中所包含的平均碲浓度远低于70％，典型地低于60％，并在一般型态合金中的碲含量范围从最低23％到最高58％，且最优是介于48％到58％之间的碲含量。锗的浓度约高于5％，且其在材料中的平均范围从最低8％到最高30％，一般低于50％。最优地，锗的浓度范围介于8％到40％之间。在该成分中所剩下的主要成分则为锑。上述百分比为原子百分比，其为所有组成元素总和为100％。(Ovshinky‘112专利，栏10～11)。由另一研究者所评估的特殊合金包括Ge2Sb2Te5、GeSb2Te4以及GeSb4Te7。(Noboru Yamada，“Potential of Ge-Sb-Te Phase-change Optical Disks forHigh-Data-Rate Recording”，SPIE v.3109，pp.28-37(1997))。更一般地，过渡金属如铬(Cr)、铁(Fe)、镍(Ni)、铌(Nb)、钯(Pd)、铂(Pt)以及上述的混合物或合金，可与锗/锑/碲结合以形成相变合金，其具有可编程的电阻性质。可使用的存储材料的特殊实例，如Ovshinsky‘112专利中栏11-13所述，其实例在此列入参考。
相变化材料能在该单元有源沟道区域内依其位置顺序在材料为一般非晶状态的第一结构状态与为一般结晶固体状态的第二结构状态之间切换。这些材料至少为双稳定态。该术语“非晶”是用于指相对较无次序的结构，其较单晶更无次序性，而具有可检测的特征，如较结晶态更高的电阻值。该术语“结晶态”是用于指相对较有次序的结构，其较非晶态更有次序，因此具有可检测的特征，例如比非晶态更低的电阻值。典型地，相变材料可电切换到完全结晶态与完全非晶态之间所有可检测的不同状态。其它受到非晶态与结晶态的改变而影响的材料特性包括原子次序、自由电子密度以及活化能。该材料可切换成不同的固态，或可切换成由两种以上固态所形成的混合物，提供从非晶态到结晶态之间的灰度级部分。该材料中的电性质也可能随之改变。
通过施加电脉冲，可将相变材料从一种相态切换到另一种相态。先前观察指出，较短、较大幅度的脉冲倾向于将相变材料的相态改变成大体为非晶态。较长、较低幅度的脉冲倾向于将相变材料的相态改变成大体为结晶态。较短、较大幅度脉冲中的能量足够大到破坏结晶结构的结合键，同时足够短到可以防止原子再次排列成结晶态。在没有不适当实验的情形下，可以确定特别适用于特定相变合金的适当脉冲量变曲线。在本文的后续部分，该相变材料称为GST，同时本领域技术人员也需了解，也可使用其它类型的相变材料。在本文中所描述的一种适用于PCRAM中的材料为Ge2Sb2Te5。
在下电极与相变元件的横条之间，有三层介电层。衬底的上阶壁15是位于下电极上的第一层，如上所述。中间介电层18是在该上阶壁的上方。上介电层24是形成在该中间介电层的上方且延伸并接触到相变元件的下表面。该上介电层优选由与构成衬底的材料相同或相似的材料所组成，例如二氧化硅，而中间介电层则优选由氮化硅或类似材料所构成。
上阶壁与上介电层接触到相变元件的垂直部分。然而该中间介电层并不延伸到相变元件，而是该层内凹，使得真空隔离室22由中间介电层的末端与相变元件的垂直部分(在一轴方向)以及上阶壁与上介电层(在另一轴方向)所界定。该腔室优选为真空，且为相变元件提供优选的隔热效果。在邻近于真空隔离室的区域，修剪相变元件的垂直部分以形成颈部20，其横截面面积较小。
在操作时，存储元件中的电流从下电极14流入相变元件16，并从上电极26流出。当然，如该领域中所周知，可以利用改变元件配置方式来改变电流方向。在两种情况下，相变材料在电流流动时均受到焦耳热效应，如上所述，从而导致GST材料中央部位的温度上升。当温度超过相变所需要的水平时，相变材料的一部份会改变其状态。在相变元件中，温度分布并不平均，电流密度的改变会造成明显的变化。相变材料的温度会决定所产生的效果，因此电流的选择是用来产生足以在GST材料中导致理想结果(非晶态或结晶态)的温度。如果要读取元件的状态，则仅施加低电流以做为感测用途。该读取操作为非破坏性的，因为元件温度保持为低于相变临界温度。
真空隔离室22的功能是用来将热量保存在相变元件中，其具有以下几个优点。首先，通过避免热量远离相变元件，该设计减少了达成相变所需要的热量，进而减少了每一次设定(SET)或重置(RESET)操作所需要的电流。同时，将热量维持在相变元件内，可减少转移到存储阵列中的剩余部分的热量，其直接有助于延长该元件的寿命。假设完整的集成电路中的存储元件数量非常庞大(举例来讲，在1GB存储元件中，会有至少80亿个元件)，因此可以理解的是这种热量减少会有非常显著的效果。通过将电流集中在相变元件中的颈部20区域，会进一步提升相变元件的效率。该效应如图1a所详示，其中电流从电极14处进入，其电流密度相当平均，但在接触到接触元件时则较集中，产生高温区域27，在此若选择适当的电流即可达成相变。所说明的设计导致减少存储元件的电流消耗。
存储元件10可以具有其它的变化形式，如图2a-2f所示。这些变化形式并不影响存储元件10的整体性能、功能或设计，但确实将对特定的性能参数或制造性方面产生影响，如本领域技术人员所能理解。针对这些变化的讨论以图1中的存储元件10做为起点。
如图2a所示的变化方式是移除了相变元件延伸到上介电层之上表面的横条部分，留下沙漏型元件。这种设计的优点在于改良的制造方法，因为可以省略上介电层之上的GST材料层。
图2b的变化方式是在相变元件增加了底凸缘17，使得该元件的外型类似I型。这种设计可以在相变元件的中央部分与底电极之间，提供优选的隔热效果。
在图2c中，并不形成颈部20，而是留下相变元件的垂直部分作为垂直构件。这种改变明显地简化了制造过程。
图2d的变化方式则在相反方向移动。该颈部20保持垂直形状，但是在垂直构件内形成空洞21。可以清楚见到的是，这种设计中的电流路径将比图1的设计更为紧缩，产生更集中的加热效果。同时，空洞21也增加了隔热度，进一步地集中热量。如本领域所周知，优选地是用溅镀过程沉积该材料，且通过控制溅镀的条件来形成内部空洞21。
图2e中的变化方式是形成了与图1所示的颈部相反的颈部20。在本图中，并不形成截面面积缩减的区域，而是具有增大并凸出到真空隔离室中的截面积，其为沉积过程的结果。
相似地，图2f说明了一种设计，其颈部20凸出到真空隔离室中，但是在凸出部分形成有凹陷。
在图3a-3f中，描述了用于形成图1所示存储元件10的制造方法。该过程从衬底12开始，如图3a所示。利用已知技术在衬底中形成下电极14。衬底与电极的材料如前所述。
接着，如图3b所示，以横跨衬底的宽度，在衬底上形成衬底上阶壁15、加上中间介电层18与上介电层24。这三层中的每一层的厚度介于10nm到约50nm之间，优选为30nm。
如图3c所示，移除部份材料以制造相变元件。优选地，其根据已知的光刻过程，先施加光阻薄膜；利用掩膜或标线(reticle)而形成图案；将该图案在可见光或其它射线下曝光；剥离光阻材料中不需要的部分，以形成蚀刻掩膜；以及蚀刻该材料层。优选地，施加干式非等向性蚀刻，可使用可感测蚀刻到下电极层的光学装置来控制该蚀刻步骤。
该真空隔离室由图3d所示的步骤形成，其中使用湿式蚀刻(优选为磷酸)，以从衬底上阶壁15所形成表面与上介电层24所起算的控制距离，对中间介电层18中的氮化硅进行选择性蚀刻。
在下一步骤中加入相变元件16，如图3e所示。如图所示，其使用已知的沉积步骤，优选使用溅镀或电浆增强溅镀过程，以形成相变元件16。相变元件的垂直部分的宽度(同时也是已蚀刻区域的宽度)应该介于约10nm到约100nm之间，优选为50nm。
最后，在最后步骤中沉积上电极26，如图3f所示。如前所述，利用已知光刻技术，将上电极与相变元件图案化到期望的横向尺寸。
虽然已经参照优选实施例对本发明进行了描述，但是本领域技术人员将会了解的是，本发明创造并不受详细描述内容限制。在先前描述中已经建议了替换方式及修改样式，并且本领域技术人员将会考虑其它替换方式及修改样式。特别是，根据本发明的结构与方法，所有实质上具有相同于本发明的构件结合而达成与本发明实质上相同结果的都没有脱离本发明的精神范围。因此，所有这些替换方式及修改样式都落在本发明所附权利要求及其等价物所界定的范围中。任何在前文中提及的专利申请案以及印刷文本，均列为本案的参考。
Claims (11)
1、一种存储元件，包括：
第一电极元件，具有上表面；
形成在该第一电极元件上的绝缘堆栈，其包括第一、第二与第三绝缘构件，三者的外型平坦且在该第一、第二和第三绝缘构件中形成贯穿的凹洞，其中该第二绝缘构件相对于该第一和第三绝缘构件由该凹洞处内凹；
相变元件，其延伸入该凹洞以接触到该第一电极元件并接触到该第一与第三绝缘构件，不与该第二绝缘构件接触，其中该相变元件、该第二绝缘构件的内凹部分与该第一与第三绝缘构件限定热绝缘空洞；以及
第二电极，其接触该相变元件。
2、如权利要求1所述的存储元件，其中，该相变元件包括由锗、锑、与碲所组成的组合物。
3、如权利要求1所述的存储元件，其中，该相变元件包括由下列群组中的至少二个所组成的组合物：锗(Ge)、锑(Sb)、碲(Te)、铟(In)、钛(Ti)、镓(Ga)、铋(Bi)、锡(Sn)、铜(Cu)、钯(Pd)、铅(Pb)、银(Ag)、硫(S)以及金(Au)。
4、如权利要求1所述的存储元件，其中，该相变元件为T型，其具有位于该第三绝缘构件上的横条构件以及延伸进入该凹洞的中央部分。
5、如权利要求1所述的存储元件，其中，该相变元件为I型，其具有位于该第三绝缘构件上的横条构件、延伸进入该凹洞的中央部分以及位于该第一绝缘构件下的基底构件。
6、如权利要求1所述的存储元件，其中，该相变元件在接近该第二绝缘构件的内凹部分处，具有较小的垂直于该相变元件长轴方向上的横截面面积。
7、一种用来制造存储元件的方法，包括下列步骤：
形成第一电极元件，其形状为平板状；
在该第一电极元件上形成绝缘堆栈，其包括第一、第二与第三绝缘层；
蚀刻空洞穿过该绝缘堆栈；
选择性蚀刻该第二绝缘层以在该空洞的侧边形成内凹部分；
沉积相变存储元件，延伸进入该空洞以接触到该第三与第一绝缘层及该第一电极元件，其中该相变存储元件与该第二绝缘层限定热绝缘空洞在该第三与第一绝缘层之间；以及
沉积第二电极构件，其接触该相变存储元件。
8、如权利要求7所述的方法，其中，该空洞蚀刻步骤以及该选择性蚀刻步骤结合为单个步骤，所选择的蚀刻剂提供选择性地更加活性对该第二绝缘层进行蚀刻。
9、如权利要求7所述的方法，其中，使用溅镀过程来沉积该相变存储元件，控制该工艺以在该相变存储元件中接近内凹的该第二绝缘层处产生较小的横截面面积。
10、如权利要求7所述的方法，其中，该相变存储元件沉积为T型，其具有位于该第三绝缘层上的横条构件以及延伸进入该凹洞的中央部分。
11、如权利要求7所述的方法，其中，该相变存储元件沉积为I型，其具有位于该第三绝缘层上的横条构件、延伸进入该凹洞的中央部分以及位于该第一绝缘构件下的基底构件。
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| US20110034003A1 (en) | 2011-02-10 |
| US8097487B2 (en) | 2012-01-17 |
| US7829876B2 (en) | 2010-11-09 |
| CN1971964A (zh) | 2007-05-30 |
| TWI313058B (en) | 2009-08-01 |
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