CN100444340C - 半导体器件的制造方法以及半导体器件 - Google Patents
半导体器件的制造方法以及半导体器件 Download PDFInfo
- Publication number
- CN100444340C CN100444340C CNB2004100880135A CN200410088013A CN100444340C CN 100444340 C CN100444340 C CN 100444340C CN B2004100880135 A CNB2004100880135 A CN B2004100880135A CN 200410088013 A CN200410088013 A CN 200410088013A CN 100444340 C CN100444340 C CN 100444340C
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- China
- Prior art keywords
- wiring board
- semiconductor device
- substrate
- clamp
- fulcrum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/481—Insulating layers on insulating parts, with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/0909—Preformed cutting or breaking line
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
- H05K2203/302—Bending a rigid substrate; Breaking rigid substrates by bending
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
Abstract
Description
Claims (18)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003367435A JP2005135977A (ja) | 2003-10-28 | 2003-10-28 | 半導体装置の製造方法及び半導体製造装置 |
JP2003367435 | 2003-10-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1612310A CN1612310A (zh) | 2005-05-04 |
CN100444340C true CN100444340C (zh) | 2008-12-17 |
Family
ID=34543767
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100880135A Expired - Fee Related CN100444340C (zh) | 2003-10-28 | 2004-10-28 | 半导体器件的制造方法以及半导体器件 |
Country Status (3)
Country | Link |
---|---|
US (2) | US7223636B2 (zh) |
JP (1) | JP2005135977A (zh) |
CN (1) | CN100444340C (zh) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4757056B2 (ja) * | 2006-02-21 | 2011-08-24 | 富士通株式会社 | 樹脂層の形成方法並びに半導体装置及びその製造方法 |
JP5055798B2 (ja) * | 2006-03-17 | 2012-10-24 | 日立金属株式会社 | 半導体装置の製造方法 |
KR100824881B1 (ko) * | 2006-11-10 | 2008-04-23 | 삼성에스디아이 주식회사 | 유기 전계 발광 표시 장치 및 그 제조 방법 |
KR100824880B1 (ko) * | 2006-11-10 | 2008-04-23 | 삼성에스디아이 주식회사 | 유기 전계 발광 표시 장치 및 그 제조 방법 |
KR100833738B1 (ko) | 2006-11-30 | 2008-05-29 | 삼성에스디아이 주식회사 | 유기 전계 발광 표시 장치 및 그 제조 방법 |
KR100824902B1 (ko) * | 2006-12-13 | 2008-04-23 | 삼성에스디아이 주식회사 | 유기 전계 발광 표시 장치 및 그 제조 방법 |
CN101902882B (zh) * | 2010-07-05 | 2013-10-16 | 镇江市高等专科学校 | 分板机 |
US8440012B2 (en) | 2010-10-13 | 2013-05-14 | Rf Micro Devices, Inc. | Atomic layer deposition encapsulation for acoustic wave devices |
US8313985B2 (en) * | 2010-10-21 | 2012-11-20 | Rf Micro Devices, Inc. | Atomic layer deposition encapsulation for power amplifiers in RF circuits |
CN102865939B (zh) * | 2012-09-12 | 2014-07-09 | 上海大学 | 用于光电器件封装的激光键合温度采集系统及光电器件封装的方法 |
JP2015009331A (ja) * | 2013-06-28 | 2015-01-19 | 三星ダイヤモンド工業株式会社 | 脆性材料基板のブレイク工具 |
TWI513382B (zh) * | 2013-12-06 | 2015-12-11 | All Ring Tech Co Ltd | Radiator placement method and device |
CN104394650B (zh) * | 2014-08-13 | 2018-08-07 | 中国船舶重工集团公司第七0九研究所 | 完成表贴元器件的拼装电路板的分板方法 |
US9633883B2 (en) | 2015-03-20 | 2017-04-25 | Rohinni, LLC | Apparatus for transfer of semiconductor devices |
DE102016205902A1 (de) * | 2015-04-29 | 2016-11-03 | Tridonic Jennersdorf Gmbh | Trennvorrichtung für Leiterplatten |
CN110089209B (zh) * | 2016-09-29 | 2022-03-29 | 安必昂公司 | 部件放置装置及其驱动方法 |
WO2018079644A1 (ja) * | 2016-10-27 | 2018-05-03 | 京セラ株式会社 | 撮像素子実装用基体、撮像装置および撮像モジュール |
US10141215B2 (en) | 2016-11-03 | 2018-11-27 | Rohinni, LLC | Compliant needle for direct transfer of semiconductor devices |
US10504767B2 (en) | 2016-11-23 | 2019-12-10 | Rohinni, LLC | Direct transfer apparatus for a pattern array of semiconductor device die |
US10471545B2 (en) | 2016-11-23 | 2019-11-12 | Rohinni, LLC | Top-side laser for direct transfer of semiconductor devices |
US10062588B2 (en) | 2017-01-18 | 2018-08-28 | Rohinni, LLC | Flexible support substrate for transfer of semiconductor devices |
EP3410473B1 (de) * | 2017-05-30 | 2021-02-24 | Infineon Technologies AG | Anordnung und verfahren zum vereinzeln von substraten |
CN108023159A (zh) * | 2018-01-02 | 2018-05-11 | 深圳顺络电子股份有限公司 | 一种三轴接收天线及其制作方法 |
US10410905B1 (en) | 2018-05-12 | 2019-09-10 | Rohinni, LLC | Method and apparatus for direct transfer of multiple semiconductor devices |
JP7050627B2 (ja) * | 2018-08-27 | 2022-04-08 | 三菱電機株式会社 | プリント回路基板分割装置、プリント回路基板分割用押さえ治具、プリント回路基板分割方法及びプリント回路装置の製造方法 |
US11094571B2 (en) | 2018-09-28 | 2021-08-17 | Rohinni, LLC | Apparatus to increase transferspeed of semiconductor devices with micro-adjustment |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0942947A (ja) * | 1995-07-31 | 1997-02-14 | Mitsubishi Materials Shilicon Corp | 半導体ウェーハ表面の検査方法およびその装置 |
US20020089052A1 (en) * | 2001-01-10 | 2002-07-11 | Masashi Yamaura | Semiconductor device and a method of manufacturing the same |
JP2003133262A (ja) * | 2001-10-26 | 2003-05-09 | Matsushita Electric Ind Co Ltd | 半導体パッケージの製造方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3578366B2 (ja) | 1995-10-17 | 2004-10-20 | 株式会社ルネサステクノロジ | 混成集積回路装置 |
JPH1131704A (ja) | 1997-07-10 | 1999-02-02 | Denso Corp | 半導体装置の製造方法 |
JP4634045B2 (ja) * | 2003-07-31 | 2011-02-16 | 富士通株式会社 | 半導体装置の製造方法、貫通電極の形成方法、半導体装置、複合半導体装置、及び実装構造体 |
-
2003
- 2003-10-28 JP JP2003367435A patent/JP2005135977A/ja active Pending
-
2004
- 2004-10-12 US US10/961,041 patent/US7223636B2/en not_active Expired - Fee Related
- 2004-10-28 CN CNB2004100880135A patent/CN100444340C/zh not_active Expired - Fee Related
-
2006
- 2006-12-29 US US11/647,162 patent/US20070105283A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0942947A (ja) * | 1995-07-31 | 1997-02-14 | Mitsubishi Materials Shilicon Corp | 半導体ウェーハ表面の検査方法およびその装置 |
US20020089052A1 (en) * | 2001-01-10 | 2002-07-11 | Masashi Yamaura | Semiconductor device and a method of manufacturing the same |
JP2003133262A (ja) * | 2001-10-26 | 2003-05-09 | Matsushita Electric Ind Co Ltd | 半導体パッケージの製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US7223636B2 (en) | 2007-05-29 |
US20070105283A1 (en) | 2007-05-10 |
US20050101052A1 (en) | 2005-05-12 |
CN1612310A (zh) | 2005-05-04 |
JP2005135977A (ja) | 2005-05-26 |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: NEC CORP. Free format text: FORMER OWNER: RENESAS TECHNOLOGY CORP. Effective date: 20100812 |
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C41 | Transfer of patent application or patent right or utility model | ||
C56 | Change in the name or address of the patentee |
Owner name: RENESAS ELECTRONICS CO., LTD. Free format text: FORMER NAME: NEC CORP. |
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Free format text: CORRECT: ADDRESS; FROM: TOKYO, JAPAN TO: KANAGAWA, JAPAN |
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CP01 | Change in the name or title of a patent holder |
Address after: Kanagawa, Japan Patentee after: Renesas Electronics Corp. Address before: Kanagawa, Japan Patentee before: NEC ELECTRONICS Corp. |
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TR01 | Transfer of patent right |
Effective date of registration: 20100812 Address after: Kanagawa, Japan Patentee after: NEC ELECTRONICS Corp. Address before: Tokyo, Japan Patentee before: Renesas Technology Corp. |
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20081217 Termination date: 20131028 |