CN100440509C - 电路装置 - Google Patents
电路装置 Download PDFInfo
- Publication number
- CN100440509C CN100440509C CNB2004800229015A CN200480022901A CN100440509C CN 100440509 C CN100440509 C CN 100440509C CN B2004800229015 A CNB2004800229015 A CN B2004800229015A CN 200480022901 A CN200480022901 A CN 200480022901A CN 100440509 C CN100440509 C CN 100440509C
- Authority
- CN
- China
- Prior art keywords
- circuit element
- circuit
- lead
- wire
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title abstract description 12
- 238000004519 manufacturing process Methods 0.000 title abstract description 11
- 229920005989 resin Polymers 0.000 claims abstract description 43
- 239000011347 resin Substances 0.000 claims abstract description 43
- 238000007789 sealing Methods 0.000 claims abstract description 35
- 239000002184 metal Substances 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 8
- 239000011796 hollow space material Substances 0.000 abstract 2
- 239000000758 substrate Substances 0.000 description 11
- 238000010438 heat treatment Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000005284 excitation Effects 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- 208000034189 Sclerosis Diseases 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000007767 bonding agent Substances 0.000 description 2
- 239000006071 cream Substances 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000009931 harmful effect Effects 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- CNQCVBJFEGMYDW-UHFFFAOYSA-N lawrencium atom Chemical compound [Lr] CNQCVBJFEGMYDW-UHFFFAOYSA-N 0.000 description 2
- 230000005236 sound signal Effects 0.000 description 2
- 229920005992 thermoplastic resin Polymers 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000010897 surface acoustic wave method Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 238000004017 vitrification Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49558—Insulating layers on lead frames, e.g. bridging members
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/46—Filters
- H03H9/64—Filters using surface acoustic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/315—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Acoustics & Sound (AREA)
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
一种电路装置及其制造方法,将包括内部具有空隙的电路元件的多个电路元件树脂密封。电路装置(10)具有:内部具有间隙的第一电路元件(13A)、和与第一电路元件(13A)电连接的多个第二电路元件(13B)。第一电路元件(13A)及第二电路元件(13B)由密封树脂(15)密封。第一电路元件(13A)和第二电路元件(13B)分开的距离比第二电路元件(13B)相互间分开的距离长。
Description
技术领域
本发明涉及电路装置及其制造方法,特别是涉及多个电路元件被树脂密封构成的电路装置及其制造方法。
背景技术
参照图6,对现有型的SAW滤波装置100的结构进行说明。图6是SAW滤波装置100的剖面图。
参照图6,SAW滤波器(表面弹性波)元件103被固定在支承衬底101上。SAW滤波器103经由金属细线104与形成于支承衬底表面的电极102连接。电极102贯通支承衬底101,与形成于支承衬底101背面的背面电极106连接。另外,SAW滤波器元件103在其表面具有电极。为确保该电极的间隙,SAW滤波器103由壳体部件105密封。
另外,参照图7,上述的SAW滤波装置100与其它电路元件一起被安装在安装衬底PS上,构成具有规定功能的模块。在此,其它电路元件可列举由树脂112密封半导体元件111构成的半导体装置110、片状电容CC、及片状电阻CR。这些电路元件由形成于安装衬底PS上的导电图案相互连接。
但是,在上述的SAW滤波装置100中,为确保SAW滤波装置100的电极间的间隙,由壳体部件105密封。由此,存在SAW滤波装置100本身大型化的问题。另外,该SAW滤波装置100及半导体装置110作为个别电路元件安装在安装衬底上。因此,安装工序等耗费时间,存在成本增大的问题。
发明内容
本发明是鉴于上述的问题点而实现的,本发明的主要目的在于,提供一种电路装置及其制造方法,其将内部具有空隙的电路元件树脂密封。
本发明提供一种电路装置,其特征在于,具有:第一电路元件,其内部具有间隙;多个第二电路元件,其与所述第一电路元件电连接;密封树脂,其将所述第一电路元件及所述第二电路元件覆盖,所述第一电路元件和所述第二电路元件分开的距离比所述第二电路元件相互间分开的距离长。
另外,本发明提供一种电路装置,其特征在于,具有:第一电路元件,其内部具有间隙;第二电路元件,其与所述第一电路元件电连接;密封树脂,其将所述第一电路元件及所述第二电路元件覆盖,所述第一电路元件比所述第二电路元件更靠近所述密封树脂的周边部配置。
本发明提供一种电路装置,其特征在于,具有:第一电路元件,其固定在第一接合区,内部具有间隙;第二电路元件,其被固定在与所述第一接合区分开且配置于中央部附近的第二接合区上;第一引线,其一端导出到外部,另一端与所述第一电路元件或所述第二电路元件连接;第二引线,其从所述第一电路元件的附近延伸到所述第二电路元件的附近,将两者连接;密封树脂,其将所述各电路元件及所述各引线密封。
本发明提供一种电路装置的制造方法,其特征在于,具有:将内部具有空隙的第一电路元件及与该第一电路元件电连接的第二电路元件载置到模制模型的型腔内的工序;通过从浇口向所述型腔封入密封树脂,将所述第一电路元件及所述第二电路元件树脂密封的工序,所述第一电路元件比所述第二电路元件远离所述浇口。
附图说明
图1(A)是说明本发明的电路装置的立体图,图1(B)是说明本发明的电路装置的平面图;
图2(A)是说明本发明的电路装置的示意图,图2(B)是说明本发明的电路装置的剖面图;
图3(A)是说明本发明的电路装置的平面图,图3(B)是说明本发明的电路装置的特性图,图3(C)是说明本发明的电路装置的立体图;
图4是说明本发明的电路装置的平面图;
图5(A)是说明本发明电路装置的制造方法的剖面图,图5(B)是说明本发明电路装置的制造方法的剖面图,图5(C)是说明本发明电路装置的制造方法的特性图;
图6是说明现有的电路装置的剖面图;
图7是说明现有的电路装置的剖面图;
具体实施方式
参照图1说明本发明的电路装置的详细结构。图1(A)是本发明的电路装置10的立体图,图1(B)是其平面图。参照同图,电路装置100具有内部具有间隙的第一电路元件13A、和与第一电路元件13A电连接的多个第二电路元件13B。第一电路元件13A和第二电路元件13B由密封树脂15密封。而且,第一电路元件13A和第二电路元件13B分开的距离比第二电路元件13B相互间分开的距离长。下面说明这样的各结构要素。
第一电路元件13A是在其内部具有间隙(空间)的电路元件,在此,被固定在形成于电路装置10的长度方向端部的第一接合区12A上。另外,第一电路元件13A位于细长形成的密封树脂15的长度方向的端部附近。而且,第一电路元件12A和第二电路元件分开的距离比第二电路元件13B相互间分开的距离长。具体地说,作为第一电路元件,可采用SAW滤波器(表面弹性波滤波器)。参照图2详细说明作为SAW滤波器的第一电路元件13A。
另外,第一电路元件13A经由金属细线14与引线11电连接。而且,经由第一引线11A来自外部的信号被输入第一电路元件13A内,由作为SAW滤波器的第一电路元件13A提取所希望频带的电信号。由第一电路元件提取的电信号经由第二引线11B输入到第二电路元件13B1内。
引线11包括第一引线11A和第二引线11B。第一引线11A的一侧端部从密封树脂导出,延伸到外部,形成外部端子。第一引线11A的另一侧端部延伸到第一电路元件13A或第二电路元件13B的附近,经由金属细线14与这些元件电连接。具体地说,第一引线11A一侧的端部等间隔地从密封树脂15的长度方向对向的侧边部导出,形成外部端子。而且,第一引线13A的另一侧端部延伸到与配置于中央部的多个第二电路元件13B接近。因此,第一引线11A从第二电路元件13B的周边大致呈放射状地向外部延伸。另外,多个第一引线13A的端部延伸到第一电路元件13A的附近。参照图1(A),导出到外部的部分的第一引线11A也可以向下方弯曲。
第二引线11B具有将内装于电路装置10内的电路元件相互间电连接的作用。在此,第二引线11B从配置于周边部的第一电路元件13A的附近延伸到配置于中央部的第二电路元件13B1的附近。而且,由金属细线14和第二引线11B将两电路元件电连接。即,从外部输入的电信号由作为SAW滤波器的第一电路元件13A滤波。然后,提取的所希望频带的电信号经由第二引线11B从第一电路元件13A供给到第二电路元件13B1。在此,作为输入到SAW滤波器的电信号可考虑视频信号、音频信号、电视信号等经由天线接受的信号。
第二电路元件13B被固定在形成于电路装置10中央部附近的第二接合区12B上。在此,第二电路元件13B由三个半导体元件构成。具体地说,第二电路元件13B1经由第二引线11B与第一电路元件13A连接,进行由第一电路元件13A滤波后的信号的处理。该信号采用视频信号或音频信号等。
第二电路元件13B2经由金属细线14与第二电路元件13B1直接连接。该第二电路元件13B2具有由ROM及RAM构成的存储部,在该存储部对每个用户存储有不同的设定信息等。该设定信息可考虑电视的频道显示方法等。另外,也可以在第二电路元件13B2形成进行作为电视的补助字幕功能的接近字幕(クロ一ブトキヤプシヨン)TV控制功能的电路。另外,也可以将图像、音频控制以外的功能集成在第二电路元件13B2上。
第二电路元件13B3经由金属细线14与进行信号处理的第一电路元件13B1电连接。该第二电路元件13B3可采用作为延迟元件起作用的CCD。具体的第二电路元件13B3的动作是,将输入的电信号变换为电荷,由时钟脉冲搬运该电荷信号,将搬运的电荷信号变换为电压。
上述的第二电路元件13B1被安装在与安装第二电路元件13B2及第二电路元件13B3的接合区不同的接合区上。即,安装第二电路元件13B1的第二接合区12B、和安装第二电路元件13B2及第二电路元件13B3的第二接合区12B电分离。根据这样的结构,可防止由作为微型机的第二电路元件13B2产生的时钟脉冲噪声对进行信号处理的元件即第二电路元件13B1产生不良影响。
另外,形成于第二电路元件13B1表面的电极和形成于第二电路元件13B2表面的电极经由金属细线14电连接。而且,形成于第二电路元件13B1表面的电极和形成于第二电路元件13B3表面的电极经由金属细线14电连接。
参照图2详细说明作为SAW滤波器的第一电路元件13A。图2(A)是表示SAW滤波器20的结构的示意图,图2(B)是构成了SAW滤波器的第一电路元件13A的剖面图。
参照图2(A)说明SAW滤波器的基本结构。在SAW滤波器中,由同图所示的电极指23相互咬合构成的叉指式变换器(Interdigital Transducer,下称IDT)激励或接收SAW。SAW滤波器20至少由各一个激励用IDT21A和接收用IDT21B形成。这些激励用IDT21A和接收用IDT21B的频率特性之积大致构成SAW滤波器的频率特性。即,从激励用IDT21A及接收用IDT延伸的电极指23相互之间的间隔决定SAW滤波器的频率特性。
参照图2(B)说明内装上述SAW过滤器的第一电路元件的结构。第一电路元件13A内部具有由作为基体衬底的压电体构成的压电体衬底26,在该压电体衬底26的表面形成有构成IDT的电极指23。而且,由密封树脂25在压电体衬底26的表面形成空隙27,并将电极指28收纳入该空隙27内。该空隙对维持SAW过滤器的特性是非常重要的。
具有上述结构的第一电路元件13A利用粘接剂29固定在第一接合区12A上。在此,最好使用Ag膏作为粘接剂29。即,可提高作为SAW过滤器的第一电路元件13A的特性。可以认为这是由于,Ag膏的热膨胀系数与第一电路元件13A的热膨胀系数近似。
其次,参照图3说明用于使使用状况下的温度变化给予第一电路元件13A的影响最小的电路装置10的结构。图3(A)是电路装置10的剖面图,图3(B)是表示温度分布的特性图,图3(C)是表示温度变化引起的电路装置10的变形量的示意图。
参照图3(A),由含有进行信号处理等的半导体元件的多个元件构成的第二电路元件13B被固定在长度方向的中央部附近。具体地说,将三个第二电路元件13B1、13B2、13B3接近配置。另外,作为SAW滤波器的第一电路元件13A从第二电路元件13B离开,配置在电路装置10的长度方向端部附近(在此为右端附近)。具体地说,使第一电路元件13A和第二电路元件13B分开的距离比第二电路元件13B相互间分开的距离大。
参照图3(B)对由于使用状态下的温度变化而使内装的电路元件发热时的电路装置的长度方向的温度分布进行说明。该特性图的横轴表示电路装置10的长度方向位置。即,横轴的中央部表示电路装置10的长度方向的中央部。另外,该特性图的纵轴表示温度。
参照该特性图,配置有多个第二电路元件13的电路装置10的中央部附近的温度显示最高温度(约120度程度),长度方向的两端部附近显示最低温度(70度程度)。
即使在被密封树脂15密封的电路元件中,进行图像及音频的信号处理的第二电路元件13B1也是发热量最大的元件。具体地说,该第二电路元件13B1在内装的元件中其耗电量最大,在使用状态下,发热到130度以上。与该第二电路元件13B1邻接的第二电路元件13B2及13B3其自身的发热量少。但是,由于来自第二电路元件13B1的热的传导而被加热。具体地说,第二电路元件13B2及13B3被加热到110度程度。但是,由于这些电路元件是半导体元件,故即使在这样的高温下,也可以无问题地进行其动作。
由于第一电路元件13A是无源元件,故其自身的发热小。另外,由于第一电路元件13A配置于端部附近,故可将来自伴随发热的第二电路元件13B1的热的传导量减小。因此,即使在使用状态下,也可以将作为SAW滤波器的第一电路元件13A的温度抑制在70度程度。由此,可抑制第二电路元件13B的发热造成的第一电路元件13A的特性的降低及误动作。
参照图3(C),对伴随上述的第二电路元件13B的发热的电路装置10的变形进行说明。同图是表示内装于密封树脂15内的电路元件在使用状态下发热时的密封树脂的变形量的示意图。同图中,强调描绘了长度方向的变位量。
同图所述的第一区域A1表示密封树脂15的长度方向的中央部附近。如上所述,该第一区域A1配置有作为伴随发热的元件的第二电路元件13B1。因此,该区域的密封树脂表示与发热量对应的变形量。具体地说,第一区域A1的密封树脂表示向上方弯曲的变形。但是,该第一区域A1的变形量是不会给内装于该区域的第二电路元件13B不良影响的程度。
第二区域A2表示密封树脂15的长度方向的终端部,在该区域内装有第一电路元件13A。如上所述,该第二区域A2的温度比上述第一区域A1的温度低。因此,第二区域A2的变形量也比第一区域A1的小。由此,可防止伴随使用状态下的温度上升的变形给作为SAW滤波器的第一电路元件13A带来不良影响。具体地说,可防止伴随温度上升的变形使形成于SAW滤波器即第一电路元件13A内部的间隙破坏的情况。
其次,参照图4及图5,以进行密封的工序为中心,说明上述的电路装置10的制造方法。电路装置10的制造方法包括:将内部具有空隙的第一电路元件13A及与该元件电连接的第二电路元件13B载置到模制模型30内的工序;通过从浇口32向由模制模型30构成的型腔31内封入密封树脂15,将第一电路元件13A及第二电路元件13B树脂密封的工序,使第一电路元件13A比第二电路元件13B距浇口32远。
首先,参照图4,由冲切或蚀刻的工序形成第一引线11A及第二引线11B。在此,各引线11利用连接部11D及支承引线11C作为一个板状体的引线架9供给。另外,由于第二引线11B与其它位置的引线架电且机械地独立,故利用由树脂类的粘接片构成的支承片8机械支承。然后,进行电路元件13的安装及采用金属细线14的电连接。
图5(A)是进行树脂密封的中途阶段的模制模型30的剖面图,图5(B)是进行了树脂密封后的模制模型30的剖面图,图5(C)是表示树脂压力变化的特性图。
其次,参照图5(A),将引线架9置于模制模型的下模30B。此时,第一电路元件13A比第二电路元件13B距浇口32远。在此,第一电路元件13A被配置在排气口33的附近。在将引线11置于模型内后,将下模30A与上模30B咬合,构成型腔31。然后,从浇口32向型腔31内部封入密封树脂15。根据封入的树脂的量,从排气口33向外部排出型腔31内部的空气。密封树脂可采用热硬性树脂或热塑性树脂两者,但最好采用热塑性树脂。
其次,参照图5(B),通过连续进行自浇口32的树脂封入,由密封树脂充满型腔31,将引线11、电路元件13及金属细线14密封。利用上述工序进行树脂密封。可不使在作为SAW滤波器的第一电路元件13A的内部形成的空隙破坏地进行树脂密封。
参照图5(C)的特性图,对如何在不对第一电路元件13A产生不良影响的情况下进行树脂密封的情况进行说明。同图的横轴表示型腔内部的长度方向的位置,纵轴表示密封了的树脂产生的密封压力。
本申请中使用的热硬性树脂具有在加热时熔解,粘性降低,进一步加热时,由于热硬化而使粘性提高且硬化随经过时间而发展的性质。参照同图,由于刚从浇口32注入后的密封树脂的粘性低,故具有高的树脂压力。然后,通过在型腔31内部从浇口32向排气口33的方向移动,树脂硬化加剧,密封树脂15的树脂压力降低。这是由于,模型30的温度比热硬性树脂即密封树脂的玻化温度高,故在移动的同时,滞留于型腔31内部的密封树脂15的硬化加剧。
如上所述可知,在型腔31内部,距浇口32越远,由密封树脂得到的树脂压力越低。因此,在型腔31内部,在设于与设有浇口32的位置对向的位置的第一电路元件13A上作用的树脂压力非常低。由此,即使在进行树脂的封入压力高的传递膜模制的情况下,也可以防止树脂的封入压使作为SAW滤波器的第一电路元件13A的特性劣化。
在上述工序结束后,经由成形引线的工序等,完成图1所述的电路装置10。
发明效果
在本发明中,可实现下面所述的效果。
在本发明中,具有在内部形成有空隙的第一电路元件、和多个第二电路元件,使第一电路元件和第二电路元件分开的距离比第二电路元件相互间分开的距离大。因此,可防止由第二电路元件产生的热过度地传导到第一电路元件上。因此,可防止由于热应力而使第一电路元件13A的内部空间变形,作为SAW滤波器的第一电路元件13A的特性劣化的情况。
在制法上,在进行树脂密封的工序中,由于使第一电路元件比第二电路元件距浇口远,故可抑制树脂密封压力造成的第一电路元件13A的内部空间的变形。
Claims (4)
1、一种电路装置,其特征在于,具有:第一电路元件,其固定在第一接合区,内部具有间隙;第二电路元件,其被固定在与所述第一接合区分开且配置于中央部附近的第二接合区上;第一引线,其一端导出到外部,另一端与所述第一电路元件或所述第二电路元件连接;第二引线,其连接所述第一电路元件和所述第二电路元件;第三引线,其以连接所述第一接合区和所述第二接合区的方式延伸设置,其宽度形成得比所述第一接合区及所述第二接合区窄;密封树脂,其将所述各电路元件及所述各引线密封。
2、如权利要求1所述的电路装置,其特征在于,所述第一电路元件是SAW滤波器。
3、如权利要求1所述的电路装置,其特征在于,所述第二电路元件是进行视频信号或图像信号处理的半导体元件、或进行所述视频信号中附带的信息的处理的半导体元件、或进行电信号的延迟的CCD。
4、如权利要求1所述的电路装置,其特征在于,所述第一电路元件或所述第二电路元件通过金属细线与所述第一引线或所述第二引线连接。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003310763 | 2003-09-02 | ||
JP310763/2003 | 2003-09-02 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1836329A CN1836329A (zh) | 2006-09-20 |
CN100440509C true CN100440509C (zh) | 2008-12-03 |
Family
ID=34269682
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004800229015A Expired - Fee Related CN100440509C (zh) | 2003-09-02 | 2004-09-01 | 电路装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20070090521A1 (zh) |
JP (1) | JP4624264B2 (zh) |
KR (1) | KR100756131B1 (zh) |
CN (1) | CN100440509C (zh) |
WO (1) | WO2005024947A1 (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102016110862B4 (de) * | 2016-06-14 | 2022-06-30 | Snaptrack, Inc. | Modul und Verfahren zur Herstellung einer Vielzahl von Modulen |
CN111164889B (zh) | 2017-09-29 | 2023-11-03 | 株式会社村田制作所 | 混合滤波器装置以及多路调制器 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02166903A (ja) * | 1988-12-21 | 1990-06-27 | Matsushima Kogyo Co Ltd | 半導体装置及びその製造方法 |
JPH07326928A (ja) * | 1994-05-31 | 1995-12-12 | Seikosha Co Ltd | 水晶発振回路の製造方法 |
JPH09162345A (ja) * | 1995-02-15 | 1997-06-20 | Seiko Epson Corp | 圧電発振器及び電圧制御発振器並びにその製造方法 |
JP2003218147A (ja) * | 2002-01-23 | 2003-07-31 | Matsushita Electric Ind Co Ltd | 集積回路 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001168641A (ja) * | 1999-12-09 | 2001-06-22 | Murata Mfg Co Ltd | 圧電発振器 |
JP3789410B2 (ja) * | 2002-08-29 | 2006-06-21 | 富士通メディアデバイス株式会社 | 表面実装型電子部品モジュールおよびその製造方法 |
-
2004
- 2004-09-01 US US10/569,788 patent/US20070090521A1/en not_active Abandoned
- 2004-09-01 JP JP2005513705A patent/JP4624264B2/ja not_active Expired - Fee Related
- 2004-09-01 WO PCT/JP2004/013002 patent/WO2005024947A1/ja active Application Filing
- 2004-09-01 CN CNB2004800229015A patent/CN100440509C/zh not_active Expired - Fee Related
- 2004-09-01 KR KR20067003711A patent/KR100756131B1/ko not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02166903A (ja) * | 1988-12-21 | 1990-06-27 | Matsushima Kogyo Co Ltd | 半導体装置及びその製造方法 |
JPH07326928A (ja) * | 1994-05-31 | 1995-12-12 | Seikosha Co Ltd | 水晶発振回路の製造方法 |
JPH09162345A (ja) * | 1995-02-15 | 1997-06-20 | Seiko Epson Corp | 圧電発振器及び電圧制御発振器並びにその製造方法 |
JP2003218147A (ja) * | 2002-01-23 | 2003-07-31 | Matsushita Electric Ind Co Ltd | 集積回路 |
Also Published As
Publication number | Publication date |
---|---|
KR100756131B1 (ko) | 2007-09-05 |
WO2005024947A1 (ja) | 2005-03-17 |
JP4624264B2 (ja) | 2011-02-02 |
KR20060060699A (ko) | 2006-06-05 |
JPWO2005024947A1 (ja) | 2006-11-16 |
US20070090521A1 (en) | 2007-04-26 |
CN1836329A (zh) | 2006-09-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1333459C (zh) | 电路装置 | |
US7020295B2 (en) | Piezoelectric electroacoustic transducer and manufacturing method of the same | |
US4451754A (en) | High frequency piezoelectric resonator | |
US6307300B1 (en) | Piezoelectric acoustic component | |
JPH05206356A (ja) | 集積回路用パッケージ | |
CN106301283A (zh) | 声表面波滤波器的封装结构及制作方法 | |
CN102800660A (zh) | 模块和制造模块的方法 | |
US7002803B2 (en) | Electronic product with heat radiating plate | |
JP4217742B2 (ja) | 電動モータならびにこのような電動モータを製作するための方法 | |
JP2002367862A (ja) | 固体電解コンデンサおよびその製造方法 | |
KR100445569B1 (ko) | 플립-칩어셈블리에적합한전기소자의콘택을제조하기위한방법 | |
US6678164B2 (en) | Pressure sensor and method for manufacturing the same | |
US6347038B1 (en) | Electronic assemblies with a heat sink, especially for a control module of a motor-vehicle headlight discharge lamp | |
US4953007A (en) | Plastic encapsulated integrated circuit package with electrostatic shield | |
CN100440509C (zh) | 电路装置 | |
EP1533839A2 (en) | Semiconductor device with a gel-filled case | |
KR100371572B1 (ko) | 압전 부품 | |
CN110290451B (zh) | 一种封装组件及麦克风模组 | |
CN109964406A (zh) | 表面声波元件封装及其制造方法 | |
KR101767720B1 (ko) | 반도체 칩을 수용하는 스마트 카드 바디 및 그 제조 방법 | |
CN103646879B (zh) | 一种可拆卸、可组装的sip封装结构的制作方法 | |
CN110828442A (zh) | 封装结构及其制作方法 | |
KR20200060010A (ko) | 탄탈륨 커패시터 | |
CN111684557B (zh) | 具有功率电子构件的功率模块 | |
JPH0197002A (ja) | 誘電体フィルタ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20081203 Termination date: 20120901 |