CN100336197C - 图案复制掩模、半导体装置制造方法及掩模图案制作用程序 - Google Patents

图案复制掩模、半导体装置制造方法及掩模图案制作用程序 Download PDF

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Publication number
CN100336197C
CN100336197C CNB031548423A CN03154842A CN100336197C CN 100336197 C CN100336197 C CN 100336197C CN B031548423 A CNB031548423 A CN B031548423A CN 03154842 A CN03154842 A CN 03154842A CN 100336197 C CN100336197 C CN 100336197C
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CN
China
Prior art keywords
pattern
mask
photoresist
hole
light
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Expired - Fee Related
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CNB031548423A
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English (en)
Chinese (zh)
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CN1497699A (zh
Inventor
坂井淳二郎
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Renesas Technology Corp
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Renesas Technology Corp
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Publication of CN1497699A publication Critical patent/CN1497699A/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/085—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving intermediate temporary filling with material
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
CNB031548423A 2002-10-24 2003-08-15 图案复制掩模、半导体装置制造方法及掩模图案制作用程序 Expired - Fee Related CN100336197C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP309416/02 2002-10-24
JP2002309416A JP2004144975A (ja) 2002-10-24 2002-10-24 パターン転写マスク、半導体装置の製造方法、及び、マスクパターン作成用コンピュータプログラム
JP309416/2002 2002-10-24

Publications (2)

Publication Number Publication Date
CN1497699A CN1497699A (zh) 2004-05-19
CN100336197C true CN100336197C (zh) 2007-09-05

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CNB031548423A Expired - Fee Related CN100336197C (zh) 2002-10-24 2003-08-15 图案复制掩模、半导体装置制造方法及掩模图案制作用程序

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US (2) US7033925B2 (enExample)
JP (1) JP2004144975A (enExample)
CN (1) CN100336197C (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006095915A1 (ja) * 2005-03-09 2006-09-14 Nec Corporation 多層配線構造、半導体装置、パターン転写マスク、及び多層配線構造の製造方法
KR100898222B1 (ko) * 2007-08-30 2009-05-18 주식회사 동부하이텍 반도체 소자 및 그 제조 방법
CN102683876B (zh) * 2012-04-28 2016-01-06 深圳光启创新技术有限公司 超材料的制备工艺
CN103019042B (zh) * 2012-11-29 2015-01-07 上海华力微电子有限公司 改善高透光率掩膜板套刻精度稳定性的方法
CN107505811B (zh) * 2017-09-11 2020-05-05 深圳市华星光电技术有限公司 光罩
US10481487B2 (en) 2017-09-11 2019-11-19 Shenzhen China Star Optoelectronics Technology Co., Ltd Mask
CN112711173A (zh) * 2020-12-31 2021-04-27 苏州科阳半导体有限公司 一种光罩

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11307426A (ja) * 1998-04-22 1999-11-05 Toshiba Corp マスクパターンの補正方法と補正システム、及びこれらを用いた露光用マスクと半導体装置
JP2000058647A (ja) * 1998-08-17 2000-02-25 Toshiba Corp 半導体装置の製造方法
JP2000077524A (ja) * 1998-09-03 2000-03-14 Matsushita Electronics Industry Corp パターン形成方法
JP2001351924A (ja) * 2000-06-08 2001-12-21 Mitsubishi Electric Corp 半導体装置の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0450943A (ja) * 1990-06-15 1992-02-19 Mitsubishi Electric Corp マスクパターンとその製造方法
JPH0844038A (ja) 1994-08-03 1996-02-16 Matsushita Electron Corp マスターマスク作成装置及び半導体装置の製造方法
JPH1012543A (ja) * 1996-06-20 1998-01-16 Mitsubishi Electric Corp 位相シフトマスクを用いたパターンの形成方法
US6355399B1 (en) * 2000-01-18 2002-03-12 Chartered Semiconductor Manufacturing Ltd. One step dual damascene patterning by gray tone mask
JP3760086B2 (ja) * 2000-07-07 2006-03-29 株式会社ルネサステクノロジ フォトマスクの製造方法
US6436810B1 (en) * 2000-09-27 2002-08-20 Institute Of Microelectronics Bi-layer resist process for dual damascene
KR100475074B1 (ko) * 2002-05-16 2005-03-10 삼성전자주식회사 반도체 소자의 커패시터의 스토리지 전극 제조 방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11307426A (ja) * 1998-04-22 1999-11-05 Toshiba Corp マスクパターンの補正方法と補正システム、及びこれらを用いた露光用マスクと半導体装置
JP2000058647A (ja) * 1998-08-17 2000-02-25 Toshiba Corp 半導体装置の製造方法
JP2000077524A (ja) * 1998-09-03 2000-03-14 Matsushita Electronics Industry Corp パターン形成方法
JP2001351924A (ja) * 2000-06-08 2001-12-21 Mitsubishi Electric Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
US7033925B2 (en) 2006-04-25
CN1497699A (zh) 2004-05-19
US20060141774A1 (en) 2006-06-29
JP2004144975A (ja) 2004-05-20
US20040083444A1 (en) 2004-04-29

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Granted publication date: 20070905