CA1057418A - Composite channel field effect transistor and method of fabrication - Google Patents
Composite channel field effect transistor and method of fabricationInfo
- Publication number
- CA1057418A CA1057418A CA268,530A CA268530A CA1057418A CA 1057418 A CA1057418 A CA 1057418A CA 268530 A CA268530 A CA 268530A CA 1057418 A CA1057418 A CA 1057418A
- Authority
- CA
- Canada
- Prior art keywords
- regions
- source
- drain
- region
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/213—Channel regions of field-effect devices
- H10D62/221—Channel regions of field-effect devices of FETs
- H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
- H10D62/299—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations
- H10D62/307—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations the doping variations being parallel to the channel lengths
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
- H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US64577175A | 1975-12-31 | 1975-12-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1057418A true CA1057418A (en) | 1979-06-26 |
Family
ID=24590420
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA268,530A Expired CA1057418A (en) | 1975-12-31 | 1976-12-22 | Composite channel field effect transistor and method of fabrication |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US4070687A (enExample) |
| JP (1) | JPS5283181A (enExample) |
| CA (1) | CA1057418A (enExample) |
| DE (1) | DE2655998C2 (enExample) |
| FR (1) | FR2337428A1 (enExample) |
| GB (1) | GB1569897A (enExample) |
| IT (1) | IT1070009B (enExample) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4173791A (en) * | 1977-09-16 | 1979-11-06 | Fairchild Camera And Instrument Corporation | Insulated gate field-effect transistor read-only memory array |
| US4212683A (en) * | 1978-03-27 | 1980-07-15 | Ncr Corporation | Method for making narrow channel FET |
| US4485390A (en) * | 1978-03-27 | 1984-11-27 | Ncr Corporation | Narrow channel FET |
| JPS54144183A (en) * | 1978-05-01 | 1979-11-10 | Handotai Kenkyu Shinkokai | Insulated gate type electrostatic induction transistor and semiconductor integrated circuit |
| JPS5561069A (en) * | 1978-10-31 | 1980-05-08 | Fujitsu Ltd | Manufacture of semiconductor device |
| US4282646A (en) * | 1979-08-20 | 1981-08-11 | International Business Machines Corporation | Method of making a transistor array |
| US4329186A (en) * | 1979-12-20 | 1982-05-11 | Ibm Corporation | Simultaneously forming fully implanted DMOS together with enhancement and depletion mode MOSFET devices |
| US4369072A (en) * | 1981-01-22 | 1983-01-18 | International Business Machines Corp. | Method for forming IGFET devices having improved drain voltage characteristics |
| EP0069649B1 (en) * | 1981-07-10 | 1989-04-19 | FAIRCHILD CAMERA & INSTRUMENT CORPORATION | Self-aligned antiblooming structure for charge-coupled devices and method of fabrication thereof |
| US5118631A (en) * | 1981-07-10 | 1992-06-02 | Loral Fairchild Corporation | Self-aligned antiblooming structure for charge-coupled devices and method of fabrication thereof |
| JPS5833870A (ja) * | 1981-08-24 | 1983-02-28 | Hitachi Ltd | 半導体装置 |
| FR2529715A1 (fr) * | 1982-07-01 | 1984-01-06 | Commissariat Energie Atomique | Procede d'optimisation du dopage dans un transistor mos |
| JPS59126674A (ja) * | 1983-01-10 | 1984-07-21 | Toshiba Corp | 情報記憶用半導体装置 |
| JPS62283667A (ja) * | 1986-05-31 | 1987-12-09 | Toshiba Corp | 半導体装置の製造方法 |
| JPS63119574A (ja) * | 1986-11-07 | 1988-05-24 | Toshiba Corp | 半導体装置の製造方法 |
| US4906588A (en) * | 1988-06-23 | 1990-03-06 | Dallas Semiconductor Corporation | Enclosed buried channel transistor |
| US5122474A (en) * | 1988-06-23 | 1992-06-16 | Dallas Semiconductor Corporation | Method of fabricating a CMOS IC with reduced susceptibility to PMOS punchthrough |
| US4943537A (en) * | 1988-06-23 | 1990-07-24 | Dallas Semiconductor Corporation | CMOS integrated circuit with reduced susceptibility to PMOS punchthrough |
| EP0513415A1 (en) * | 1991-05-16 | 1992-11-19 | Kabushiki Kaisha Toshiba | Insulated gate FET having double-layered wells of low and high impurity concentrations and method of manufacturing the same |
| JP3212150B2 (ja) * | 1992-08-07 | 2001-09-25 | 株式会社日立製作所 | 半導体装置 |
| JPH10214964A (ja) * | 1997-01-30 | 1998-08-11 | Oki Electric Ind Co Ltd | Mosfet及びその製造方法 |
| US11552169B2 (en) * | 2019-03-27 | 2023-01-10 | Intel Corporation | Source or drain structures with phosphorous and arsenic co-dopants |
| US11804523B2 (en) * | 2019-09-24 | 2023-10-31 | Intel Corporation | High aspect ratio source or drain structures with abrupt dopant profile |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1153428A (en) * | 1965-06-18 | 1969-05-29 | Philips Nv | Improvements in Semiconductor Devices. |
| GB1316555A (enExample) * | 1969-08-12 | 1973-05-09 | ||
| US3806773A (en) * | 1971-07-17 | 1974-04-23 | Sony Corp | Field effect transistor having back-to-back diodes connected to the gate electrode and having a protective layer between the source and the diodes to prevent thyristor action |
| US3877055A (en) * | 1972-11-13 | 1975-04-08 | Motorola Inc | Semiconductor memory device |
| US3883372A (en) * | 1973-07-11 | 1975-05-13 | Westinghouse Electric Corp | Method of making a planar graded channel MOS transistor |
| JPS571904B2 (enExample) * | 1973-07-12 | 1982-01-13 | ||
| JPS5036087A (enExample) * | 1973-07-13 | 1975-04-04 | ||
| US3996655A (en) * | 1973-12-14 | 1976-12-14 | Texas Instruments Incorporated | Processes of forming insulated gate field effect transistors with channel lengths of one micron in integrated circuits with component isolated and product |
| US3909320A (en) * | 1973-12-26 | 1975-09-30 | Signetics Corp | Method for forming MOS structure using double diffusion |
-
1976
- 1976-11-25 GB GB49288/76A patent/GB1569897A/en not_active Expired
- 1976-11-29 FR FR7636401A patent/FR2337428A1/fr active Granted
- 1976-12-10 DE DE2655998A patent/DE2655998C2/de not_active Expired
- 1976-12-10 IT IT7630276A patent/IT1070009B/it active
- 1976-12-10 JP JP14793076A patent/JPS5283181A/ja active Pending
- 1976-12-22 CA CA268,530A patent/CA1057418A/en not_active Expired
-
1977
- 1977-06-06 US US05/803,712 patent/US4070687A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE2655998C2 (de) | 1986-01-30 |
| IT1070009B (it) | 1985-03-25 |
| US4070687A (en) | 1978-01-24 |
| FR2337428B1 (enExample) | 1980-10-24 |
| DE2655998A1 (de) | 1977-07-14 |
| JPS5283181A (en) | 1977-07-11 |
| FR2337428A1 (fr) | 1977-07-29 |
| GB1569897A (en) | 1980-06-25 |
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