CA1044577A - Process for epitaxially growing silicon thin layers - Google Patents

Process for epitaxially growing silicon thin layers

Info

Publication number
CA1044577A
CA1044577A CA208,240A CA208240A CA1044577A CA 1044577 A CA1044577 A CA 1044577A CA 208240 A CA208240 A CA 208240A CA 1044577 A CA1044577 A CA 1044577A
Authority
CA
Canada
Prior art keywords
process according
doping atoms
substrate
layer
boundary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA208,240A
Other languages
English (en)
French (fr)
Other versions
CA208240S (en
Inventor
Karl-Ulrich Stein
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Application granted granted Critical
Publication of CA1044577A publication Critical patent/CA1044577A/en
Expired legal-status Critical Current

Links

Classifications

    • H10P30/21—
    • H10P30/204—
    • H10P95/00—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/024—Defect control-gettering and annealing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/053—Field effect transistors fets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/097—Lattice strain and defects
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/91—Controlling charging state at semiconductor-insulator interface
CA208,240A 1973-09-03 1974-08-30 Process for epitaxially growing silicon thin layers Expired CA1044577A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2344320A DE2344320C2 (de) 1973-09-03 1973-09-03 Verfahren zur Kompensation von Grenzflächenladungen bei epitaktisch auf ein Substrat aufgewachsenen Siliziumdünnschichten

Publications (1)

Publication Number Publication Date
CA1044577A true CA1044577A (en) 1978-12-19

Family

ID=5891465

Family Applications (1)

Application Number Title Priority Date Filing Date
CA208,240A Expired CA1044577A (en) 1973-09-03 1974-08-30 Process for epitaxially growing silicon thin layers

Country Status (15)

Country Link
US (1) US3909307A (cg-RX-API-DMAC10.html)
JP (1) JPS5931222B2 (cg-RX-API-DMAC10.html)
AT (1) AT340480B (cg-RX-API-DMAC10.html)
BE (1) BE819487A (cg-RX-API-DMAC10.html)
CA (1) CA1044577A (cg-RX-API-DMAC10.html)
CH (1) CH570044A5 (cg-RX-API-DMAC10.html)
DE (1) DE2344320C2 (cg-RX-API-DMAC10.html)
DK (1) DK461074A (cg-RX-API-DMAC10.html)
FR (1) FR2242777B1 (cg-RX-API-DMAC10.html)
GB (1) GB1465830A (cg-RX-API-DMAC10.html)
IE (1) IE39656B1 (cg-RX-API-DMAC10.html)
IT (1) IT1020412B (cg-RX-API-DMAC10.html)
LU (1) LU70843A1 (cg-RX-API-DMAC10.html)
NL (1) NL7410851A (cg-RX-API-DMAC10.html)
SE (1) SE392782B (cg-RX-API-DMAC10.html)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5931224B2 (ja) * 1974-02-18 1984-07-31 日本電気株式会社 半導体装置
JPS5716499B2 (cg-RX-API-DMAC10.html) * 1974-05-27 1982-04-05
FR2380637A1 (fr) * 1977-02-15 1978-09-08 Westinghouse Electric Corp Procede de traitement de circuits integres cmos et circuits obtenus
US4183134A (en) * 1977-02-15 1980-01-15 Westinghouse Electric Corp. High yield processing for silicon-on-sapphire CMOS integrated circuits
US4149906A (en) * 1977-04-29 1979-04-17 International Business Machines Corporation Process for fabrication of merged transistor logic (MTL) cells
JPS5466767A (en) * 1977-11-08 1979-05-29 Fujitsu Ltd Manufacture for sos construction
US4177084A (en) * 1978-06-09 1979-12-04 Hewlett-Packard Company Method for producing a low defect layer of silicon-on-sapphire wafer
US4330343A (en) * 1979-01-04 1982-05-18 The United States Of America As Represented By The Secretary Of The Navy Refractory passivated ion-implanted GaAs ohmic contacts
US4459159A (en) * 1982-09-29 1984-07-10 Mara William C O Method for making semi-insulating substrate by post-process heating of oxygenated and doped silicon
US4509990A (en) * 1982-11-15 1985-04-09 Hughes Aircraft Company Solid phase epitaxy and regrowth process with controlled defect density profiling for heteroepitaxial semiconductor on insulator composite substrates
JPS59159563A (ja) * 1983-03-02 1984-09-10 Toshiba Corp 半導体装置の製造方法
US4732867A (en) * 1986-11-03 1988-03-22 General Electric Company Method of forming alignment marks in sapphire
US4766482A (en) * 1986-12-09 1988-08-23 General Electric Company Semiconductor device and method of making the same
US5453153A (en) * 1987-11-13 1995-09-26 Kopin Corporation Zone-melting recrystallization process
US5244819A (en) * 1991-10-22 1993-09-14 Honeywell Inc. Method to getter contamination in semiconductor devices

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3520741A (en) * 1967-12-18 1970-07-14 Hughes Aircraft Co Method of simultaneous epitaxial growth and ion implantation
US3658586A (en) * 1969-04-11 1972-04-25 Rca Corp Epitaxial silicon on hydrogen magnesium aluminate spinel single crystals
US3582410A (en) * 1969-07-11 1971-06-01 North American Rockwell Process for producing metal base semiconductor devices
US3767483A (en) * 1970-05-11 1973-10-23 Hitachi Ltd Method of making semiconductor devices

Also Published As

Publication number Publication date
DK461074A (cg-RX-API-DMAC10.html) 1975-05-05
FR2242777B1 (cg-RX-API-DMAC10.html) 1979-01-05
IT1020412B (it) 1977-12-20
NL7410851A (nl) 1975-03-05
AT340480B (de) 1977-12-12
ATA640174A (de) 1977-04-15
FR2242777A1 (cg-RX-API-DMAC10.html) 1975-03-28
JPS5931222B2 (ja) 1984-07-31
SE7411020L (cg-RX-API-DMAC10.html) 1975-03-04
IE39656L (en) 1975-03-03
GB1465830A (en) 1977-03-02
CH570044A5 (cg-RX-API-DMAC10.html) 1975-11-28
US3909307A (en) 1975-09-30
BE819487A (fr) 1974-12-31
DE2344320C2 (de) 1975-06-26
DE2344320B1 (de) 1974-11-07
IE39656B1 (en) 1978-12-06
JPS5056184A (cg-RX-API-DMAC10.html) 1975-05-16
SE392782B (sv) 1977-04-18
LU70843A1 (cg-RX-API-DMAC10.html) 1975-01-02

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