BR9909652A - Circuit device for reducing leakage current - Google Patents

Circuit device for reducing leakage current

Info

Publication number
BR9909652A
BR9909652A BR9909652-8A BR9909652A BR9909652A BR 9909652 A BR9909652 A BR 9909652A BR 9909652 A BR9909652 A BR 9909652A BR 9909652 A BR9909652 A BR 9909652A
Authority
BR
Brazil
Prior art keywords
leakage current
reducing leakage
circuit device
circuit
voltage
Prior art date
Application number
BR9909652-8A
Other languages
Portuguese (pt)
Inventor
Joerg Berthold
Mathias Eberlein
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Publication of BR9909652A publication Critical patent/BR9909652A/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008Arrangements for reducing power consumption
    • H03K19/0016Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply

Abstract

Patente de Invenção: <B>"DISPOSIçãO DE CIRCUITO PARA A REDUçãO DA CORRENTE DE FUGA"<D>. A invenção refere-se a uma disposição de circuito com partes de circuito (2, 3) constituídas por transistores com baixa tensão de corte (transistores-NV). Para a redução da corrente de fuga das partes de circuito (2, 3) a parte de circuito é acoplada, pela interligação de um transistor de comutação (MP1, MN1) de alta tensão de corte (transistor-HV), com uma tensão de suprimento (VDD, VSS) e em paralelo com o transistor de comutação-HV (MP1, MN1) é ligado um transistor de comando-NV (MNH1, MPH1).Invention Patent: <B> "CIRCUIT ARRANGEMENT FOR REDUCING LEAKAGE CURRENT" <D>. The invention relates to a circuit arrangement with circuit parts (2, 3) consisting of transistors with low shear voltage (transistors-NV). To reduce the leakage current of the circuit parts (2, 3) the circuit part is coupled, by interconnecting a switching transistor (MP1, MN1) with high shear voltage (transistor-HV), with a voltage of supply (VDD, VSS) and in parallel with the switching transistor-HV (MP1, MN1) a control transistor-NV (MNH1, MPH1) is connected.

BR9909652-8A 1998-03-16 1999-03-11 Circuit device for reducing leakage current BR9909652A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19811353A DE19811353C1 (en) 1998-03-16 1998-03-16 Circuit arrangement for reducing leakage current
PCT/DE1999/000677 WO1999048208A1 (en) 1998-03-16 1999-03-11 Circuit for reducing leaking current

Publications (1)

Publication Number Publication Date
BR9909652A true BR9909652A (en) 2000-11-21

Family

ID=7861059

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9909652-8A BR9909652A (en) 1998-03-16 1999-03-11 Circuit device for reducing leakage current

Country Status (8)

Country Link
EP (1) EP1064726A1 (en)
JP (1) JP2002507852A (en)
KR (1) KR20010041927A (en)
CN (1) CN1301430A (en)
BR (1) BR9909652A (en)
DE (1) DE19811353C1 (en)
RU (1) RU2000125907A (en)
WO (1) WO1999048208A1 (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6166985A (en) * 1999-04-30 2000-12-26 Intel Corporation Integrated circuit low leakage power circuitry for use with an advanced CMOS process
JP3727838B2 (en) * 2000-09-27 2005-12-21 株式会社東芝 Semiconductor integrated circuit
DE10128732C1 (en) * 2001-06-13 2002-05-29 Infineon Technologies Ag Current requirement estimation method for gating circuit summates currents for all switched gates in each time interval into which switching process is divided
US6515935B1 (en) * 2001-10-19 2003-02-04 Hewlett-Packard Company Method and apparatus for reducing average power in memory arrays by switching a diode in or out of the ground path
FR2838256A1 (en) * 2002-04-08 2003-10-10 St Microelectronics Sa Method for putting in waiting mode a component and associated integrated circuit
US6611451B1 (en) * 2002-06-28 2003-08-26 Texas Instruments Incorporated Memory array and wordline driver supply voltage differential in standby
WO2004075406A1 (en) * 2003-02-19 2004-09-02 Koninklijke Philips Electronics, N.V. Leakage power control
EP1743422B1 (en) * 2004-02-19 2019-08-07 Conversant Intellectual Property Management Inc. Low leakage and data retention circuitry
US7227383B2 (en) 2004-02-19 2007-06-05 Mosaid Delaware, Inc. Low leakage and data retention circuitry
WO2009144661A1 (en) * 2008-05-27 2009-12-03 Nxp B.V. Integrated circuit and integrated circuit control method
DE102008053533A1 (en) * 2008-10-28 2010-04-29 Atmel Automotive Gmbh Circuit, method for controlling and using a circuit for a sleep mode and an operating mode
DE102014107545A1 (en) * 2014-05-28 2015-12-03 Phoenix Contact Gmbh & Co. Kg POWER SUPPLY UNIT
US11599185B2 (en) * 2015-07-22 2023-03-07 Synopsys, Inc. Internet of things (IoT) power and performance management technique and circuit methodology

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5614847A (en) * 1992-04-14 1997-03-25 Hitachi, Ltd. Semiconductor integrated circuit device having power reduction mechanism
US5596286A (en) * 1993-11-12 1997-01-21 Texas Instruments Incorporated Current limiting devices to reduce leakage, photo, or stand-by current in an integrated circuit
JP3725911B2 (en) * 1994-06-02 2005-12-14 株式会社ルネサステクノロジ Semiconductor device
DE19515417C2 (en) * 1995-04-26 1998-10-15 Siemens Ag Circuit arrangement for driving a power MOSFET

Also Published As

Publication number Publication date
EP1064726A1 (en) 2001-01-03
KR20010041927A (en) 2001-05-25
CN1301430A (en) 2001-06-27
RU2000125907A (en) 2002-09-10
JP2002507852A (en) 2002-03-12
DE19811353C1 (en) 1999-07-22
WO1999048208A1 (en) 1999-09-23

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Legal Events

Date Code Title Description
B08F Application fees: application dismissed [chapter 8.6 patent gazette]

Free format text: REFERENTE A 4O,5O6O, 7O E 8O ANUIDADES

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 1911 DE 21/08/2007.