BR9906465A - Substrato para circuito eletrônico compreendendo meios anti-remoção - Google Patents

Substrato para circuito eletrônico compreendendo meios anti-remoção

Info

Publication number
BR9906465A
BR9906465A BR9906465-0A BR9906465A BR9906465A BR 9906465 A BR9906465 A BR 9906465A BR 9906465 A BR9906465 A BR 9906465A BR 9906465 A BR9906465 A BR 9906465A
Authority
BR
Brazil
Prior art keywords
substrate
electronic circuit
removal means
insulating element
electronic
Prior art date
Application number
BR9906465-0A
Other languages
English (en)
Inventor
Le Loc H Alain
Original Assignee
Bull Cp8
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull Cp8 filed Critical Bull Cp8
Publication of BR9906465A publication Critical patent/BR9906465A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • G06K19/07381—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit with deactivation or otherwise incapacitation of at least a part of the circuit upon detected tampering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Structure Of Printed Boards (AREA)
  • Eyeglasses (AREA)

Abstract

SUBSTRATO PARA CIRCUITO ELETRôNICO COMPREENDENDO MEIOS ANTI-REMOçãO A invenção refere-se a um substrato para circuito eletrônico (9), o circuito eletrônico portanto ao menos uma almofada de contato, o substrato compreendendo um elemento isolante (3, 12) que aloja o circuito eletrônico e porta, num lado externo, uma camada condutora que define ao menos uma região de contato (7, 8), dita almofada de contato ao menos provida sendo ligada à dita região de contato. De acordo com a invenção, o substrato compreende ao menos uma zona frágil (5, 6) disposta no elemento isolante (3, 12). A invenção se aplica particularmente ao campo de cartão de chip.
BR9906465-0A 1998-05-20 1999-05-10 Substrato para circuito eletrônico compreendendo meios anti-remoção BR9906465A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9806361A FR2778997B1 (fr) 1998-05-20 1998-05-20 Support pour un circuit electronique, comprenant des moyens anti-arrachement
PCT/FR1999/001106 WO1999060518A1 (fr) 1998-05-20 1999-05-10 Support pour un circuit electronique, comprenant des moyens anti-arrachement

Publications (1)

Publication Number Publication Date
BR9906465A true BR9906465A (pt) 2000-09-26

Family

ID=9526545

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9906465-0A BR9906465A (pt) 1998-05-20 1999-05-10 Substrato para circuito eletrônico compreendendo meios anti-remoção

Country Status (9)

Country Link
US (1) US6472733B1 (pt)
EP (1) EP0996930B1 (pt)
JP (1) JP2002516441A (pt)
KR (1) KR100702108B1 (pt)
BR (1) BR9906465A (pt)
DE (1) DE69933837T2 (pt)
DK (1) DK0996930T3 (pt)
FR (1) FR2778997B1 (pt)
WO (1) WO1999060518A1 (pt)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19957119A1 (de) * 1999-11-26 2001-05-31 Infineon Technologies Ag Chipkarte
DE10328133A1 (de) * 2003-06-23 2005-01-13 Giesecke & Devrient Gmbh Datenträger
KR101037353B1 (ko) 2003-07-07 2011-05-30 애버리 데니슨 코포레이션 가변 특성을 지닌 알에프아이디 장치
US7847380B2 (en) * 2007-09-20 2010-12-07 Samsung Electronics Co., Ltd. Tape substrate and semiconductor module for smart card, method of fabricating the same, and smart card
KR100910390B1 (ko) 2007-09-21 2009-08-04 사이버넷 주식회사 인쇄회로기판의 접촉 감지용 패턴.
EP2420960A1 (fr) * 2010-08-17 2012-02-22 Gemalto SA Procédé de fabrication d'un dispositif électronique comportant un module indémontable et dispositif obtenu

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62214998A (ja) * 1986-03-17 1987-09-21 三菱電機株式会社 薄型半導体カ−ド
FR2721732B1 (fr) * 1994-06-22 1996-08-30 Solaic Sa Carte à mémoire sans contact dont le circuit électronique comporte un module.
FR2724750B1 (fr) * 1994-09-16 1996-12-06 Thomson Csf Carte electronique avec voyant de bon fonctionnement
DE4443767A1 (de) * 1994-12-08 1996-06-13 Giesecke & Devrient Gmbh Elektronisches Modul und Datenträger mit elektrischem Modul
FR2738077B1 (fr) * 1995-08-23 1997-09-19 Schlumberger Ind Sa Micro-boitier electronique pour carte a memoire electronique et procede de realisation
US5786988A (en) * 1996-07-02 1998-07-28 Sandisk Corporation Integrated circuit chips made bendable by forming indentations in their back surfaces flexible packages thereof and methods of manufacture

Also Published As

Publication number Publication date
KR100702108B1 (ko) 2007-04-02
EP0996930A1 (fr) 2000-05-03
JP2002516441A (ja) 2002-06-04
US6472733B1 (en) 2002-10-29
FR2778997B1 (fr) 2000-06-23
DE69933837D1 (de) 2006-12-14
EP0996930B1 (fr) 2006-11-02
KR20010021985A (ko) 2001-03-15
WO1999060518A1 (fr) 1999-11-25
FR2778997A1 (fr) 1999-11-26
DE69933837T2 (de) 2007-07-05
DK0996930T3 (da) 2007-03-12

Similar Documents

Publication Publication Date Title
EP0996154A4 (en) SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD, CIRCUIT SUBSTRATE AND ELECTRONIC DEVICE
FR2840711B1 (fr) Carte de circuit integre et procede de fabrication de celle-ci
EP1005086A3 (en) Metal foil having bumps, circuit substrate having the metal foil, and semiconductor device having the circuit substrate
KR910008854A (ko) 전기 또는 전자회로의 성형에 사용되는 세라믹기판
EP1255299A3 (de) Leistungshalbleitermodul in Druckkontaktierung
ES2196776T3 (es) Modulo de tarjeta de chip para sensores biometricos.
KR900017449A (ko) 전자 어셈블리 및 전자 어셈블리를 형성하는 공정
KR930003795A (ko) 집적 회로 접속 방법
KR950010350A (ko) 유전체 필터
WO1999045588A3 (en) Semiconductor device comprising a glass supporting body onto which a substrate with semiconductor elements and a metallization is attached by means of an adhesive
KR920007134A (ko) 유전 패키지 본체에 전기도선이 있는 ic패키지
KR940022803A (ko) 반도체 패키지 및 그 실장에 적합한 인쇄회로기판
AU2002316910A1 (en) Circuit board with at least one electronic component
SE9802157L (sv) Elektrisk komponent
BR9906465A (pt) Substrato para circuito eletrônico compreendendo meios anti-remoção
BR0015835A (pt) Suporte plano com ao menos um chip semicondutor
SE9800709L (sv) Ledare
KR0155843B1 (ko) 반도체장치
KR910008824A (ko) 반도체소자패키지 및 반도체소자패키지 탑재배선회로기판
KR970060467A (ko) 반도체장치
US4574330A (en) Heat sink for dissipating heat generated by electronic displays
KR970003929A (ko) 반도체장치
KR880005685A (ko) 혼성집적회로
SE0001504L (sv) Elektronisk komponent och radioterminal där denna andvänds
SE0100553D0 (sv) Polymer circuit

Legal Events

Date Code Title Description
FA10 Dismissal: dismissal - article 33 of industrial property law
B11Y Definitive dismissal - extension of time limit for request of examination expired [chapter 11.1.1 patent gazette]