DE69933837D1 - Unterlage für elektrische schaltanordnung mit mitteln die entkoppeln vermeiden - Google Patents

Unterlage für elektrische schaltanordnung mit mitteln die entkoppeln vermeiden

Info

Publication number
DE69933837D1
DE69933837D1 DE69933837T DE69933837T DE69933837D1 DE 69933837 D1 DE69933837 D1 DE 69933837D1 DE 69933837 T DE69933837 T DE 69933837T DE 69933837 T DE69933837 T DE 69933837T DE 69933837 D1 DE69933837 D1 DE 69933837D1
Authority
DE
Germany
Prior art keywords
document
electrical circuit
circuit arrangement
means avoid
avoid decoupling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69933837T
Other languages
English (en)
Other versions
DE69933837T2 (de
Inventor
Loc H Alain Le
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CP8 Technologies SA
Original Assignee
CP8 Technologies SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CP8 Technologies SA filed Critical CP8 Technologies SA
Publication of DE69933837D1 publication Critical patent/DE69933837D1/de
Application granted granted Critical
Publication of DE69933837T2 publication Critical patent/DE69933837T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • G06K19/07381—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit with deactivation or otherwise incapacitation of at least a part of the circuit upon detected tampering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Structure Of Printed Boards (AREA)
  • Eyeglasses (AREA)
DE69933837T 1998-05-20 1999-05-10 Unterlage für elektrische schaltanordnung mit mitteln die entkoppeln vermeiden Expired - Lifetime DE69933837T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR9806361A FR2778997B1 (fr) 1998-05-20 1998-05-20 Support pour un circuit electronique, comprenant des moyens anti-arrachement
FR9806361 1998-05-20
PCT/FR1999/001106 WO1999060518A1 (fr) 1998-05-20 1999-05-10 Support pour un circuit electronique, comprenant des moyens anti-arrachement

Publications (2)

Publication Number Publication Date
DE69933837D1 true DE69933837D1 (de) 2006-12-14
DE69933837T2 DE69933837T2 (de) 2007-07-05

Family

ID=9526545

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69933837T Expired - Lifetime DE69933837T2 (de) 1998-05-20 1999-05-10 Unterlage für elektrische schaltanordnung mit mitteln die entkoppeln vermeiden

Country Status (9)

Country Link
US (1) US6472733B1 (de)
EP (1) EP0996930B1 (de)
JP (1) JP2002516441A (de)
KR (1) KR100702108B1 (de)
BR (1) BR9906465A (de)
DE (1) DE69933837T2 (de)
DK (1) DK0996930T3 (de)
FR (1) FR2778997B1 (de)
WO (1) WO1999060518A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19957119A1 (de) * 1999-11-26 2001-05-31 Infineon Technologies Ag Chipkarte
DE10328133A1 (de) * 2003-06-23 2005-01-13 Giesecke & Devrient Gmbh Datenträger
CN100382104C (zh) 2003-07-07 2008-04-16 艾利丹尼森公司 具有可改变特性的射频识别装置
US7847380B2 (en) * 2007-09-20 2010-12-07 Samsung Electronics Co., Ltd. Tape substrate and semiconductor module for smart card, method of fabricating the same, and smart card
KR100910390B1 (ko) 2007-09-21 2009-08-04 사이버넷 주식회사 인쇄회로기판의 접촉 감지용 패턴.
EP2420960A1 (de) * 2010-08-17 2012-02-22 Gemalto SA Verfahren zur Herstellung einer elektronischen Vorrichtung, die ein nicht demontierbares Modul umfasst, und so erhaltene Vorrichtung

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62214998A (ja) * 1986-03-17 1987-09-21 三菱電機株式会社 薄型半導体カ−ド
FR2721732B1 (fr) * 1994-06-22 1996-08-30 Solaic Sa Carte à mémoire sans contact dont le circuit électronique comporte un module.
FR2724750B1 (fr) * 1994-09-16 1996-12-06 Thomson Csf Carte electronique avec voyant de bon fonctionnement
DE4443767A1 (de) * 1994-12-08 1996-06-13 Giesecke & Devrient Gmbh Elektronisches Modul und Datenträger mit elektrischem Modul
FR2738077B1 (fr) * 1995-08-23 1997-09-19 Schlumberger Ind Sa Micro-boitier electronique pour carte a memoire electronique et procede de realisation
US5786988A (en) * 1996-07-02 1998-07-28 Sandisk Corporation Integrated circuit chips made bendable by forming indentations in their back surfaces flexible packages thereof and methods of manufacture

Also Published As

Publication number Publication date
KR100702108B1 (ko) 2007-04-02
EP0996930A1 (de) 2000-05-03
DK0996930T3 (da) 2007-03-12
WO1999060518A1 (fr) 1999-11-25
FR2778997A1 (fr) 1999-11-26
US6472733B1 (en) 2002-10-29
EP0996930B1 (de) 2006-11-02
DE69933837T2 (de) 2007-07-05
FR2778997B1 (fr) 2000-06-23
BR9906465A (pt) 2000-09-26
KR20010021985A (ko) 2001-03-15
JP2002516441A (ja) 2002-06-04

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Legal Events

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