BR9902428A - Processador de faixa base e método para processar um sinal de entrada em uma estação base de um sistema de comunicação cdma - Google Patents

Processador de faixa base e método para processar um sinal de entrada em uma estação base de um sistema de comunicação cdma

Info

Publication number
BR9902428A
BR9902428A BR9902428A BR9902428A BR9902428A BR 9902428 A BR9902428 A BR 9902428A BR 9902428 A BR9902428 A BR 9902428A BR 9902428 A BR9902428 A BR 9902428A BR 9902428 A BR9902428 A BR 9902428A
Authority
BR
Brazil
Prior art keywords
input signal
processing
processing blocks
abstracted
base station
Prior art date
Application number
BR9902428A
Other languages
English (en)
Inventor
Kanada Nakayasu
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Publication of BR9902428A publication Critical patent/BR9902428A/pt

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/50—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7097—Interference-related aspects
    • H04B1/711—Interference-related aspects the interference being multi-path interference
    • H04B1/7115—Constructive combining of multi-path signals, i.e. RAKE receivers

Abstract

"PROCESSADOR DE FAIXA BASE E MéTODO PARA PROCESSAR UM SINAL DE ENTRADA EM UMA ESTAçãO BASE DE UM SISTEMA DE COMUNICAçãO CDMA". O processador de sinal de faixa base compreendia uma pluralidade de blocos de processamento que abstraem seq³ências de dados específicas de um sinal de entrada para produzir seq³ências de dados abstraídas. Uma seção de RAKE é conectada aos blocos de processamento, a qual sintetiza as seq³ências de dados abstraídas para produzir a seq³ência de dados sintetizada. Um controlador está relacionado aos blocos de processamento e conectado à seção de RAKE para selecionar pelo menos um dos blocos de processamento em resposta a uma primeira taxa de transmissão. Blocos de processamento selecionados, selecionados pelo controlador, abstraem as primeira seq³ências de dados derivadas do sinal de entrada como as seq³ências de dados específicas e produzem as primeiras seq³ências de dados abstraídas como as seq³ências de dados abstraídas. A seção de RAKE sintetiza as primeiras seq³ências de dados abstraídas sob o controle do controlador.
BR9902428A 1998-06-09 1999-06-09 Processador de faixa base e método para processar um sinal de entrada em uma estação base de um sistema de comunicação cdma BR9902428A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16105798A JP3097664B2 (ja) 1998-06-09 1998-06-09 Ｃｄｍａ通信のベ−スバンド処理回路

Publications (1)

Publication Number Publication Date
BR9902428A true BR9902428A (pt) 2000-08-08

Family

ID=15727802

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9902428A BR9902428A (pt) 1998-06-09 1999-06-09 Processador de faixa base e método para processar um sinal de entrada em uma estação base de um sistema de comunicação cdma

Country Status (7)

Country Link
US (1) US6515979B1 (pt)
EP (1) EP0964528B1 (pt)
JP (1) JP3097664B2 (pt)
KR (1) KR100323354B1 (pt)
CN (1) CN1103519C (pt)
BR (1) BR9902428A (pt)
DE (1) DE69939353D1 (pt)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3895098B2 (ja) * 2000-07-21 2007-03-22 東日本電信電話株式会社 視聴制御方法および視聴制御システム
JP3730842B2 (ja) 2000-08-02 2006-01-05 日本電気株式会社 Ｃｄｍａ受信装置及びその方法
KR100464485B1 (ko) * 2000-11-09 2004-12-31 엘지전자 주식회사 고속무선 패킷 데이터의 전송 장치 및 그 방법
US7236500B1 (en) * 2000-12-19 2007-06-26 Intel Corporation Demodulation of multi-user, multi-protocol data in a reconfigurable datapath
JP2002359576A (ja) * 2001-05-31 2002-12-13 Fujitsu Ltd Ｃｄｍａ受信装置
US7010016B2 (en) 2001-12-19 2006-03-07 Intel Corporation Method and WCDMA receiver for high-rate and low-rate physical channel reception
CN100389549C (zh) * 2002-06-11 2008-05-21 上海贝尔有限公司 一种宽带码分多址系统下行基带处理装置
KR102637730B1 (ko) 2018-12-24 2024-02-19 삼성전자주식회사 다중 수신 다중 sim을 위한 장치 및 방법
WO2024049405A1 (en) * 2022-08-29 2024-03-07 Zeku, Inc. Apparatus and method for two-dimensional scheduling of downlink layer 1 operations

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JPS6245237A (ja) 1985-08-23 1987-02-27 Nec Home Electronics Ltd スペクトラム拡散電力線伝送方式
JPS63283246A (ja) 1987-05-15 1988-11-21 Hitachi Ltd スペクトラム拡散無線通信の狭帯域化方式
JP3128997B2 (ja) 1992-10-09 2001-01-29 ソニー株式会社 受信装置及びマルチパス信号の選択方法
JP3280141B2 (ja) 1993-04-30 2002-04-30 キヤノン株式会社 スペクトラム拡散受信装置
FI932605A (fi) 1993-06-07 1994-12-08 Nokia Telecommunications Oy Tukiasemavastaanotinlaitteisto
US5490165A (en) 1993-10-28 1996-02-06 Qualcomm Incorporated Demodulation element assignment in a system capable of receiving multiple signals
JP3354685B2 (ja) * 1994-02-07 2002-12-09 富士通株式会社 符号分割多重通信装置
JPH07231278A (ja) 1994-02-18 1995-08-29 Fujitsu Ltd 直接拡散スペクトル拡散通信方式によるレイク受信機
GB2291567B (en) 1994-07-01 1999-02-24 Roke Manor Research Apparatus for use in equipment providing a digital radio link between a fixed and a mobile radio unit
US5579341A (en) * 1994-12-29 1996-11-26 Motorola, Inc. Multi-channel digital transceiver and method
US5872776A (en) * 1995-11-22 1999-02-16 Yang; Lin-Lang Signal detection and interference cancellation based on simplified matrix inversion for CDMA applications
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JP3380435B2 (ja) 1996-08-23 2003-02-24 株式会社エヌ・ティ・ティ・ドコモ Ｒａｋｅ受信装置
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JP3058269B2 (ja) * 1998-04-08 2000-07-04 日本電気株式会社 携帯電話装置

Also Published As

Publication number Publication date
EP0964528A2 (en) 1999-12-15
KR20000006025A (ko) 2000-01-25
JP3097664B2 (ja) 2000-10-10
CN1103519C (zh) 2003-03-19
EP0964528B1 (en) 2008-08-20
JPH11355244A (ja) 1999-12-24
EP0964528A3 (en) 2003-10-15
DE69939353D1 (de) 2008-10-02
KR100323354B1 (ko) 2002-02-19
US6515979B1 (en) 2003-02-04
CN1238614A (zh) 1999-12-15

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Legal Events

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B08F Application fees: application dismissed [chapter 8.6 patent gazette]

Free format text: REFERENTE A 10A E 11A ANUIDADE

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2082 DE 30/11/2010.

B15K Others concerning applications: alteration of classification

Ipc: H04B 1/7115 (2011.01)