ATE411561T1 - Verfahren zum ermöglichen von übertragung zwischen prozessen und verarbeitungssystem unter verwendung desselben - Google Patents

Verfahren zum ermöglichen von übertragung zwischen prozessen und verarbeitungssystem unter verwendung desselben

Info

Publication number
ATE411561T1
ATE411561T1 AT01114829T AT01114829T ATE411561T1 AT E411561 T1 ATE411561 T1 AT E411561T1 AT 01114829 T AT01114829 T AT 01114829T AT 01114829 T AT01114829 T AT 01114829T AT E411561 T1 ATE411561 T1 AT E411561T1
Authority
AT
Austria
Prior art keywords
processes
processing system
communication
same
physical channel
Prior art date
Application number
AT01114829T
Other languages
English (en)
Inventor
Pasi Kolinummi
Juhani Vehvilaenen
Original Assignee
Nokia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Corp filed Critical Nokia Corp
Application granted granted Critical
Publication of ATE411561T1 publication Critical patent/ATE411561T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/546—Message passing systems or structures, e.g. queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Communication Control (AREA)
AT01114829T 2001-06-28 2001-06-28 Verfahren zum ermöglichen von übertragung zwischen prozessen und verarbeitungssystem unter verwendung desselben ATE411561T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP01114829A EP1271331B1 (de) 2001-06-28 2001-06-28 Verfahren zum Ermöglichen von Übertragung zwischen Prozessen und Verarbeitungssystem unter Verwendung desselben

Publications (1)

Publication Number Publication Date
ATE411561T1 true ATE411561T1 (de) 2008-10-15

Family

ID=8177759

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01114829T ATE411561T1 (de) 2001-06-28 2001-06-28 Verfahren zum ermöglichen von übertragung zwischen prozessen und verarbeitungssystem unter verwendung desselben

Country Status (6)

Country Link
US (2) US20030023776A1 (de)
EP (1) EP1271331B1 (de)
AT (1) ATE411561T1 (de)
AU (1) AU2002309184A1 (de)
DE (1) DE60136168D1 (de)
WO (1) WO2003003221A2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7613921B2 (en) 2005-05-13 2009-11-03 Intel Corporation Method and apparatus for remotely provisioning software-based security coprocessors
US7636442B2 (en) * 2005-05-13 2009-12-22 Intel Corporation Method and apparatus for migrating software-based security coprocessors
US7587595B2 (en) * 2005-05-13 2009-09-08 Intel Corporation Method and apparatus for providing software-based security coprocessors
US20080077916A1 (en) * 2006-09-27 2008-03-27 Supalov Alexander V Virtual heterogeneous channel for message passing
US7949815B2 (en) 2006-09-27 2011-05-24 Intel Corporation Virtual heterogeneous channel for message passing
US8064605B2 (en) * 2007-09-27 2011-11-22 Intel Corporation Methods and apparatus for providing upgradeable key bindings for trusted platform modules
US8249257B2 (en) 2007-09-28 2012-08-21 Intel Corporation Virtual TPM keys rooted in a hardware TPM
CN112929870B (zh) * 2019-12-06 2022-07-22 华为技术有限公司 事件订阅方法及电子设备

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US4412285A (en) * 1981-04-01 1983-10-25 Teradata Corporation Multiprocessor intercommunication system and method
US4901231A (en) * 1986-12-22 1990-02-13 American Telephone And Telegraph Company Extended process for a multiprocessor system
US5062040A (en) * 1986-12-22 1991-10-29 At&T Bell Laboratories Handling of notification of asynchronous events by user and stub processes of a distributed process executing on a plurality of processors of a multi-processor system
US5062140A (en) 1988-04-27 1991-10-29 Sony Corporation Induction speaker
GB8915136D0 (en) * 1989-06-30 1989-08-23 Inmos Ltd Method for controlling communication between computers
US5379297A (en) * 1992-04-09 1995-01-03 Network Equipment Technologies, Inc. Concurrent multi-channel segmentation and reassembly processors for asynchronous transfer mode
US5463629A (en) * 1992-07-13 1995-10-31 Ko; Cheng-Hsu Dynamic channel allocation method and system for integrated services digital network
US5574934A (en) * 1993-11-24 1996-11-12 Intel Corporation Preemptive priority-based transmission of signals using virtual channels
US5583990A (en) * 1993-12-10 1996-12-10 Cray Research, Inc. System for allocating messages between virtual channels to avoid deadlock and to optimize the amount of message traffic on each type of virtual channel
US5603059A (en) * 1994-04-22 1997-02-11 Pitney Bowes Inc. Software architecture system having a virtual I/O channel including multi-layered communication interface in between virtual stations and physical modules
JPH08185380A (ja) * 1994-12-28 1996-07-16 Hitachi Ltd 並列計算機
US5659796A (en) * 1995-04-13 1997-08-19 Cray Research, Inc. System for randomly modifying virtual channel allocation and accepting the random modification based on the cost function
US5828746A (en) * 1995-06-07 1998-10-27 Lucent Technologies Inc. Telecommunications network
FR2749092B1 (fr) * 1996-05-21 1998-08-21 Cs Technologies Informatiques Procede d'interconnexion des noeuds d'un calculateur parallele temps reel
US6393569B1 (en) * 1996-12-18 2002-05-21 Alexander S. Orenshteyn Secured system for accessing application services from a remote station
US6178453B1 (en) * 1997-02-18 2001-01-23 Netspeak Corporation Virtual circuit switching architecture
US6222845B1 (en) * 1997-02-25 2001-04-24 Cascade Communications Corp. System and method for providing unitary virtual circuit in digital network having communication links of diverse service types
DE19715799C2 (de) * 1997-04-16 1999-04-08 Philips Patentverwaltung Lokales Netzwerk mit Umsetzmitteln
US6005851A (en) * 1997-10-10 1999-12-21 Nortel Networks Corporation Adaptive channel control for data service delivery
US6014690A (en) * 1997-10-24 2000-01-11 Digital Equipment Corporation Employing multiple channels for deadlock avoidance in a cache coherency protocol
US6101181A (en) * 1997-11-17 2000-08-08 Cray Research Inc. Virtual channel assignment in large torus systems
US6212361B1 (en) * 1998-04-02 2001-04-03 Lucent Technologies, Inc. Ordering message signals for transmission over a telecommunications channel
US6393506B1 (en) * 1999-06-15 2002-05-21 National Semiconductor Corporation Virtual channel bus and system architecture
US6674720B1 (en) * 1999-09-29 2004-01-06 Silicon Graphics, Inc. Age-based network arbitration system and method
US6856950B1 (en) * 1999-10-15 2005-02-15 Silicon Graphics, Inc. Abstract verification environment
JP3506175B2 (ja) * 2000-10-05 2004-03-15 日本電気株式会社 メモリ制御回路とメモリ制御方法
US6622215B2 (en) * 2000-12-29 2003-09-16 Intel Corporation Mechanism for handling conflicts in a multi-node computer architecture
US6792505B2 (en) * 2001-04-16 2004-09-14 International Business Machines Corporation System apparatus and method for storage device controller-based message passing having effective data channel bandwidth and controller cache memory increase
US7114043B2 (en) * 2002-05-15 2006-09-26 Broadcom Corporation Ambiguous virtual channels

Also Published As

Publication number Publication date
US20150135196A1 (en) 2015-05-14
WO2003003221A3 (en) 2003-03-13
US9817705B2 (en) 2017-11-14
EP1271331A1 (de) 2003-01-02
DE60136168D1 (de) 2008-11-27
US20030023776A1 (en) 2003-01-30
WO2003003221A2 (en) 2003-01-09
EP1271331B1 (de) 2008-10-15
AU2002309184A1 (en) 2003-03-03

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties