BR112016024452A2 - acionador de modo de tensão de serdes com correção de distorção - Google Patents

acionador de modo de tensão de serdes com correção de distorção

Info

Publication number
BR112016024452A2
BR112016024452A2 BR112016024452A BR112016024452A BR112016024452A2 BR 112016024452 A2 BR112016024452 A2 BR 112016024452A2 BR 112016024452 A BR112016024452 A BR 112016024452A BR 112016024452 A BR112016024452 A BR 112016024452A BR 112016024452 A2 BR112016024452 A2 BR 112016024452A2
Authority
BR
Brazil
Prior art keywords
voltage mode
driver
voltage
current mode
output
Prior art date
Application number
BR112016024452A
Other languages
English (en)
Other versions
BR112016024452B1 (pt
Inventor
Hafizi Madjid
Li Miao
Kong Xiaohua
Zhu Zhi
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112016024452A2 publication Critical patent/BR112016024452A2/pt
Publication of BR112016024452B1 publication Critical patent/BR112016024452B1/pt

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0272Arrangements for coupling to multiple lines, e.g. for differential transmission
    • H04L25/0276Arrangements for coupling common mode signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/12Shaping pulses by steepening leading or trailing edges
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • H03K19/018521Interface arrangements of complementary type, e.g. CMOS
    • H03K19/018528Interface arrangements of complementary type, e.g. CMOS with at least one differential stage
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0091Transmitter details

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Amplifiers (AREA)

Abstract

trata-se de um circuito acionador para transmitir dados seriais em um enlace de comunicação que combina acionadores de modo de tensão e corrente. o circuito acionador usa um acionador de modo de tensão como o acionador de saída principal. um ou mais acionadores de modo de corrente auxiliares são conectados em paralelo ao acionador de modo de tensão para ajustar o sinal de saída injetando-se correntes nas saídas. o acionador de modo de tensão fornece a maior parte do acionamento de saída. logo, o circuito acionador de saída pode proporcionar benefícios de eficiência de energia associados a acionadores de modo de tensão. os acionadores de modo de corrente podem proporcionar, por exemplo, pré-ênfase, ajuste de nível, compensação de distorção, e outas modificações do sinal de saídas. logo, o circuito acionador também pode proporcionar as capacidades de ajuste de sinal associadas aos acionadores de modo de corrente.
BR112016024452-4A 2014-04-21 2015-03-11 Circuito acionador para acionar valores de dados em uma saída diferencial incluindo um nó de saída positivo e um nó de saída negativo, método para acionar um sinal de dados seriais em um enlace de comunicação e memória legível por computador BR112016024452B1 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/257,848 US9264263B2 (en) 2014-04-21 2014-04-21 Serdes voltage-mode driver with skew correction
US14/257,848 2014-04-21
PCT/US2015/019915 WO2015163986A1 (en) 2014-04-21 2015-03-11 Serdes voltage-mode driver with skew correction

Publications (2)

Publication Number Publication Date
BR112016024452A2 true BR112016024452A2 (pt) 2017-08-15
BR112016024452B1 BR112016024452B1 (pt) 2022-09-20

Family

ID=52780577

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112016024452-4A BR112016024452B1 (pt) 2014-04-21 2015-03-11 Circuito acionador para acionar valores de dados em uma saída diferencial incluindo um nó de saída positivo e um nó de saída negativo, método para acionar um sinal de dados seriais em um enlace de comunicação e memória legível por computador

Country Status (7)

Country Link
US (1) US9264263B2 (pt)
EP (1) EP3134969B1 (pt)
JP (1) JP6250839B2 (pt)
KR (1) KR101759340B1 (pt)
CN (1) CN106233627B (pt)
BR (1) BR112016024452B1 (pt)
WO (1) WO2015163986A1 (pt)

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CN107846207B (zh) * 2016-09-21 2021-12-14 瑞昱半导体股份有限公司 差动信号偏斜检测电路
WO2019087602A1 (ja) * 2017-11-02 2019-05-09 ソニーセミコンダクタソリューションズ株式会社 電子回路および電子機器
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CN112394763A (zh) * 2019-08-15 2021-02-23 成都纳能微电子有限公司 通用串行总线2.0高速驱动器输出幅度自动校准系统
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Also Published As

Publication number Publication date
CN106233627A (zh) 2016-12-14
US20150304134A1 (en) 2015-10-22
EP3134969B1 (en) 2019-11-06
US9264263B2 (en) 2016-02-16
JP2017514393A (ja) 2017-06-01
KR101759340B1 (ko) 2017-07-18
CN106233627B (zh) 2019-02-22
KR20160127141A (ko) 2016-11-02
WO2015163986A1 (en) 2015-10-29
EP3134969A1 (en) 2017-03-01
BR112016024452B1 (pt) 2022-09-20
JP6250839B2 (ja) 2017-12-20

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Legal Events

Date Code Title Description
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B350 Update of information on the portal [chapter 15.35 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 11/03/2015, OBSERVADAS AS CONDICOES LEGAIS