AU611288B2 - Method and apparatus for selectively posting write cycles using the 82385 cache controller - Google Patents

Method and apparatus for selectively posting write cycles using the 82385 cache controller Download PDF

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Publication number
AU611288B2
AU611288B2 AU34098/89A AU3409889A AU611288B2 AU 611288 B2 AU611288 B2 AU 611288B2 AU 34098/89 A AU34098/89 A AU 34098/89A AU 3409889 A AU3409889 A AU 3409889A AU 611288 B2 AU611288 B2 AU 611288B2
Authority
AU
Australia
Prior art keywords
bus
microprocessor
data
address
coupled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU34098/89A
Other languages
English (en)
Other versions
AU3409889A (en
Inventor
Ralph Murray Begun
Patrick Maurice Bland
Mark Edward Dean
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of AU3409889A publication Critical patent/AU3409889A/en
Application granted granted Critical
Publication of AU611288B2 publication Critical patent/AU611288B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0888—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Microcomputers (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Preparation Of Compounds By Using Micro-Organisms (AREA)
  • Hardware Redundancy (AREA)
  • Peptides Or Proteins (AREA)
  • Medicines Containing Material From Animals Or Micro-Organisms (AREA)
  • Information Transfer Systems (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Bus Control (AREA)
  • Mobile Radio Communication Systems (AREA)
AU34098/89A 1988-05-26 1989-05-05 Method and apparatus for selectively posting write cycles using the 82385 cache controller Ceased AU611288B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US19889388A 1988-05-26 1988-05-26
US198893 1988-05-26

Publications (2)

Publication Number Publication Date
AU3409889A AU3409889A (en) 1989-11-30
AU611288B2 true AU611288B2 (en) 1991-06-06

Family

ID=22735311

Family Applications (1)

Application Number Title Priority Date Filing Date
AU34098/89A Ceased AU611288B2 (en) 1988-05-26 1989-05-05 Method and apparatus for selectively posting write cycles using the 82385 cache controller

Country Status (24)

Country Link
EP (1) EP0343768B1 (https=)
JP (1) JPH0218640A (https=)
KR (1) KR930001585B1 (https=)
CN (1) CN1019153B (https=)
AT (1) ATE125051T1 (https=)
AU (1) AU611288B2 (https=)
BE (1) BE1002652A4 (https=)
BR (1) BR8902381A (https=)
CA (1) CA1314330C (https=)
DE (2) DE68923402T2 (https=)
DK (1) DK189789A (https=)
ES (1) ES2075044T3 (https=)
FI (1) FI891785A7 (https=)
FR (1) FR2632095A1 (https=)
GB (1) GB2219107A (https=)
HK (1) HK23796A (https=)
IT (1) IT1230190B (https=)
MX (1) MX171667B (https=)
MY (1) MY108557A (https=)
NL (1) NL8901255A (https=)
NO (1) NO174984C (https=)
NZ (1) NZ228784A (https=)
PT (1) PT90632B (https=)
SE (1) SE8901305L (https=)

Also Published As

Publication number Publication date
CN1040875A (zh) 1990-03-28
KR930001585B1 (ko) 1993-03-05
CA1314330C (en) 1993-03-09
IT8920625A0 (it) 1989-05-24
DE3909909C2 (https=) 1990-05-31
PT90632B (pt) 1995-12-29
AU3409889A (en) 1989-11-30
DK189789A (da) 1989-11-27
IT1230190B (it) 1991-10-18
MY108557A (en) 1996-10-31
JPH0218640A (ja) 1990-01-22
NO891582L (no) 1989-11-27
DE68923402T2 (de) 1996-03-07
SE8901305D0 (sv) 1989-04-11
MX171667B (es) 1993-11-10
BE1002652A4 (fr) 1991-04-23
FI891785A7 (fi) 1989-11-27
DK189789D0 (da) 1989-04-19
EP0343768B1 (en) 1995-07-12
NZ228784A (en) 1991-04-26
EP0343768A2 (en) 1989-11-29
EP0343768A3 (en) 1991-03-20
DE68923402D1 (de) 1995-08-17
GB8904918D0 (en) 1989-04-12
HK23796A (en) 1996-02-16
ES2075044T3 (es) 1995-10-01
DE3909909A1 (de) 1989-11-30
NO174984B (no) 1994-05-02
GB2219107A (en) 1989-11-29
FI891785A0 (fi) 1989-04-14
CN1019153B (zh) 1992-11-18
KR890017614A (ko) 1989-12-16
NL8901255A (nl) 1989-12-18
NO891582D0 (no) 1989-04-18
NO174984C (no) 1994-08-10
ATE125051T1 (de) 1995-07-15
FR2632095A1 (fr) 1989-12-01
SE8901305L (sv) 1989-11-27
BR8902381A (pt) 1990-01-16
PT90632A (pt) 1989-11-30

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