BE1002652A4 - Methode et dispositif pour poster selectivement des cycles d'ecriture en utilisant une unite de commande d'antememoire 82385. - Google Patents

Methode et dispositif pour poster selectivement des cycles d'ecriture en utilisant une unite de commande d'antememoire 82385. Download PDF

Info

Publication number
BE1002652A4
BE1002652A4 BE8900438A BE8900438A BE1002652A4 BE 1002652 A4 BE1002652 A4 BE 1002652A4 BE 8900438 A BE8900438 A BE 8900438A BE 8900438 A BE8900438 A BE 8900438A BE 1002652 A4 BE1002652 A4 BE 1002652A4
Authority
BE
Belgium
Prior art keywords
cache
devices
possibility
antememory
control unit
Prior art date
Application number
BE8900438A
Other languages
English (en)
French (fr)
Inventor
Ralph Murray Begun
Patrick Maurice Bland
Mark Edward Dean
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of BE1002652A4 publication Critical patent/BE1002652A4/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0888—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Microcomputers (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Preparation Of Compounds By Using Micro-Organisms (AREA)
  • Hardware Redundancy (AREA)
  • Peptides Or Proteins (AREA)
  • Medicines Containing Material From Animals Or Micro-Organisms (AREA)
  • Information Transfer Systems (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Bus Control (AREA)
  • Mobile Radio Communication Systems (AREA)
BE8900438A 1988-05-26 1989-04-20 Methode et dispositif pour poster selectivement des cycles d'ecriture en utilisant une unite de commande d'antememoire 82385. BE1002652A4 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US19889388A 1988-05-26 1988-05-26

Publications (1)

Publication Number Publication Date
BE1002652A4 true BE1002652A4 (fr) 1991-04-23

Family

ID=22735311

Family Applications (1)

Application Number Title Priority Date Filing Date
BE8900438A BE1002652A4 (fr) 1988-05-26 1989-04-20 Methode et dispositif pour poster selectivement des cycles d'ecriture en utilisant une unite de commande d'antememoire 82385.

Country Status (24)

Country Link
EP (1) EP0343768B1 (https=)
JP (1) JPH0218640A (https=)
KR (1) KR930001585B1 (https=)
CN (1) CN1019153B (https=)
AT (1) ATE125051T1 (https=)
AU (1) AU611288B2 (https=)
BE (1) BE1002652A4 (https=)
BR (1) BR8902381A (https=)
CA (1) CA1314330C (https=)
DE (2) DE68923402T2 (https=)
DK (1) DK189789A (https=)
ES (1) ES2075044T3 (https=)
FI (1) FI891785A7 (https=)
FR (1) FR2632095A1 (https=)
GB (1) GB2219107A (https=)
HK (1) HK23796A (https=)
IT (1) IT1230190B (https=)
MX (1) MX171667B (https=)
MY (1) MY108557A (https=)
NL (1) NL8901255A (https=)
NO (1) NO174984C (https=)
NZ (1) NZ228784A (https=)
PT (1) PT90632B (https=)
SE (1) SE8901305L (https=)

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ELECTRONICS & WIRELESS WORLD, vol. 93, no. 1621, novembre 1987, pages 1121-1123, Sutton, Surrey, GB; D. JONES et al.: "The 68030" *
ELECTRONICS, vol. 60, no. 12, 11 juin 1987, pages 74-76, New York, NY, US; B.C. COLE: "How a cache control chip supercharges 386 processor" *

Also Published As

Publication number Publication date
CN1040875A (zh) 1990-03-28
KR930001585B1 (ko) 1993-03-05
CA1314330C (en) 1993-03-09
IT8920625A0 (it) 1989-05-24
DE3909909C2 (https=) 1990-05-31
PT90632B (pt) 1995-12-29
AU3409889A (en) 1989-11-30
DK189789A (da) 1989-11-27
IT1230190B (it) 1991-10-18
MY108557A (en) 1996-10-31
JPH0218640A (ja) 1990-01-22
NO891582L (no) 1989-11-27
DE68923402T2 (de) 1996-03-07
SE8901305D0 (sv) 1989-04-11
MX171667B (es) 1993-11-10
FI891785A7 (fi) 1989-11-27
DK189789D0 (da) 1989-04-19
EP0343768B1 (en) 1995-07-12
AU611288B2 (en) 1991-06-06
NZ228784A (en) 1991-04-26
EP0343768A2 (en) 1989-11-29
EP0343768A3 (en) 1991-03-20
DE68923402D1 (de) 1995-08-17
GB8904918D0 (en) 1989-04-12
HK23796A (en) 1996-02-16
ES2075044T3 (es) 1995-10-01
DE3909909A1 (de) 1989-11-30
NO174984B (no) 1994-05-02
GB2219107A (en) 1989-11-29
FI891785A0 (fi) 1989-04-14
CN1019153B (zh) 1992-11-18
KR890017614A (ko) 1989-12-16
NL8901255A (nl) 1989-12-18
NO891582D0 (no) 1989-04-18
NO174984C (no) 1994-08-10
ATE125051T1 (de) 1995-07-15
FR2632095A1 (fr) 1989-12-01
SE8901305L (sv) 1989-11-27
BR8902381A (pt) 1990-01-16
PT90632A (pt) 1989-11-30

Similar Documents

Publication Publication Date Title
IT8919787A0 (it) Sistema multiprocessore con replicazione di dati globali e due livelli di unita' di traduzione indirizzi.
KR860006743A (ko) 데이타 처리 시스템
ES2153333T1 (es) Medidor biosensor con metodo de estimacion de la temperatura ambiente y sistema.
KR880004380A (ko) 버스트 전송 모드를 갖는 버스 마스터
FR2373830A1 (fr) Systeme d'adressage associatif par page et dispositif de memoire hierarchique a deux niveaux en portant application
BE1002768A4 (fr) Commande du fonctionnement en pipe-line d'un systeme de micro-calculateur utilisant le dimensionnement dynamique des bus avec un processeur 80386 et une unite de commande d'antememoire 82385.
FR2389967A1 (https=)
ES2108242T3 (es) Sistema de vigilancia de distribucion de fluido hacia un puesto de utilizacion.
ES2178465T3 (es) Estructura de soporte hueca, alargada, que comprende una pestaña transversal en cada uno de sus extremos.
KR920003181A (ko) Dma 기능을 갖춘 정보처리 장치
BE1002652A4 (fr) Methode et dispositif pour poster selectivement des cycles d'ecriture en utilisant une unite de commande d'antememoire 82385.
KR910014816A (ko) 대규모의 직접 맵핑된 데이타 캐시를 통해 효율적으로 지원하는 i/o 장치의 액세스를 위한 시스템 및 방법
FR2429987A1 (fr) Systeme de transfert de chaleur a tubes en matiere plastique, a section en majeure partie non circulaire
DE69430973D1 (de) Informationsverarbeitungssystem mit einem Cachespeicher und Vorrichtung zur Datenvorausholung
KR880003241A (ko) 데이타 처리 시스템
DE59606592D1 (de) Haltevorrichtung für einen Radiator
KR900013510A (ko) 캐시 메모리
ES2038928B1 (es) Sistema de tratamiento de acceso en procesador de informacion.
Shaheen Letters Undated, Unidentified or Both
Duymun An inquiry into the English proficiency of foreign postgraduate students at the University of Cape Town and their academic literacy needs in English
Liao et al. Asymptotic Stability for Neural Networks with Two Time Delays
Ferris If One Uses It Lawfully: The Law of Moses and the Christian Life
Porteous Foes Attack X-Way Route Once Again~
Popova Problems of gifted females' self-realization
JPS57209525A (en) Access controlling system for channel buffer

Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: INTERNATIONAL BUSINESS MACHINES CORP.

Effective date: 19960430