AU4561200A - Method for handling thinned chips for introducing them into chip cards - Google Patents
Method for handling thinned chips for introducing them into chip cardsInfo
- Publication number
- AU4561200A AU4561200A AU45612/00A AU4561200A AU4561200A AU 4561200 A AU4561200 A AU 4561200A AU 45612/00 A AU45612/00 A AU 45612/00A AU 4561200 A AU4561200 A AU 4561200A AU 4561200 A AU4561200 A AU 4561200A
- Authority
- AU
- Australia
- Prior art keywords
- introducing
- chip cards
- thinned chips
- handling thinned
- handling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
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- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
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- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
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- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
- H01L2223/5448—Located on chip prior to dicing and remaining on chip after dicing
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
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- H01L2924/01004—Beryllium [Be]
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- H01L2924/01013—Aluminum [Al]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01029—Copper [Cu]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01047—Silver [Ag]
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- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
- H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Credit Cards Or The Like (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19921230 | 1999-05-07 | ||
DE19921230A DE19921230B4 (de) | 1999-05-07 | 1999-05-07 | Verfahren zum Handhaben von gedünnten Chips zum Einbringen in Chipkarten |
PCT/EP2000/003988 WO2000068990A1 (de) | 1999-05-07 | 2000-05-04 | Verfahren zum handhaben von gedünnten chips zum einbringen in chipkarten |
Publications (1)
Publication Number | Publication Date |
---|---|
AU4561200A true AU4561200A (en) | 2000-11-21 |
Family
ID=7907399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU45612/00A Abandoned AU4561200A (en) | 1999-05-07 | 2000-05-04 | Method for handling thinned chips for introducing them into chip cards |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP1183726A1 (de) |
JP (1) | JP2002544669A (de) |
CN (1) | CN1157779C (de) |
AU (1) | AU4561200A (de) |
DE (1) | DE19921230B4 (de) |
WO (1) | WO2000068990A1 (de) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW522531B (en) | 2000-10-20 | 2003-03-01 | Matsushita Electric Ind Co Ltd | Semiconductor device, method of manufacturing the device and mehtod of mounting the device |
FR2823012B1 (fr) * | 2001-04-03 | 2004-05-21 | Commissariat Energie Atomique | Procede de transfert selectif d'au moins un element d'un support initial sur un support final |
DE10117880B4 (de) * | 2001-04-10 | 2009-01-29 | Mühlbauer Ag | Verfahren zum Vereinzeln von elektronischen Bauteilen aus einem Verbund |
US6964086B2 (en) * | 2002-03-04 | 2005-11-15 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing thin film piezoelectric element, and element housing jig |
US6943056B2 (en) * | 2002-04-16 | 2005-09-13 | Renesas Technology Corp. | Semiconductor device manufacturing method and electronic equipment using same |
JP2004273895A (ja) * | 2003-03-11 | 2004-09-30 | Disco Abrasive Syst Ltd | 半導体ウエーハの分割方法 |
DE10339559B4 (de) * | 2003-08-26 | 2006-03-02 | W.C. Heraeus Gmbh | Verfahren zur Lagebestimmung von Bauelementträgern |
DE10341186A1 (de) * | 2003-09-06 | 2005-03-31 | Martin Michalk | Verfahren und Vorrichtung zum Kontaktieren von Halbleiterchips |
GB2412786A (en) * | 2004-03-24 | 2005-10-05 | E2V Tech Uk Ltd | Method and apparatus for manufacturing chip scale components or microcomponents |
KR20110122869A (ko) | 2004-07-09 | 2011-11-11 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Ic칩 및 그 제조방법 |
KR101158601B1 (ko) | 2004-07-30 | 2012-06-22 | 오스람 옵토 세미컨덕터스 게엠베하 | 박막기술을 사용하여 반도체 칩을 제조하는 방법 및박막기술을 사용하여 제조된 반도체 칩 |
US8728937B2 (en) | 2004-07-30 | 2014-05-20 | Osram Opto Semiconductors Gmbh | Method for producing semiconductor chips using thin film technology |
DE102004036962A1 (de) * | 2004-07-30 | 2006-03-23 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung von Halbleiterchips in Dünnfilmtechnik und Halbleiterchip in Dünnfilmtechnik |
FR2878076B1 (fr) * | 2004-11-17 | 2007-02-23 | St Microelectronics Sa | Amincissement d'une plaquette semiconductrice |
DE102004059599B3 (de) * | 2004-12-09 | 2006-08-17 | Infineon Technologies Ag | Verfahren zum Aufbringen einer Klebstoffschicht auf dünngeschliffene Halbleiterchips eines Halbleiterwafers |
DE102006032821B4 (de) * | 2006-07-14 | 2008-04-10 | Mühlbauer Ag | Verfahren und Vorrichtung zur Herstellung einer Vielzahl von Chipkarten mit einer klebstofffreien Fixierung der Chipmodule |
WO2008061554A1 (de) * | 2006-11-24 | 2008-05-29 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Elektronische, insbesondere mikroelektronische funktionsgruppe und verfahren zu deren herstellung |
JP4958287B2 (ja) * | 2007-05-30 | 2012-06-20 | 東京応化工業株式会社 | 剥がし装置における剥離方法 |
DE102010025774A1 (de) * | 2010-07-01 | 2012-01-05 | Giesecke & Devrient Gmbh | Verfahren zur Herstellung eines Inlays für einen tragbaren Datenträger und Inlay |
JP6417164B2 (ja) * | 2014-09-18 | 2018-10-31 | 芝浦メカトロニクス株式会社 | 積層体製造装置、積層体、分離装置及び積層体製造方法 |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3122981A1 (de) * | 1981-06-10 | 1983-01-05 | GAO Gesellschaft für Automation und Organisation mbH, 8000 München | Verfahren zum einbau von ic-bausteinen in ausweiskarten |
JPS61112345A (ja) * | 1984-11-07 | 1986-05-30 | Toshiba Corp | 半導体装置の製造方法 |
JPS61280660A (ja) * | 1985-06-06 | 1986-12-11 | Toshiba Corp | 半導体装置の製造方法 |
GB2221469B (en) * | 1985-12-27 | 1990-09-05 | Fsk Kk | Adhesive sheet suitable for use in dicing semiconductor wafers into chips |
DE3639630A1 (de) * | 1986-11-20 | 1988-06-01 | Gao Ges Automation Org | Datentraeger mit integriertem schaltkreis und verfahren zur herstellung desselben |
DE3901402A1 (de) * | 1989-01-19 | 1990-07-26 | Telefonbau & Normalzeit Gmbh | Verfahren zur herstellung einer chipkarte |
JP2829064B2 (ja) * | 1989-11-27 | 1998-11-25 | 株式会社ジャパンエナジー | 半導体装置の製造方法 |
JPH03286553A (ja) * | 1990-04-03 | 1991-12-17 | Furukawa Electric Co Ltd:The | ダイシング方法 |
JP2874279B2 (ja) * | 1990-05-10 | 1999-03-24 | 三菱電機株式会社 | 薄型半導体装置の製造方法 |
JP2610703B2 (ja) * | 1990-09-05 | 1997-05-14 | 住友電気工業株式会社 | 半導体素子の製造方法 |
US5268065A (en) * | 1992-12-21 | 1993-12-07 | Motorola, Inc. | Method for thinning a semiconductor wafer |
FR2701139B1 (fr) * | 1993-02-01 | 1995-04-21 | Solaic Sa | Procédé pour l'implantation d'un micro-circuit sur un corps de carte intelligente et/ou à mémoire, et carte comportant un micro-circuit ainsi implanté. |
ZA941671B (en) * | 1993-03-11 | 1994-10-12 | Csir | Attaching an electronic circuit to a substrate. |
FR2715501B1 (fr) * | 1994-01-26 | 1996-04-05 | Commissariat Energie Atomique | Procédé de dépôt de lames semiconductrices sur un support. |
US5480842A (en) * | 1994-04-11 | 1996-01-02 | At&T Corp. | Method for fabricating thin, strong, and flexible die for smart cards |
DE19502398A1 (de) * | 1995-01-26 | 1996-08-01 | Giesecke & Devrient Gmbh | Verfahren zur Montage eines elektronischen Moduls in einem Kartenkörper |
DE19504194C1 (de) * | 1995-02-09 | 1996-04-04 | Interlock Ag | Verfahren zur Herstellung von Ausweiskarten und danach hergestellte Ausweiskarte |
US6342434B1 (en) * | 1995-12-04 | 2002-01-29 | Hitachi, Ltd. | Methods of processing semiconductor wafer, and producing IC card, and carrier |
DE19602821C1 (de) * | 1996-01-26 | 1997-06-26 | Siemens Ag | Verfahren zur Herstellung einer Datenkarte |
EP0824301A3 (de) * | 1996-08-09 | 1999-08-11 | Hitachi, Ltd. | Gedruckte Schaltungsplatte, Chipkarte, und Verfahren zu deren Herstellung |
EP0858050A3 (de) * | 1997-02-07 | 2001-03-28 | Keylink Gestao e Investimentos Lda | Verfahren zum kontinuierlichen Herstellen von Microchipträgerkarten und sowie mit diesem Verfahren hergestellte Karten |
DE19708615C1 (de) * | 1997-03-03 | 1998-07-23 | Siemens Ag | Chipkartenmodul und diesen umfassende Chipkarte |
DE19732644C1 (de) * | 1997-07-29 | 1998-11-12 | Siemens Ag | Verfahren zur Herstellung einer Chipkarte für kontaktlose Daten- und/oder Energieübertragung sowie Chipkarte |
JPH1191275A (ja) * | 1997-09-25 | 1999-04-06 | Dainippon Printing Co Ltd | 非接触型icカードの製造方法および非接触型icカード |
WO1999048137A2 (de) * | 1998-03-14 | 1999-09-23 | Michael Stromberg | Verfahren und vorrichtung zum behandeln von wafern mit bauelementen beim abdünnen des wafers und beim vereinzeln der bauelemente |
JP2000040677A (ja) * | 1998-07-23 | 2000-02-08 | Nippon Telegr & Teleph Corp <Ntt> | 半導体素子の製造方法 |
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1999
- 1999-05-07 DE DE19921230A patent/DE19921230B4/de not_active Expired - Fee Related
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2000
- 2000-05-04 EP EP00927133A patent/EP1183726A1/de not_active Withdrawn
- 2000-05-04 JP JP2000617491A patent/JP2002544669A/ja active Pending
- 2000-05-04 CN CNB008072833A patent/CN1157779C/zh not_active Expired - Fee Related
- 2000-05-04 AU AU45612/00A patent/AU4561200A/en not_active Abandoned
- 2000-05-04 WO PCT/EP2000/003988 patent/WO2000068990A1/de active Application Filing
Also Published As
Publication number | Publication date |
---|---|
DE19921230A1 (de) | 2000-11-09 |
EP1183726A1 (de) | 2002-03-06 |
WO2000068990A1 (de) | 2000-11-16 |
CN1157779C (zh) | 2004-07-14 |
CN1350701A (zh) | 2002-05-22 |
JP2002544669A (ja) | 2002-12-24 |
DE19921230B4 (de) | 2009-04-02 |
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MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |