AU2003238916A1 - A silicon-on-insulator device with strained device film and method for making the same with partial replacement of isolation oxide - Google Patents
A silicon-on-insulator device with strained device film and method for making the same with partial replacement of isolation oxideInfo
- Publication number
- AU2003238916A1 AU2003238916A1 AU2003238916A AU2003238916A AU2003238916A1 AU 2003238916 A1 AU2003238916 A1 AU 2003238916A1 AU 2003238916 A AU2003238916 A AU 2003238916A AU 2003238916 A AU2003238916 A AU 2003238916A AU 2003238916 A1 AU2003238916 A1 AU 2003238916A1
- Authority
- AU
- Australia
- Prior art keywords
- silicon
- making
- same
- isolation oxide
- partial replacement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76281—Lateral isolation by selective oxidation of silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
- H10D30/6743—Silicon
- H10D30/6744—Monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/178,542 | 2002-06-25 | ||
| US10/178,542 US6680240B1 (en) | 2002-06-25 | 2002-06-25 | Silicon-on-insulator device with strained device film and method for making the same with partial replacement of isolation oxide |
| PCT/US2003/017824 WO2004001798A2 (en) | 2002-06-25 | 2003-06-04 | A silicon-on-insulator device with strained device film and method for making the same with partial replacement of isolation oxide |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| AU2003238916A8 AU2003238916A8 (en) | 2004-01-06 |
| AU2003238916A1 true AU2003238916A1 (en) | 2004-01-06 |
Family
ID=29999123
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2003238916A Abandoned AU2003238916A1 (en) | 2002-06-25 | 2003-06-04 | A silicon-on-insulator device with strained device film and method for making the same with partial replacement of isolation oxide |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6680240B1 (enExample) |
| EP (1) | EP1516362A2 (enExample) |
| JP (1) | JP4452883B2 (enExample) |
| KR (1) | KR100996725B1 (enExample) |
| CN (1) | CN1333454C (enExample) |
| AU (1) | AU2003238916A1 (enExample) |
| TW (1) | TWI289895B (enExample) |
| WO (1) | WO2004001798A2 (enExample) |
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| US7227176B2 (en) | 1998-04-10 | 2007-06-05 | Massachusetts Institute Of Technology | Etch stop layer system |
| US6573126B2 (en) * | 2000-08-16 | 2003-06-03 | Massachusetts Institute Of Technology | Process for producing semiconductor article using graded epitaxial growth |
| US6940089B2 (en) * | 2001-04-04 | 2005-09-06 | Massachusetts Institute Of Technology | Semiconductor device structure |
| WO2003079415A2 (en) * | 2002-03-14 | 2003-09-25 | Amberwave Systems Corporation | Methods for fabricating strained layers on semiconductor substrates |
| US20030227057A1 (en) * | 2002-06-07 | 2003-12-11 | Lochtefeld Anthony J. | Strained-semiconductor-on-insulator device structures |
| US6995430B2 (en) * | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
| US7307273B2 (en) * | 2002-06-07 | 2007-12-11 | Amberwave Systems Corporation | Control of strain in device layers by selective relaxation |
| US7335545B2 (en) * | 2002-06-07 | 2008-02-26 | Amberwave Systems Corporation | Control of strain in device layers by prevention of relaxation |
| US7074623B2 (en) * | 2002-06-07 | 2006-07-11 | Amberwave Systems Corporation | Methods of forming strained-semiconductor-on-insulator finFET device structures |
| US7358121B2 (en) * | 2002-08-23 | 2008-04-15 | Intel Corporation | Tri-gate devices and methods of fabrication |
| US6946373B2 (en) * | 2002-11-20 | 2005-09-20 | International Business Machines Corporation | Relaxed, low-defect SGOI for strained Si CMOS applications |
| FR2847715B1 (fr) * | 2002-11-25 | 2005-03-11 | Commissariat Energie Atomique | Circuit integre comportant des sous-ensembles connectes en serie |
| US6717216B1 (en) * | 2002-12-12 | 2004-04-06 | International Business Machines Corporation | SOI based field effect transistor having a compressive film in undercut area under the channel and a method of making the device |
| US7157774B2 (en) * | 2003-01-31 | 2007-01-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Strained silicon-on-insulator transistors with mesa isolation |
| US6870179B2 (en) * | 2003-03-31 | 2005-03-22 | Intel Corporation | Increasing stress-enhanced drive current in a MOS transistor |
| US7081395B2 (en) * | 2003-05-23 | 2006-07-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Silicon strain engineering accomplished via use of specific shallow trench isolation fill materials |
| US6909151B2 (en) * | 2003-06-27 | 2005-06-21 | Intel Corporation | Nonplanar device with stress incorporation layer and method of fabrication |
| US7456476B2 (en) * | 2003-06-27 | 2008-11-25 | Intel Corporation | Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication |
| US7105390B2 (en) * | 2003-12-30 | 2006-09-12 | Intel Corporation | Nonplanar transistors with metal gate electrodes |
| US7268058B2 (en) * | 2004-01-16 | 2007-09-11 | Intel Corporation | Tri-gate transistors and methods to fabricate same |
| US20050186722A1 (en) * | 2004-02-25 | 2005-08-25 | Kuan-Lun Cheng | Method and structure for CMOS device with stress relaxed by ion implantation of carbon or oxygen containing ions |
| US7154118B2 (en) * | 2004-03-31 | 2006-12-26 | Intel Corporation | Bulk non-planar transistor having strained enhanced mobility and methods of fabrication |
| US20050266632A1 (en) * | 2004-05-26 | 2005-12-01 | Yun-Hsiu Chen | Integrated circuit with strained and non-strained transistors, and method of forming thereof |
| US7579280B2 (en) * | 2004-06-01 | 2009-08-25 | Intel Corporation | Method of patterning a film |
| US7042009B2 (en) * | 2004-06-30 | 2006-05-09 | Intel Corporation | High mobility tri-gate devices and methods of fabrication |
| US6991998B2 (en) * | 2004-07-02 | 2006-01-31 | International Business Machines Corporation | Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer |
| US7348284B2 (en) | 2004-08-10 | 2008-03-25 | Intel Corporation | Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow |
| US7135372B2 (en) * | 2004-09-09 | 2006-11-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained silicon device manufacturing method |
| US7071064B2 (en) * | 2004-09-23 | 2006-07-04 | Intel Corporation | U-gate transistors and methods of fabrication |
| US7332439B2 (en) * | 2004-09-29 | 2008-02-19 | Intel Corporation | Metal gate transistors with epitaxial source and drain regions |
| US7422946B2 (en) * | 2004-09-29 | 2008-09-09 | Intel Corporation | Independently accessed double-gate and tri-gate transistors in same process flow |
| US7361958B2 (en) * | 2004-09-30 | 2008-04-22 | Intel Corporation | Nonplanar transistors with metal gate electrodes |
| JP4603845B2 (ja) * | 2004-10-12 | 2010-12-22 | Okiセミコンダクタ株式会社 | 半導体装置の製造方法 |
| US20060086977A1 (en) | 2004-10-25 | 2006-04-27 | Uday Shah | Nonplanar device with thinned lower body portion and method of fabrication |
| US7306997B2 (en) * | 2004-11-10 | 2007-12-11 | Advanced Micro Devices, Inc. | Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor |
| US7393733B2 (en) * | 2004-12-01 | 2008-07-01 | Amberwave Systems Corporation | Methods of forming hybrid fin field-effect transistor structures |
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| US7193279B2 (en) * | 2005-01-18 | 2007-03-20 | Intel Corporation | Non-planar MOS structure with a strained channel region |
| US7518196B2 (en) | 2005-02-23 | 2009-04-14 | Intel Corporation | Field effect transistor with narrow bandgap source and drain regions and method of fabrication |
| US20060202266A1 (en) * | 2005-03-14 | 2006-09-14 | Marko Radosavljevic | Field effect transistor with metal source/drain regions |
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| US7858481B2 (en) | 2005-06-15 | 2010-12-28 | Intel Corporation | Method for fabricating transistor with thinned channel |
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| DE102005052055B3 (de) | 2005-10-31 | 2007-04-26 | Advanced Micro Devices, Inc., Sunnyvale | Eingebettete Verformungsschicht in dünnen SOI-Transistoren und Verfahren zur Herstellung desselben |
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| US20080157225A1 (en) * | 2006-12-29 | 2008-07-03 | Suman Datta | SRAM and logic transistors with variable height multi-gate transistor architecture |
| US8558278B2 (en) * | 2007-01-16 | 2013-10-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained transistor with optimized drive current and method of forming |
| KR101052868B1 (ko) * | 2008-02-29 | 2011-07-29 | 주식회사 하이닉스반도체 | Soi 소자 및 그의 제조방법 |
| US7943961B2 (en) * | 2008-03-13 | 2011-05-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strain bars in stressed layers of MOS devices |
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| CN102024706B (zh) * | 2009-09-22 | 2012-06-20 | 中芯国际集成电路制造(上海)有限公司 | 用于制造半导体器件的方法 |
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| JP6005364B2 (ja) * | 2012-02-06 | 2016-10-12 | ラピスセミコンダクタ株式会社 | 半導体装置の製造方法及び半導体装置 |
| US9515181B2 (en) | 2014-08-06 | 2016-12-06 | Qualcomm Incorporated | Semiconductor device with self-aligned back side features |
| JP6559745B2 (ja) | 2017-08-23 | 2019-08-14 | 株式会社東芝 | 半導体デバイス検査装置、半導体デバイス検査方法、そのプログラム、半導体装置およびその製造方法 |
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| KR102396978B1 (ko) * | 2018-11-16 | 2022-05-11 | 삼성전자주식회사 | 반도체 장치 |
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| US6054343A (en) * | 1998-01-26 | 2000-04-25 | Texas Instruments Incorporated | Nitride trench fill process for increasing shallow trench isolation (STI) robustness |
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| US6506620B1 (en) * | 2000-11-27 | 2003-01-14 | Microscan Systems Incorporated | Process for manufacturing micromechanical and microoptomechanical structures with backside metalization |
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-
2002
- 2002-06-25 US US10/178,542 patent/US6680240B1/en not_active Expired - Lifetime
-
2003
- 2003-06-04 KR KR1020047021192A patent/KR100996725B1/ko not_active Expired - Fee Related
- 2003-06-04 EP EP03734436A patent/EP1516362A2/en not_active Withdrawn
- 2003-06-04 JP JP2004515743A patent/JP4452883B2/ja not_active Expired - Fee Related
- 2003-06-04 AU AU2003238916A patent/AU2003238916A1/en not_active Abandoned
- 2003-06-04 CN CNB03813263XA patent/CN1333454C/zh not_active Expired - Lifetime
- 2003-06-04 WO PCT/US2003/017824 patent/WO2004001798A2/en not_active Ceased
- 2003-06-18 TW TW092116498A patent/TWI289895B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| WO2004001798A2 (en) | 2003-12-31 |
| TWI289895B (en) | 2007-11-11 |
| CN1659696A (zh) | 2005-08-24 |
| TW200400564A (en) | 2004-01-01 |
| JP4452883B2 (ja) | 2010-04-21 |
| KR20050013248A (ko) | 2005-02-03 |
| WO2004001798A3 (en) | 2004-07-29 |
| EP1516362A2 (en) | 2005-03-23 |
| KR100996725B1 (ko) | 2010-11-25 |
| JP2005531144A (ja) | 2005-10-13 |
| AU2003238916A8 (en) | 2004-01-06 |
| US20040018668A1 (en) | 2004-01-29 |
| US6680240B1 (en) | 2004-01-20 |
| CN1333454C (zh) | 2007-08-22 |
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