ATE85139T1 - Fehlertolerante speicheranordnung. - Google Patents

Fehlertolerante speicheranordnung.

Info

Publication number
ATE85139T1
ATE85139T1 AT84307427T AT84307427T ATE85139T1 AT E85139 T1 ATE85139 T1 AT E85139T1 AT 84307427 T AT84307427 T AT 84307427T AT 84307427 T AT84307427 T AT 84307427T AT E85139 T1 ATE85139 T1 AT E85139T1
Authority
AT
Austria
Prior art keywords
memory cells
fault tolerant
memory arrangement
bytes
tolerant memory
Prior art date
Application number
AT84307427T
Other languages
English (en)
Inventor
George Perlegos
Original Assignee
Seeq Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seeq Technology Inc filed Critical Seeq Technology Inc
Application granted granted Critical
Publication of ATE85139T1 publication Critical patent/ATE85139T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187—Voting techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Detection And Correction Of Errors (AREA)
  • Non-Reversible Transmitting Devices (AREA)
  • Static Random-Access Memory (AREA)
  • Hardware Redundancy (AREA)
AT84307427T 1983-10-28 1984-10-29 Fehlertolerante speicheranordnung. ATE85139T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/546,593 US4768169A (en) 1983-10-28 1983-10-28 Fault-tolerant memory array
EP84307427A EP0140698B1 (de) 1983-10-28 1984-10-29 Fehlertolerante Speicheranordnung

Publications (1)

Publication Number Publication Date
ATE85139T1 true ATE85139T1 (de) 1993-02-15

Family

ID=24181118

Family Applications (1)

Application Number Title Priority Date Filing Date
AT84307427T ATE85139T1 (de) 1983-10-28 1984-10-29 Fehlertolerante speicheranordnung.

Country Status (5)

Country Link
US (1) US4768169A (de)
EP (1) EP0140698B1 (de)
JP (1) JPS60173800A (de)
AT (1) ATE85139T1 (de)
DE (1) DE3486054T2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01264699A (ja) * 1988-04-15 1989-10-20 Sony Corp 不揮発性半導体記憶装置
US5029131A (en) * 1988-06-29 1991-07-02 Seeq Technology, Incorporated Fault tolerant differential memory cell and sensing
GB8916019D0 (en) * 1989-07-13 1989-08-31 Hughes Microelectronics Ltd A non-volatile ram bit cell
US5077737A (en) * 1989-08-18 1991-12-31 Micron Technology, Inc. Method and apparatus for storing digital data in off-specification dynamic random access memory devices
US5161157A (en) * 1990-03-12 1992-11-03 Xicor, Inc. Field-programmable redundancy apparatus for memory arrays
US5153880A (en) * 1990-03-12 1992-10-06 Xicor, Inc. Field-programmable redundancy apparatus for memory arrays
US5367655A (en) * 1991-12-23 1994-11-22 Motorola, Inc. Memory and associated method including an operating mode for simultaneously selecting multiple rows of cells
US5559981A (en) * 1994-02-14 1996-09-24 Motorola, Inc. Pseudo static mask option register and method therefor
US5956473A (en) * 1996-11-25 1999-09-21 Macronix International Co., Ltd. Method and system for managing a flash memory mass storage system
TW397982B (en) * 1997-09-18 2000-07-11 Sanyo Electric Co Nonvolatile semiconductor memory device
US6182239B1 (en) * 1998-02-06 2001-01-30 Stmicroelectronics, Inc. Fault-tolerant codes for multi-level memories
JP3827953B2 (ja) * 1999-01-22 2006-09-27 ローム株式会社 不揮発性半導体記憶装置
US6773083B2 (en) 2001-08-29 2004-08-10 Lexmark International, Inc. Method and apparatus for non-volatile memory usage in an ink jet printer
KR101264761B1 (ko) * 2004-02-10 2013-05-15 가부시키가이샤 한도오따이 에네루기 켄큐쇼 비휘발성 메모리와 그것을 내장하는 ｉｃ 카드, ｉｄ 카드 및 ｉｄ 태그
US20100241783A1 (en) * 2009-03-23 2010-09-23 Honeywell International Inc. Memory node for use within a data storage system having a plurality of interconnected memory nodes

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5622278A (en) * 1979-07-27 1981-03-02 Fujitsu Ltd Decoder selection system
NL8005756A (nl) * 1980-10-20 1982-05-17 Philips Nv Inrichting voor het opwekken van een reeks binair gewogen waarden van een elektrische grootheid.
JPS589292A (ja) * 1981-07-10 1983-01-19 Fujitsu Ltd 読出専用記憶装置読出し方式
JPS6059677B2 (ja) * 1981-08-19 1985-12-26 富士通株式会社 半導体記憶装置
US4422161A (en) * 1981-10-08 1983-12-20 Rca Corporation Memory array with redundant elements
JPS58125299A (ja) * 1982-01-19 1983-07-26 Toshiba Corp 冗長度を有するメモリ装置
US4558344A (en) * 1982-01-29 1985-12-10 Seeq Technology, Inc. Electrically-programmable and electrically-erasable MOS memory device
US4485459A (en) * 1982-09-20 1984-11-27 Fairchild Camera & Instrument Corp. Redundant columns for byte wide memories

Also Published As

Publication number Publication date
EP0140698A3 (en) 1988-03-30
JPH0458680B2 (de) 1992-09-18
JPS60173800A (ja) 1985-09-07
DE3486054T2 (de) 1993-05-19
DE3486054D1 (de) 1993-03-11
EP0140698B1 (de) 1993-01-27
EP0140698A2 (de) 1985-05-08
US4768169A (en) 1988-08-30

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Legal Events

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